From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33D05C433F5 for ; Tue, 26 Oct 2021 11:23:47 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F15BB60EDF for ; Tue, 26 Oct 2021 11:23:46 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org F15BB60EDF Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:Cc:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=d7fOotj+h93MNUc/syD1nY2GGTu417MwwdvkAs0dz/g=; b=dg55QzzjDxOq5mQIMlNjgZuIJT VqH2VxuKG66bqbl+n9irf13ooVtdhpX3jrm+/sxIn0fWEfh2rmu84qDOcN7L2yCkzpX+xDMy9vmqR QykST4/lhyySoPReS20NNOQInGMuyUwMxuUK0hNXeMkSke2FafmZD9xgPpaJRGgPfMgTfTEhstohb AMxyIb3LcyrTt252SfIe6Zg1X1CKvJeDp0/GEd4ysd0dBeXygoXy3G40Y8rd6PAK4hnwUfk8LDP4I 7sWOjyFS+ag8CdAUrcEo4Mu05eKUlQelfSK9c4gOe+Vp4g063dhnTLuCUExH1lTkDc+iHC+gucZsw jXx36VVA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mfKXO-001dTy-VY; Tue, 26 Oct 2021 11:22:39 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mfKXK-001dSs-VF for linux-arm-kernel@lists.infradead.org; Tue, 26 Oct 2021 11:22:36 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A13EB1FB; Tue, 26 Oct 2021 04:22:26 -0700 (PDT) Received: from [10.57.27.231] (unknown [10.57.27.231]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 22AA93F73D; Tue, 26 Oct 2021 04:22:25 -0700 (PDT) Subject: Re: [PATCH] arm64: clear_page() shouldn't use DC ZVA when DCZID_EL0.DZP == 1 To: Reiji Watanabe , Catalin Marinas , Will Deacon Cc: Marc Zyngier , linux-arm-kernel@lists.infradead.org, Peter Shier , Ricardo Koller , Oliver Upton , Jing Zhang , Raghavendra Rao Anata References: <20211026034844.1393437-1-reijiw@google.com> From: Robin Murphy Message-ID: <0cd301eb-c2a4-bc90-46b8-cb4d4e25978b@arm.com> Date: Tue, 26 Oct 2021 12:22:20 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; rv:78.0) Gecko/20100101 Thunderbird/78.14.0 MIME-Version: 1.0 In-Reply-To: <20211026034844.1393437-1-reijiw@google.com> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211026_042235_103710_687B0764 X-CRM114-Status: GOOD ( 15.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2021-10-26 04:48, Reiji Watanabe wrote: > Currently, clear_page() uses DC ZVA instruction unconditionally. But it > should make sure that DCZID_EL0.DZP, which indicates whether or not use > of DC ZVA instruction is prohibited, is zero when using the instruction. > Use stp as memset does instead when DCZID_EL0.DZP == 1. > > Signed-off-by: Reiji Watanabe > --- > arch/arm64/lib/clear_page.S | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/arm64/lib/clear_page.S b/arch/arm64/lib/clear_page.S > index b84b179edba3..7ce1bfa4081c 100644 > --- a/arch/arm64/lib/clear_page.S > +++ b/arch/arm64/lib/clear_page.S > @@ -16,6 +16,7 @@ > */ > SYM_FUNC_START_PI(clear_page) > mrs x1, dczid_el0 > + tbnz x1, #4, 2f /* Branch if DC GVA is prohibited */ > and w1, w1, #0xf > mov x2, #4 > lsl x1, x2, x1 > @@ -25,5 +26,15 @@ SYM_FUNC_START_PI(clear_page) > tst x0, #(PAGE_SIZE - 1) > b.ne 1b > ret > + > +2: mov x1, #(PAGE_SIZE) > + sub x0, x0, #16 /* Pre-bias. */ Out of curiosity, what's this for? It's not like we need to worry about PAGE_SIZE or page addresses being misaligned. I don't really see why we'd need a different condition from the DC ZVA loop. Robin. > +3: stp xzr, xzr, [x0, #16] > + stp xzr, xzr, [x0, #32] > + stp xzr, xzr, [x0, #48] > + stp xzr, xzr, [x0, #64]! > + subs x1, x1, #64 > + b.gt 3b > + ret > SYM_FUNC_END_PI(clear_page) > EXPORT_SYMBOL(clear_page) > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel