From mboxrd@z Thu Jan 1 00:00:00 1970 From: absahu@codeaurora.org (Abhishek Sahu) Date: Fri, 16 Mar 2018 15:52:43 +0530 Subject: [PATCH v2 08/13] ARM: dts: ipq4019: Add ipq4019-ap.dk07.1 common data In-Reply-To: <1521193101-4586-9-git-send-email-sricharan@codeaurora.org> References: <1521193101-4586-1-git-send-email-sricharan@codeaurora.org> <1521193101-4586-9-git-send-email-sricharan@codeaurora.org> Message-ID: <0d38e3baf97a74e3972c0dc7e14538f0@codeaurora.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 2018-03-16 15:08, Sricharan R wrote: > Add the common data for all dk07 based boards. > > Signed-off-by: Sricharan R Reviewed-by: Abhishek Sahu > --- > arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi | 83 > +++++++++++++++++++++++++++ > 1 file changed, 83 insertions(+) > create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi > > diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi > b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi > new file mode 100644 > index 0000000..37a2ea8 > --- /dev/null > +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi > @@ -0,0 +1,83 @@ > +// SPDX-License-Identifier: GPL-2.0 > +// Copyright (c) 2018, The Linux Foundation. All rights reserved. > + > +#include "qcom-ipq4019.dtsi" > +#include > +#include > + > +/ { > + model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1"; > + compatible = "qcom,ipq4019"; > + > + memory { > + device_type = "memory"; > + reg = <0x80000000 0x20000000>; /* 512MB */ > + }; > + > + reserved-memory { > + #address-cells = <1>; > + #size-cells = <1>; > + ranges; > + > + rsvd1 at 87000000 { > + /* Reserved for other subsystem */ > + reg = <0x87000000 0x500000>; > + no-map; > + }; > + > + wifi_dump at 87500000 { > + reg = <0x87500000 0x600000>; > + no-map; > + }; > + > + rsvd2 at 87B00000 { > + /* Reserved for other subsystem */ > + reg = <0x87B00000 0x500000>; > + no-map; > + }; > + }; > + > + soc { > + pinctrl at 1000000 { > + serial_0_pins: serial0_pinmux { > + mux { > + pins = "gpio16", "gpio17"; > + function = "blsp_uart0"; > + bias-disable; > + }; > + }; > + > + i2c_0_pins: i2c_0_pinmux { > + mux { > + pins = "gpio20", "gpio21"; > + function = "blsp_i2c0"; > + bias-disable; > + }; > + }; > + }; > + > + serial at 78af000 { > + pinctrl-0 = <&serial_0_pins>; > + pinctrl-names = "default"; > + status = "ok"; > + }; > + > + blsp_dma: dma at 7884000 { > + status = "ok"; > + }; > + > + i2c_0: i2c at 78b7000 { /* BLSP1 QUP2 */ > + pinctrl-0 = <&i2c_0_pins>; > + pinctrl-names = "default"; > + status = "ok"; > + }; > + > + qpic_bam: dma at 7984000 { > + status = "ok"; > + }; > + > + nand: qpic-nand at 79b0000 { > + status = "ok"; > + }; > + }; > +};