From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 101AFC47258 for ; Tue, 23 Jan 2024 14:37:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=q+s8kr/BqWIJEhSp/4S4UPQzZcRTdMEeYoaxlnqFhKw=; b=2Vj3Vf+3ZA3TNM /cLBa0jGMsDhfOS4idLb2xgpH6oncAYdU5YedEH8X/gmRDz+/hTaJ5lScRm5JWsUFFVXmQ8DEmeEC b9/SvoxFigzdya9CfM2CLP9/Ej3c+adegOCsPxkxNRnXnEq4apfB3EbHEsF0Lx8JS0RY7zTFmfTv7 TnhuboyK8i0GebpVDCMVU5zyYE6zeuwJ++AwYqav0Vvq8E+32+82qqDTk2ovAkOgNwxenGySMr7qA v0MaNlPgg4vKx0TnPzNFg9LQmUu50pTZRtooqR2M4kvOgKpXDAiL2QcJAhgz3FWFjp2rZOBAGHhM1 mCRNXDcL0thVjwJn5DbQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rSHtO-00Gq76-1n; Tue, 23 Jan 2024 14:36:46 +0000 Received: from mgamail.intel.com ([134.134.136.65]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rSHtM-00Gq5E-18 for linux-arm-kernel@lists.infradead.org; Tue, 23 Jan 2024 14:36:46 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706020604; x=1737556604; h=message-id:date:mime-version:subject:to:references:from: in-reply-to:content-transfer-encoding; bh=b5WsAWXcMZJ3oedYBhrg7imN/aUDHQ+7R2QdjuUQDzU=; b=NlSnBAguCJfUH0L/QSB90htATYKVfO7CG8Y0rtxffsd6iSjld5+liQlP G3cO5/7dVvoW1ExzwVuzJN4OTGVleZsDlAbL9VhYG8euvvK05lRxeTOo6 FecGeTr1hcnCUc9IdjCv7BR0gcV51T0LgmFGB2K+FGxgVztG/ALSTgHkn 4japCyNCtD7HAfPgpHomk2RVKoQ6rhZg8ZByLv9lnHKy0UdyRwfn8iBXr Vf3Y9Mt5kSiNisOOvGl/r2xPe8QrTn6MSerTE8um3XqwVPmf4fcYzrY6z ELGCXtlad/1npDP3y6oWr7mqOGeEp4IuZThMTkEocKqEcz0cs1TYQ2B/C g==; X-IronPort-AV: E=McAfee;i="6600,9927,10962"; a="405295092" X-IronPort-AV: E=Sophos;i="6.05,214,1701158400"; d="scan'208";a="405295092" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2024 06:36:41 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,214,1701158400"; d="scan'208";a="34426302" Received: from linux.intel.com ([10.54.29.200]) by orviesa001.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2024 06:36:42 -0800 Received: from [10.212.112.252] (unknown [10.212.112.252]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by linux.intel.com (Postfix) with ESMTPS id AE968580CA5; Tue, 23 Jan 2024 06:36:38 -0800 (PST) Message-ID: <0d85e3f6-d857-4c62-8ad8-c20ac2665e91@linux.intel.com> Date: Tue, 23 Jan 2024 09:36:37 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V3 0/7] Clean up perf mem To: Thomas Richter , kajoljain , acme@kernel.org, irogers@google.com, peterz@infradead.org, mingo@redhat.com, namhyung@kernel.org, jolsa@kernel.org, adrian.hunter@intel.com, john.g.garry@oracle.com, will@kernel.org, james.clark@arm.com, mike.leach@linaro.org, leo.yan@linaro.org, yuhaixin.yhx@linux.alibaba.com, renyu.zj@linux.alibaba.com, ravi.bangoria@amd.com, atrajeev@linux.vnet.ibm.com, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20231213195154.1085945-1-kan.liang@linux.intel.com> <8bfadc86-e137-4a9f-a9ce-0bc62464c195@linux.intel.com> <057a1c19-3117-1aec-41d6-4950c599b862@linux.ibm.com> <692e16f9-062c-4b3c-bd66-a16bac68216c@linux.intel.com> <6ace2f9f-b073-e22b-0dd6-69c52814d49a@linux.ibm.com> Content-Language: en-US From: "Liang, Kan" In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240123_063644_440619_DBFC2EC4 X-CRM114-Status: GOOD ( 20.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2024-01-23 12:56 a.m., Thomas Richter wrote: > On 1/23/24 06:30, kajoljain wrote: >> >> >> On 1/16/24 22:07, Liang, Kan wrote: >>> >>> >>> On 2024-01-16 9:05 a.m., kajoljain wrote: >>>>> For powerpc, the patch 3 introduced a perf_mem_events_power, which >>>>> doesn't have ldlat. But it only be assigned to the pmu->is_core. I'm not >>>>> sure if it's the problem. >>>> Hi Kan, >>>> Correct there were some small issues with patch 3, I added fix for that. >>>> >>> >>> Thanks Kajol Jain! I will fold your fix into V4. >>> >>>>> Also, S390 still uses the default perf_mem_events, which includes ldlat. >>>>> I'm not sure if S390 supports the ldlat. >>>> I checked it, I didn't find ldlat parameter defined in arch/s390 >>>> directory. I think its better to make default ldlat value as false >>>> in tools/perf/util/mem-events.c file. >>> >>> The s390 may not be the only user for the default perf_mem_events[] in >>> the tools/perf/util/mem-events.c. We probably cannot change the default >>> value. >>> We may share the perf_mem_events_power[] between powerpc and s390. (We >>> did the similar share for arm and arm64.) >>> >>> How about the below patch (not tested.) >>> >>> diff --git a/tools/perf/arch/s390/util/pmu.c >>> b/tools/perf/arch/s390/util/pmu.c >>> index 225d7dc2379c..411034c984bb 100644 >>> --- a/tools/perf/arch/s390/util/pmu.c >>> +++ b/tools/perf/arch/s390/util/pmu.c >>> @@ -8,6 +8,7 @@ >>> #include >>> >>> #include "../../../util/pmu.h" >>> +#include "../../powerpc/util/mem-events.h" >>> >>> #define S390_PMUPAI_CRYPTO "pai_crypto" >>> #define S390_PMUPAI_EXT "pai_ext" >>> @@ -21,5 +22,5 @@ void perf_pmu__arch_init(struct perf_pmu *pmu) >>> pmu->selectable = true; >>> >>> if (pmu->is_core) >>> - pmu->mem_events = perf_mem_events; >>> + pmu->mem_events = perf_mem_events_power; >>> } >>> >>> >>> >>> However, the original s390 code doesn't include any s390 specific code >>> for perf_mem. So I thought it uses the default perf_mem_events[]. >>> Is there something I missed? >>> >>> Or does the s390 even support mem events? If not, I may remove the >>> mem_events from s390. >> >> Hi Kan, >> I don't have s390 system to do testing. But from my end I am fine >> with the changes. >> >> Thanks, >> Kajol Jain >> > > s390 does not support perf mem at all. Right now it is save to remove it from s390. Thanks for the confirmation! Thanks, Kan > Thanks > >>> >>> Thanks, >>> Kan >> > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel