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a=rsa-sha256; c=relaxed/relaxed; d=savoirfairelinux.com; s=DFC430D2-D198-11EC-948E-34200CB392D2; t=1709486517; bh=X6z60N3ACA8IZvH3DAutfNtSvNMdf/cqZv1EWMeZFp8=; h=Date:From:To:Message-ID:MIME-Version; b=LuZ6KfNsatHWX0Xw339nJ0GCdVDLBxwNICLWskMqZx8Z2FpywSvLXMaNexTuB3rVO 6bnwPHmfEzflBBg5csGvFZ4+IjpP4e3qewoX8VLFaMMqjZZXV6XDUAwdipnXBLSwv6 qlXvb09dwo2MC8m59K4NtIIlr8IzoSEc633xSZEE5E8AiXEvn+jFJ4n05ZmGcjWdkN ZJPju8Nrp+PsL5tI0jCXEoplmMVeDkQTNodtW7E5unYZ8BqbtMEk9SGCXhtI5tanBq DnHxWD/9kKjxjjEyaVViweDyL1+PoEzavhW49Cs7q7C8ScUkpamBAgYpvbIVyS1WUj iCrWTAeb/kz4w== X-Virus-Scanned: amavis at mail.savoirfairelinux.com Received: from mail.savoirfairelinux.com ([127.0.0.1]) by localhost (mail.savoirfairelinux.com [127.0.0.1]) (amavis, port 10026) with ESMTP id OLUM838hYjhr; Sun, 3 Mar 2024 12:21:57 -0500 (EST) Received: from mail.savoirfairelinux.com (mail.savoirfairelinux.com [192.168.48.237]) by mail.savoirfairelinux.com (Postfix) with ESMTP id 984849C53A7; Sun, 3 Mar 2024 12:21:57 -0500 (EST) Date: Sun, 3 Mar 2024 12:21:57 -0500 (EST) From: Charles Perry To: Krzysztof Kozlowski , Rob Herring , yilun xu Cc: mdf , Allen VANDIVER , Brian CODY , hao wu , Tom Rix , krzysztof kozlowski+dt , Conor Dooley , Michal Simek , linux-fpga , devicetree , linux-kernel , linux-arm-kernel Message-ID: <1012793477.1508198.1709486517581.JavaMail.zimbra@savoirfairelinux.com> In-Reply-To: <4a9f0eef-590b-45df-92bc-b63ad9282e18@linaro.org> References: <20240221195058.1281973-1-charles.perry@savoirfairelinux.com> <20240221195058.1281973-3-charles.perry@savoirfairelinux.com> <4a9f0eef-590b-45df-92bc-b63ad9282e18@linaro.org> Subject: Re: [PATCH v4 2/3] dt-bindings: fpga: xlnx,fpga-selectmap: add DT schema MIME-Version: 1.0 X-Mailer: Zimbra 8.8.15_GA_4581 (ZimbraWebClient - FF123 (Linux)/8.8.15_GA_4581) Thread-Topic: dt-bindings: fpga: xlnx,fpga-selectmap: add DT schema Thread-Index: HnW++BP3eG91lJsFnUADYrmozr5KCw== X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240303_092159_613594_1555FC1C X-CRM114-Status: GOOD ( 21.18 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Feb 27, 2024, at 3:10 AM, Krzysztof Kozlowski krzysztof.kozlowski@linaro.org wrote: > On 21/02/2024 20:50, Charles Perry wrote: >> Document the SelectMAP interface of Xilinx 7 series FPGA. >> >> Signed-off-by: Charles Perry >> --- >> .../bindings/fpga/xlnx,fpga-selectmap.yaml | 86 +++++++++++++++++++ >> 1 file changed, 86 insertions(+) >> create mode 100644 >> Documentation/devicetree/bindings/fpga/xlnx,fpga-selectmap.yaml >> >> diff --git a/Documentation/devicetree/bindings/fpga/xlnx,fpga-selectmap.yaml >> b/Documentation/devicetree/bindings/fpga/xlnx,fpga-selectmap.yaml >> new file mode 100644 >> index 0000000000000..08a5e92781657 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/fpga/xlnx,fpga-selectmap.yaml >> @@ -0,0 +1,86 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/fpga/xlnx,fpga-selectmap.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Xilinx SelectMAP FPGA interface >> + >> +maintainers: >> + - Charles Perry >> + >> +description: | >> + Xilinx 7 Series FPGAs support a method of loading the bitstream over a >> + parallel port named the SelectMAP interface in the documentation. Only >> + the x8 mode is supported where data is loaded at one byte per rising edge of >> + the clock, with the MSB of each byte presented to the D0 pin. >> + >> + Datasheets: >> + >> https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf >> + >> +allOf: >> + - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml# >> + >> +properties: >> + compatible: >> + enum: >> + - xlnx,fpga-xc7s-selectmap >> + - xlnx,fpga-xc7a-selectmap >> + - xlnx,fpga-xc7k-selectmap >> + - xlnx,fpga-xc7v-selectmap >> + >> + reg: >> + description: >> + At least 1 byte of memory mapped IO >> + maxItems: 1 >> + >> + prog_b-gpios: > > I commented on this and still see underscore. Nothing in commit msg > explains why this should have underscore. Changelog is also vague - > describes that you brought back underscores, instead of explaining why > you did it. > > So the same comments as usual: > > No underscores in names. > > Best regards, > Krzysztof Hello Krzysztof, Yes, I've gone full circle on that issue. Here's what I tried so far: 1) Reuse the same gpio names: Duplicates errors of the past, Krzysztof doesn't like it. 2) Different gpio names for new driver only: Makes the driver code overly complicated, Yilun doesn't like it. 3) Change gpio names for both drivers, deprecate the old names: Makes the DT binding and the driver code overly complicated, Rob doesn't like it. I think that while the driver code shouldn't be the driving force for the DT spec, it can be a good indication that the spec is unpractical to implement. In this case, there are two interfaces on a chip that uses the same GPIO protocol, it would only make sense that they use the same names, this discards solution #2. That leaves us with #1 or #3, which is to ask if the added complexity to the driver code and DT binding is worth it for a gain in naming convention. There might also be another solution that I haven't seen. Regards, Charles _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel