From: "Daniel González Cabanelas" <dgcbueu@gmail.com>
To: jason@lakedaemon.net
Cc: devicetree@vger.kernel.org, andrew@lunn.ch,
gregory.clement@bootlin.com, robh+dt@kernel.org,
linux-arm-kernel@lists.infradead.org,
sebastian.hesselbarth@gmail.com
Subject: [PATCH] ARM: dts: dlink-dns327l: fix reg-init PHY
Date: Fri, 26 Jun 2020 20:39:05 +0200 [thread overview]
Message-ID: <10150060.RLU44xrj3c@tool> (raw)
The marvell PHY reg-init registers for the D-Link DNS-327L are wrong.
Currently the first field is used to set the page 2, but this is
pointless. The usage is not correct, and we are setting the wrong
registers.
Fix it.
Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
---
arch/arm/boot/dts/armada-370-dlink-dns327l.dts | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
index baa459dd5..2008c6eaa 100644
--- a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
+++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
@@ -247,9 +247,8 @@ &uart1 {
&mdio {
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
reg = <0>;
- marvell,reg-init = <0x0 0x16 0x0 0x0002>,
- <0x0 0x19 0x0 0x0077>,
- <0x0 0x18 0x0 0x5747>;
+ marvell,reg-init = <0x2 0x19 0x0 0x0077>,
+ <0x2 0x18 0x0 0x5747>;
};
};
--
2.27.0
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next reply other threads:[~2020-06-26 18:41 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-26 18:39 Daniel González Cabanelas [this message]
2020-06-26 20:33 ` [PATCH] ARM: dts: dlink-dns327l: fix reg-init PHY Andrew Lunn
2020-07-18 20:57 ` Gregory CLEMENT
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