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([2606:6d00:17:7b4b::5ac]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-8846e599ac9sm44053446d6.49.2025.11.21.10.07.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Nov 2025 10:07:37 -0800 (PST) Message-ID: <11354064b251d01f8a0f8974c451c91d515be1a4.camel@ndufresne.ca> Subject: Re: [PATCH 1/2] pmdomain: imx8m-blk-ctrl: Remove separate rst and clk mask for 8mq vpu From: Nicolas Dufresne To: ming.qian@oss.nxp.com, linux-media@vger.kernel.org Cc: mchehab@kernel.org, hverkuil-cisco@xs4all.nl, benjamin.gaignard@collabora.com, p.zabel@pengutronix.de, sebastian.fricke@collabora.com, shawnguo@kernel.org, ulf.hansson@linaro.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, l.stach@pengutronix.de, peng.fan@nxp.com, eagle.zhou@nxp.com, imx@lists.linux.dev, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Date: Fri, 21 Nov 2025 13:07:35 -0500 In-Reply-To: <20251121081911.1682-1-ming.qian@oss.nxp.com> References: <20251121081911.1682-1-ming.qian@oss.nxp.com> Content-Type: multipart/signed; micalg="pgp-sha512"; protocol="application/pgp-signature"; boundary="=-CGluF/KiYEHV7bilRPFN" User-Agent: Evolution 3.58.1 (3.58.1-1.fc43) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251121_100740_567740_C2258BBD X-CRM114-Status: GOOD ( 17.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --=-CGluF/KiYEHV7bilRPFN Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Ming, thanks a lot for working on this. Le vendredi 21 novembre 2025 =C3=A0 16:19 +0800, ming.qian@oss.nxp.com a = =C3=A9crit=C2=A0: > From: Ming Qian >=20 > The ADB in the VPUMIX domain has no separate reset and clock > enable bits, but is ungated and reset together with the VPUs. > So we can't reset G1 or G2 separately, it may led to the system hang. > Remove rst_mask and clk_mask of imx8mq_vpu_blk_ctl_domain_data. > Let imx8mq_vpu_power_notifier() do really vpu reset. >=20 > Fixes: 608d7c325e85 ("soc: imx: imx8m-blk-ctrl: add i.MX8MQ VPU blk-ctrl"= ) > Signed-off-by: Ming Qian > --- > =C2=A0drivers/pmdomain/imx/imx8m-blk-ctrl.c | 4 ---- > =C2=A01 file changed, 4 deletions(-) >=20 > diff --git a/drivers/pmdomain/imx/imx8m-blk-ctrl.c b/drivers/pmdomain/imx= /imx8m-blk-ctrl.c > index 5c83e5599f1e..1f07ff041295 100644 > --- a/drivers/pmdomain/imx/imx8m-blk-ctrl.c > +++ b/drivers/pmdomain/imx/imx8m-blk-ctrl.c > @@ -852,16 +852,12 @@ static const struct imx8m_blk_ctrl_domain_data imx8= mq_vpu_blk_ctl_domain_data[] > =C2=A0 .clk_names =3D (const char *[]){ "g1", }, > =C2=A0 .num_clks =3D 1, > =C2=A0 .gpc_name =3D "g1", > - .rst_mask =3D BIT(1), > - .clk_mask =3D BIT(1), > =C2=A0 }, > =C2=A0 [IMX8MQ_VPUBLK_PD_G2] =3D { > =C2=A0 .name =3D "vpublk-g2", > =C2=A0 .clk_names =3D (const char *[]){ "g2", }, > =C2=A0 .num_clks =3D 1, > =C2=A0 .gpc_name =3D "g2", > - .rst_mask =3D BIT(0), > - .clk_mask =3D BIT(0), > =C2=A0 }, That was also our impression, but we could not get information about this H= W. One question here, how do we ensure that we don't reset twice on power on ? Nicolas > =C2=A0}; > =C2=A0 --=-CGluF/KiYEHV7bilRPFN Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQTvDVKBFcTDwhoEbxLZQZRRKWBy9AUCaSCqZwAKCRDZQZRRKWBy 9A6ZAP90EgdxFgS1MNEpip8ViNpAOQ1t5ODnf13yvBhSJ87yTwD/W2WHO1JhMsym rs/FdLqAmGCaIVG4rntDh6YMtk3p6gc= =VrGj -----END PGP SIGNATURE----- --=-CGluF/KiYEHV7bilRPFN--