[PATCH 0/5] pwm: Use regmap_clear_bits and regmap_set_bits where applicable

[PATCH 0/5] pwm: Use regmap_clear_bits and regmap_set_bits where applicable

[Uwe Kleine-König]

Hello,

I recently learned a bit of coccinelle and triggered by Paul Cercueil's
patch that replaces regmap_update_bits() by regmap_set_bits() and
regmap_clear_bits() where applicable in the jz4740 pwm driver[1] I
created a cocci patch for such calls.

This series adapts the other drivers below drivers/pwm accordingly.

Best regards
Uwe

[1] https://lore.kernel.org/linux-pwm/20221024205213.327001-6-paul@crapouillou.net

Uwe Kleine-König (5):
  pwm: fsl-ftm: Use regmap_clear_bits and regmap_set_bits where
    applicable
  pwm: img: Use regmap_clear_bits and regmap_set_bits where applicable
  pwm: iqs620a: Use regmap_clear_bits and regmap_set_bits where
    applicable
  pwm: stm32-lp: Use regmap_clear_bits and regmap_set_bits where
    applicable
  pwm: stm32: Use regmap_clear_bits and regmap_set_bits where applicable

 drivers/pwm/pwm-fsl-ftm.c  | 18 +++++++-----------
 drivers/pwm/pwm-img.c      | 15 +++++++--------
 drivers/pwm/pwm-iqs620a.c  |  4 ++--
 drivers/pwm/pwm-stm32-lp.c |  5 ++---
 drivers/pwm/pwm-stm32.c    | 34 ++++++++++++++++------------------
 5 files changed, 34 insertions(+), 42 deletions(-)


base-commit: 094226ad94f471a9f19e8f8e7140a09c2625abaa
-- 
2.38.1


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[PATCH 4/5] pwm: stm32-lp: Use regmap_clear_bits and regmap_set_bits where applicable

[Uwe Kleine-König]

Found using coccinelle and the following semantic patch:

@@
expression map, reg, bits;
@@

- regmap_update_bits(map, reg, bits, bits)
+ regmap_set_bits(map, reg, bits)

@@
expression map, reg, bits;
@@

- regmap_update_bits(map, reg, bits, 0)
+ regmap_clear_bits(map, reg, bits)

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
 drivers/pwm/pwm-stm32-lp.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c
index 3115abb3f52a..212bdc7d51ee 100644
--- a/drivers/pwm/pwm-stm32-lp.c
+++ b/drivers/pwm/pwm-stm32-lp.c
@@ -140,9 +140,8 @@ static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm,
 
 	if (reenable) {
 		/* Start LP timer in continuous mode */
-		ret = regmap_update_bits(priv->regmap, STM32_LPTIM_CR,
-					 STM32_LPTIM_CNTSTRT,
-					 STM32_LPTIM_CNTSTRT);
+		ret = regmap_set_bits(priv->regmap, STM32_LPTIM_CR,
+				      STM32_LPTIM_CNTSTRT);
 		if (ret) {
 			regmap_write(priv->regmap, STM32_LPTIM_CR, 0);
 			goto err;
-- 
2.38.1


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[PATCH 5/5] pwm: stm32: Use regmap_clear_bits and regmap_set_bits where applicable

[Uwe Kleine-König]

Found using coccinelle and the following semantic patch:

@@
expression map, reg, bits;
@@

- regmap_update_bits(map, reg, bits, bits)
+ regmap_set_bits(map, reg, bits)

@@
expression map, reg, bits;
@@

- regmap_update_bits(map, reg, bits, 0)
+ regmap_clear_bits(map, reg, bits)

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
 drivers/pwm/pwm-stm32.c | 34 ++++++++++++++++------------------
 1 file changed, 16 insertions(+), 18 deletions(-)

diff --git a/drivers/pwm/pwm-stm32.c b/drivers/pwm/pwm-stm32.c
index 794ca5b02968..21e4a34dfff3 100644
--- a/drivers/pwm/pwm-stm32.c
+++ b/drivers/pwm/pwm-stm32.c
@@ -115,14 +115,14 @@ static int stm32_pwm_raw_capture(struct stm32_pwm *priv, struct pwm_device *pwm,
 	int ret;
 
 	/* Ensure registers have been updated, enable counter and capture */
-	regmap_update_bits(priv->regmap, TIM_EGR, TIM_EGR_UG, TIM_EGR_UG);
-	regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, TIM_CR1_CEN);
+	regmap_set_bits(priv->regmap, TIM_EGR, TIM_EGR_UG);
+	regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
 
 	/* Use cc1 or cc3 DMA resp for PWM input channels 1 & 2 or 3 & 4 */
 	dma_id = pwm->hwpwm < 2 ? STM32_TIMERS_DMA_CH1 : STM32_TIMERS_DMA_CH3;
 	ccen = pwm->hwpwm < 2 ? TIM_CCER_CC12E : TIM_CCER_CC34E;
 	ccr = pwm->hwpwm < 2 ? TIM_CCR1 : TIM_CCR3;
-	regmap_update_bits(priv->regmap, TIM_CCER, ccen, ccen);
+	regmap_set_bits(priv->regmap, TIM_CCER, ccen);
 
 	/*
 	 * Timer DMA burst mode. Request 2 registers, 2 bursts, to get both
@@ -160,8 +160,8 @@ static int stm32_pwm_raw_capture(struct stm32_pwm *priv, struct pwm_device *pwm,
 	}
 
 stop:
-	regmap_update_bits(priv->regmap, TIM_CCER, ccen, 0);
-	regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0);
+	regmap_clear_bits(priv->regmap, TIM_CCER, ccen);
+	regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
 
 	return ret;
 }
@@ -359,7 +359,7 @@ static int stm32_pwm_config(struct stm32_pwm *priv, int ch,
 
 	regmap_write(priv->regmap, TIM_PSC, prescaler);
 	regmap_write(priv->regmap, TIM_ARR, prd - 1);
-	regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, TIM_CR1_ARPE);
+	regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE);
 
 	/* Calculate the duty cycles */
 	dty = prd * duty_ns;
@@ -377,7 +377,7 @@ static int stm32_pwm_config(struct stm32_pwm *priv, int ch,
 	else
 		regmap_update_bits(priv->regmap, TIM_CCMR2, mask, ccmr);
 
-	regmap_update_bits(priv->regmap, TIM_BDTR, TIM_BDTR_MOE, TIM_BDTR_MOE);
+	regmap_set_bits(priv->regmap, TIM_BDTR, TIM_BDTR_MOE);
 
 	return 0;
 }
@@ -411,13 +411,13 @@ static int stm32_pwm_enable(struct stm32_pwm *priv, int ch)
 	if (priv->have_complementary_output)
 		mask |= TIM_CCER_CC1NE << (ch * 4);
 
-	regmap_update_bits(priv->regmap, TIM_CCER, mask, mask);
+	regmap_set_bits(priv->regmap, TIM_CCER, mask);
 
 	/* Make sure that registers are updated */
-	regmap_update_bits(priv->regmap, TIM_EGR, TIM_EGR_UG, TIM_EGR_UG);
+	regmap_set_bits(priv->regmap, TIM_EGR, TIM_EGR_UG);
 
 	/* Enable controller */
-	regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, TIM_CR1_CEN);
+	regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
 
 	return 0;
 }
@@ -431,11 +431,11 @@ static void stm32_pwm_disable(struct stm32_pwm *priv, int ch)
 	if (priv->have_complementary_output)
 		mask |= TIM_CCER_CC1NE << (ch * 4);
 
-	regmap_update_bits(priv->regmap, TIM_CCER, mask, 0);
+	regmap_clear_bits(priv->regmap, TIM_CCER, mask);
 
 	/* When all channels are disabled, we can disable the controller */
 	if (!active_channels(priv))
-		regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0);
+		regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
 
 	clk_disable(priv->clk);
 }
@@ -568,10 +568,9 @@ static void stm32_pwm_detect_complementary(struct stm32_pwm *priv)
 	 * If complementary bit doesn't exist writing 1 will have no
 	 * effect so we can detect it.
 	 */
-	regmap_update_bits(priv->regmap,
-			   TIM_CCER, TIM_CCER_CC1NE, TIM_CCER_CC1NE);
+	regmap_set_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE);
 	regmap_read(priv->regmap, TIM_CCER, &ccer);
-	regmap_update_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE, 0);
+	regmap_clear_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE);
 
 	priv->have_complementary_output = (ccer != 0);
 }
@@ -585,10 +584,9 @@ static int stm32_pwm_detect_channels(struct stm32_pwm *priv)
 	 * If channels enable bits don't exist writing 1 will have no
 	 * effect so we can detect and count them.
 	 */
-	regmap_update_bits(priv->regmap,
-			   TIM_CCER, TIM_CCER_CCXE, TIM_CCER_CCXE);
+	regmap_set_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE);
 	regmap_read(priv->regmap, TIM_CCER, &ccer);
-	regmap_update_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE, 0);
+	regmap_clear_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE);
 
 	if (ccer & TIM_CCER_CC1E)
 		npwm++;
-- 
2.38.1


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Re: [PATCH 0/5] pwm: Use regmap_clear_bits and regmap_set_bits where applicable

[Uwe Kleine-König]

[-- Attachment #1.1: Type: text/plain, Size: 2020 bytes --]

Hello,

On Tue, Nov 15, 2022 at 12:13:42PM +0100, Uwe Kleine-König wrote:
> I recently learned a bit of coccinelle and triggered by Paul Cercueil's
> patch that replaces regmap_update_bits() by regmap_set_bits() and
> regmap_clear_bits() where applicable in the jz4740 pwm driver[1] I
> created a cocci patch for such calls.

Pointing to this series I asked broonie in irc if a conversion like that
would be suitable to do in the complete tree. He objected that doing
that mechanically is probably wrong. His explicit concern was that a
call to regmap_clear_bits() (or regmap_set_bits()) in a series of
regmap_update_bits() is more disturbing than helpful.

So I looked at the remaining calls to regmap_update_bits() in the
drivers I converted in this series:

 - pwm-fsl-ftm
   There are two calls left that set bits in a mask (these should stay
   as they are) and one:

        reg_polarity = 0;
        if (newstate->polarity == PWM_POLARITY_INVERSED)
                reg_polarity = BIT(pwm->hwpwm);

        regmap_update_bits(fpc->regmap, FTM_POL, BIT(pwm->hwpwm), reg_polarity);

   which could benefit from a conversion (though I expect that to be
   controversial).
   The converted calls are all independent of the remaining
   regmap_update_bits().

 - pwm-img
   No regmap_update_bits() calls left.

 - pwm-iqs620a
   There is one call left that does:

        return regmap_update_bits(iqs62x->regmap, IQS620_PWR_SETTINGS,
                                  IQS620_PWR_SETTINGS_PWM_OUT, 0xff);

   I think this is a bug because IQS620_PWR_SETTINGS_PWM_OUT is only
   0xf.

 - pwm-stm32-lp
   No regmap_update_bits() calls left.

 - pwm-stm32
   There are several calls left, some of them also near converted calls.
   My personal opinion is, that the conversion is fine anyhow.

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-König            |
Industrial Linux Solutions                 | https://www.pengutronix.de/ |

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Re: [PATCH 4/5] pwm: stm32-lp: Use regmap_clear_bits and regmap_set_bits where applicable

[Fabrice Gasnier]

On 11/15/22 12:13, Uwe Kleine-König wrote:
> Found using coccinelle and the following semantic patch:
> 
> @@
> expression map, reg, bits;
> @@
> 
> - regmap_update_bits(map, reg, bits, bits)
> + regmap_set_bits(map, reg, bits)
> 
> @@
> expression map, reg, bits;
> @@
> 
> - regmap_update_bits(map, reg, bits, 0)
> + regmap_clear_bits(map, reg, bits)
> 
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> ---
>  drivers/pwm/pwm-stm32-lp.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c
> index 3115abb3f52a..212bdc7d51ee 100644
> --- a/drivers/pwm/pwm-stm32-lp.c
> +++ b/drivers/pwm/pwm-stm32-lp.c
> @@ -140,9 +140,8 @@ static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm,
>  
>  	if (reenable) {
>  		/* Start LP timer in continuous mode */
> -		ret = regmap_update_bits(priv->regmap, STM32_LPTIM_CR,
> -					 STM32_LPTIM_CNTSTRT,
> -					 STM32_LPTIM_CNTSTRT);
> +		ret = regmap_set_bits(priv->regmap, STM32_LPTIM_CR,
> +				      STM32_LPTIM_CNTSTRT);

Hi Uwe,

One minor suggestion here: could fit into a single line.

You can add my:
Tested-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>

Best Regards,
Thanks
Fabrice

>  		if (ret) {
>  			regmap_write(priv->regmap, STM32_LPTIM_CR, 0);
>  			goto err;

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Re: [PATCH 5/5] pwm: stm32: Use regmap_clear_bits and regmap_set_bits where applicable

[Fabrice Gasnier]

On 11/15/22 12:13, Uwe Kleine-König wrote:
> Found using coccinelle and the following semantic patch:
> 
> @@
> expression map, reg, bits;
> @@
> 
> - regmap_update_bits(map, reg, bits, bits)
> + regmap_set_bits(map, reg, bits)
> 
> @@
> expression map, reg, bits;
> @@
> 
> - regmap_update_bits(map, reg, bits, 0)
> + regmap_clear_bits(map, reg, bits)
> 
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> ---
>  drivers/pwm/pwm-stm32.c | 34 ++++++++++++++++------------------
>  1 file changed, 16 insertions(+), 18 deletions(-)

Hi Uwe,

You can add my:
Tested-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>

Best Regards,
Thanks
Fabrice

> 
> diff --git a/drivers/pwm/pwm-stm32.c b/drivers/pwm/pwm-stm32.c
> index 794ca5b02968..21e4a34dfff3 100644
> --- a/drivers/pwm/pwm-stm32.c
> +++ b/drivers/pwm/pwm-stm32.c
> @@ -115,14 +115,14 @@ static int stm32_pwm_raw_capture(struct stm32_pwm *priv, struct pwm_device *pwm,
>  	int ret;
>  
>  	/* Ensure registers have been updated, enable counter and capture */
> -	regmap_update_bits(priv->regmap, TIM_EGR, TIM_EGR_UG, TIM_EGR_UG);
> -	regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, TIM_CR1_CEN);
> +	regmap_set_bits(priv->regmap, TIM_EGR, TIM_EGR_UG);
> +	regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
>  
>  	/* Use cc1 or cc3 DMA resp for PWM input channels 1 & 2 or 3 & 4 */
>  	dma_id = pwm->hwpwm < 2 ? STM32_TIMERS_DMA_CH1 : STM32_TIMERS_DMA_CH3;
>  	ccen = pwm->hwpwm < 2 ? TIM_CCER_CC12E : TIM_CCER_CC34E;
>  	ccr = pwm->hwpwm < 2 ? TIM_CCR1 : TIM_CCR3;
> -	regmap_update_bits(priv->regmap, TIM_CCER, ccen, ccen);
> +	regmap_set_bits(priv->regmap, TIM_CCER, ccen);
>  
>  	/*
>  	 * Timer DMA burst mode. Request 2 registers, 2 bursts, to get both
> @@ -160,8 +160,8 @@ static int stm32_pwm_raw_capture(struct stm32_pwm *priv, struct pwm_device *pwm,
>  	}
>  
>  stop:
> -	regmap_update_bits(priv->regmap, TIM_CCER, ccen, 0);
> -	regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0);
> +	regmap_clear_bits(priv->regmap, TIM_CCER, ccen);
> +	regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
>  
>  	return ret;
>  }
> @@ -359,7 +359,7 @@ static int stm32_pwm_config(struct stm32_pwm *priv, int ch,
>  
>  	regmap_write(priv->regmap, TIM_PSC, prescaler);
>  	regmap_write(priv->regmap, TIM_ARR, prd - 1);
> -	regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, TIM_CR1_ARPE);
> +	regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE);
>  
>  	/* Calculate the duty cycles */
>  	dty = prd * duty_ns;
> @@ -377,7 +377,7 @@ static int stm32_pwm_config(struct stm32_pwm *priv, int ch,
>  	else
>  		regmap_update_bits(priv->regmap, TIM_CCMR2, mask, ccmr);
>  
> -	regmap_update_bits(priv->regmap, TIM_BDTR, TIM_BDTR_MOE, TIM_BDTR_MOE);
> +	regmap_set_bits(priv->regmap, TIM_BDTR, TIM_BDTR_MOE);
>  
>  	return 0;
>  }
> @@ -411,13 +411,13 @@ static int stm32_pwm_enable(struct stm32_pwm *priv, int ch)
>  	if (priv->have_complementary_output)
>  		mask |= TIM_CCER_CC1NE << (ch * 4);
>  
> -	regmap_update_bits(priv->regmap, TIM_CCER, mask, mask);
> +	regmap_set_bits(priv->regmap, TIM_CCER, mask);
>  
>  	/* Make sure that registers are updated */
> -	regmap_update_bits(priv->regmap, TIM_EGR, TIM_EGR_UG, TIM_EGR_UG);
> +	regmap_set_bits(priv->regmap, TIM_EGR, TIM_EGR_UG);
>  
>  	/* Enable controller */
> -	regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, TIM_CR1_CEN);
> +	regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
>  
>  	return 0;
>  }
> @@ -431,11 +431,11 @@ static void stm32_pwm_disable(struct stm32_pwm *priv, int ch)
>  	if (priv->have_complementary_output)
>  		mask |= TIM_CCER_CC1NE << (ch * 4);
>  
> -	regmap_update_bits(priv->regmap, TIM_CCER, mask, 0);
> +	regmap_clear_bits(priv->regmap, TIM_CCER, mask);
>  
>  	/* When all channels are disabled, we can disable the controller */
>  	if (!active_channels(priv))
> -		regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0);
> +		regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
>  
>  	clk_disable(priv->clk);
>  }
> @@ -568,10 +568,9 @@ static void stm32_pwm_detect_complementary(struct stm32_pwm *priv)
>  	 * If complementary bit doesn't exist writing 1 will have no
>  	 * effect so we can detect it.
>  	 */
> -	regmap_update_bits(priv->regmap,
> -			   TIM_CCER, TIM_CCER_CC1NE, TIM_CCER_CC1NE);
> +	regmap_set_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE);
>  	regmap_read(priv->regmap, TIM_CCER, &ccer);
> -	regmap_update_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE, 0);
> +	regmap_clear_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE);
>  
>  	priv->have_complementary_output = (ccer != 0);
>  }
> @@ -585,10 +584,9 @@ static int stm32_pwm_detect_channels(struct stm32_pwm *priv)
>  	 * If channels enable bits don't exist writing 1 will have no
>  	 * effect so we can detect and count them.
>  	 */
> -	regmap_update_bits(priv->regmap,
> -			   TIM_CCER, TIM_CCER_CCXE, TIM_CCER_CCXE);
> +	regmap_set_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE);
>  	regmap_read(priv->regmap, TIM_CCER, &ccer);
> -	regmap_update_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE, 0);
> +	regmap_clear_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE);
>  
>  	if (ccer & TIM_CCER_CC1E)
>  		npwm++;

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Re: [PATCH 4/5] pwm: stm32-lp: Use regmap_clear_bits and regmap_set_bits where applicable

[Uwe Kleine-König]

[-- Attachment #1.1: Type: text/plain, Size: 1671 bytes --]

On Wed, Nov 23, 2022 at 11:23:14AM +0100, Fabrice Gasnier wrote:
> On 11/15/22 12:13, Uwe Kleine-König wrote:
> > Found using coccinelle and the following semantic patch:
> > 
> > @@
> > expression map, reg, bits;
> > @@
> > 
> > - regmap_update_bits(map, reg, bits, bits)
> > + regmap_set_bits(map, reg, bits)
> > 
> > @@
> > expression map, reg, bits;
> > @@
> > 
> > - regmap_update_bits(map, reg, bits, 0)
> > + regmap_clear_bits(map, reg, bits)
> > 
> > Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> > ---
> >  drivers/pwm/pwm-stm32-lp.c | 5 ++---
> >  1 file changed, 2 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c
> > index 3115abb3f52a..212bdc7d51ee 100644
> > --- a/drivers/pwm/pwm-stm32-lp.c
> > +++ b/drivers/pwm/pwm-stm32-lp.c
> > @@ -140,9 +140,8 @@ static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm,
> >  
> >  	if (reenable) {
> >  		/* Start LP timer in continuous mode */
> > -		ret = regmap_update_bits(priv->regmap, STM32_LPTIM_CR,
> > -					 STM32_LPTIM_CNTSTRT,
> > -					 STM32_LPTIM_CNTSTRT);
> > +		ret = regmap_set_bits(priv->regmap, STM32_LPTIM_CR,
> > +				      STM32_LPTIM_CNTSTRT);
> 
> Hi Uwe,
> 
> One minor suggestion here: could fit into a single line.

That would make the line 89 chars long (counting tag as usual as 8). Up
to now there is no line longer than 78 chars. So I'd not join the two
lines.

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-König            |
Industrial Linux Solutions                 | https://www.pengutronix.de/ |

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