Re: [PATCH 1/1] arm64: dts: freescale: Add PWM fan support

[Alexander Stein <alexander.stein@ew.tq-group.com>]

Am Samstag, 29. Oktober 2022, 06:01:53 CET schrieb Shawn Guo:
> On Tue, Oct 18, 2022 at 11:33:41AM +0200, Alexander Stein wrote:
> > This adds the support for optional PWM fan 422J/2HP.
> > 
> > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> 
> Board name should be specified in the patch subject to tell this is a
> board specific change, maybe something like `arm64: dts: mba8mpxl: ...`?

Yes, you are right. Will fix that. Thanks
Alexander

> Shawn
> 
> > ---
> > Now with inverted polarity support for pwm-fan in place, add PWM fan DT
> > nodes for TQMa8MPQL + MBa8MPxL. As this is optional, it's disabled by
> > default. This is based on next-20221018.
> > 
> > Note: This device needs 'pwm1_enable' set to 3. E.g. using udev rule:
> > SUBSYSTEM=="hwmon", DRIVERS=="pwm-fan", ATTR{pwm1_enable}="3"
> > 
> >  .../freescale/imx8mp-tqma8mpql-mba8mpxl.dts   | 76 +++++++++++++++++++
> >  1 file changed, 76 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts
> > b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts index
> > 7a32379cd006..ffd117f17bbe 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts
> > @@ -55,6 +55,21 @@ clk_xtal25: clk-xtal25 {
> > 
> >  		clock-frequency = <25000000>;
> >  	
> >  	};
> > 
> > +	fan0: pwm-fan {
> > +		compatible = "pwm-fan";
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_pwmfan>;
> > +		fan-supply = <&reg_pwm_fan>;
> > +		#cooling-cells = <2>;
> > +		/* typical 25 kHz -> 40.000 nsec */
> > +		pwms = <&pwm3 0 40000 PWM_POLARITY_INVERTED>;
> > +		cooling-levels = <0 32 64 128 196 240>;
> > +		pulses-per-revolution = <2>;
> > +		interrupt-parent = <&gpio5>;
> > +		interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
> > +		status = "disabled";
> > +	};
> > +
> > 
> >  	gpio-keys {
> >  	
> >  		compatible = "gpio-keys";
> >  		pinctrl-names = "default";
> > 
> > @@ -115,6 +130,18 @@ display: display {
> > 
> >  		status = "disabled";
> >  	
> >  	};
> > 
> > +	reg_pwm_fan: regulator-pwm-fan {
> > +		compatible = "regulator-fixed";
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_regpwmfan>;
> > +		regulator-name = "FAN_PWR";
> > +		regulator-min-microvolt = <12000000>;
> > +		regulator-max-microvolt = <12000000>;
> > +		gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>;
> > +		enable-active-high;
> > +		vin-supply = <&reg_vcc_12v0>;
> > +	};
> > +
> > 
> >  	reg_usdhc2_vmmc: regulator-usdhc2 {
> >  	
> >  		compatible = "regulator-fixed";
> >  		pinctrl-names = "default";
> > 
> > @@ -172,6 +199,47 @@ linux,cma {
> > 
> >  			linux,cma-default;
> >  		
> >  		};
> >  	
> >  	};
> > 
> > +
> > +	thermal-zones {
> > +		soc-thermal {
> > +			trips {
> > +				soc_active0: trip-active0 {
> > +					temperature = <40000>;
> > +					hysteresis = <5000>;
> > +					type = "active";
> > +				};
> > +
> > +				soc_active1: trip-active1 {
> > +					temperature = <48000>;
> > +					hysteresis = <3000>;
> > +					type = "active";
> > +				};
> > +
> > +				soc_active2: trip-active2 {
> > +					temperature = <60000>;
> > +					hysteresis = <10000>;
> > +					type = "active";
> > +				};
> > +			};
> > +
> > +			cooling-maps {
> > +				map1 {
> > +					trip = <&soc_active0>;
> > +					cooling-device = <&fan0 1 
1>;
> > +				};
> > +
> > +				map2 {
> > +					trip = <&soc_active1>;
> > +					cooling-device = <&fan0 2 
2>;
> > +				};
> > +
> > +				map3 {
> > +					trip = <&soc_active2>;
> > +					cooling-device = <&fan0 3 
3>;
> > +				};
> > +			};
> > +		};
> > +	};
> > 
> >  };
> >  
> >  &ecspi1 {
> > 
> > @@ -725,10 +793,18 @@ pinctrl_pwm3: pwm3grp {
> > 
> >  		fsl,pins = <MX8MP_IOMUXC_I2C3_SDA__PWM3_OUT		
0x14>;
> >  	
> >  	};
> > 
> > +	pinctrl_pwmfan: pwmfangrp {
> > +		fsl,pins = <MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18		
0x80>; /* FAN RPM */
> > +	};
> > +
> > 
> >  	pinctrl_reg12v0: reg12v0grp {
> >  	
> >  		fsl,pins = <MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06		
0x140>; /* VCC12V
> >  		enable */
> >  	
> >  	};
> > 
> > +	pinctrl_regpwmfan: regpwmfangrp {
> > +		fsl,pins = <MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27		
0x80>;
> > +	};
> > +
> > 
> >  	/* X61 */
> >  	pinctrl_uart1: uart1grp {
> >  	
> >  		fsl,pins = <MX8MP_IOMUXC_SD1_CLK__UART1_DCE_TX		
0x140>,





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