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From: zl020895  <zl020895@163.com>
To: "Andy Shevchenko" <andriy.shevchenko@linux.intel.com>
Cc: longzhao@ambarella.com, "Arnd Bergmann" <arnd@arndb.de>,
	"Krzysztof Kozlowski" <krzk@kernel.org>,
	"Alexandre Belloni" <alexandre.belloni@bootlin.com>,
	soc@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Michael Turquette" <mturquette@baylibre.com>,
	"Stephen Boyd" <sboyd@kernel.org>,
	"Linus Walleij" <linusw@kernel.org>,
	"Bartosz Golaszewski" <brgl@kernel.org>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Jiri Slaby" <jirislaby@kernel.org>,
	"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
	"Catalin Marinas" <catalin.marinas@arm.com>,
	"Will Deacon" <will@kernel.org>, "Lee Jones" <lee@kernel.org>,
	mfd@lists.linux.dev, devicetree@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org,
	linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re:Re: [PATCH v6 11/13] serial: 8250_dw: add Ambarella CV75 quirks
Date: Thu, 10 Sep 2026 17:12:52 +0800 (CST)	[thread overview]
Message-ID: <122573f8.8232.1a08a9765fc.Coremail.zl020895@163.com> (raw)
In-Reply-To: <aqJrSnr0rwv4BOJ3@ashevche-desk.local>

Hi Andy,
Thanks for the Reviewed-by.

> Wondering if we should undo this in the port's .shutdown() callback.
I saw the shutdown path already covers it: dw8250_shutdown() calls
serial8250_do_shutdown(), which does
	up->ier = 0;
	serial_port_out(port, UART_IER, 0);
so both the IER shadow and hardware IER are cleared, including ETOI.

Best regards,
Long Zhao

At 2026-09-10 16:33:14, "Andy Shevchenko" <andriy.shevchenko@linux.intel.com> wrote:
>On Fri, Sep 04, 2026 at 02:38:18PM +0800, Long Zhao via B4 Relay wrote:
>
>> The Ambarella CV75 UART is Ambarella IP, not a Synopsys DesignWare
>> licensed block. At the register level it is close enough to DW APB UART
>> that a full custom UART driver is unnecessary: reuse 8250_dw with a
>> small platform quirk.
>> 
>> Quirks:
>> - keep IER ETOI (bit 5) set for RX timeout behaviour
>> - skip set_rate; baud clock is managed outside the UART block
>
>Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
>
>...
>
>> +static int dw8250_ier_mask_startup(struct uart_port *p)
>> +{
>> +	struct dw8250_data *d = to_dw8250_data(p->private_data);
>> +	struct uart_8250_port *up = up_to_u8250p(p);
>> +	int ret;
>> +
>> +	ret = serial8250_do_startup(p);
>> +	if (ret)
>> +		return ret;
>> +
>> +	/*
>> +	 * Ambarella keeps variant IER bits (e.g. ETOI) set for correct RX
>> +	 * timeout behaviour. Force them into the 8250 IER shadow so later
>> +	 * generic IER updates do not clear them.
>> +	 */
>
>Wondering if we should undo this in the port's .shutdown() callback.
>
>> +	up->ier |= d->pdata->ier_mask;
>> +	serial_port_out(p, UART_IER, up->ier);
>> +
>> +	return 0;
>> +}
>
>-- 
>With Best Regards,
>Andy Shevchenko
>

  reply	other threads:[~2026-09-10  9:14 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-04  6:38 [PATCH v6 00/13] Ambarella CV75 SoC minimal bring-up Long Zhao via B4 Relay
2026-09-04  6:38 ` [PATCH v6 01/13] dt-bindings: arm: add Ambarella CV75 platforms Long Zhao via B4 Relay
2026-09-04 22:39   ` Linus Walleij
2026-09-04  6:38 ` [PATCH v6 02/13] dt-bindings: mfd: syscon: add Ambarella CV75 secure scratchpad Long Zhao via B4 Relay
2026-09-08  9:52   ` Krzysztof Kozlowski
2026-09-04  6:38 ` [PATCH v6 03/13] dt-bindings: clock: add Ambarella CV75 RCT Long Zhao via B4 Relay
2026-09-08  9:52   ` Krzysztof Kozlowski
2026-09-04  6:38 ` [PATCH v6 04/13] dt-bindings: pinctrl: add Ambarella CV75 pinctrl Long Zhao via B4 Relay
2026-09-04 22:40   ` Linus Walleij
2026-09-04  6:38 ` [PATCH v6 05/13] dt-bindings: gpio: pl061: add Ambarella CV75 variant Long Zhao via B4 Relay
2026-09-04 14:45   ` Rob Herring
2026-09-04  6:38 ` [PATCH v6 06/13] dt-bindings: serial: snps-dw-apb-uart: add ambarella,cv75-uart Long Zhao via B4 Relay
2026-09-04 22:41   ` Linus Walleij
2026-09-09  7:12   ` Krzysztof Kozlowski
2026-09-04  6:38 ` [PATCH v6 07/13] clk: ambarella: add CV75 CCU driver Long Zhao via B4 Relay
2026-09-04  7:44   ` Jerome Brunet
2026-09-04  9:21     ` zl020895
2026-09-04  6:38 ` [PATCH v6 08/13] gpio: regmap: support write_data_after_dir and girq Long Zhao via B4 Relay
2026-09-04 11:55   ` Andy Shevchenko
2026-09-07  4:20     ` zl020895
2026-09-07  4:45       ` Andy Shevchenko
2026-09-07 10:29         ` zl020895
2026-09-10  9:30           ` Andy Shevchenko
2026-09-04  6:38 ` [PATCH v6 09/13] gpio: pl061: use gpio-regmap and add Ambarella layout Long Zhao via B4 Relay
2026-09-04 13:14   ` Andy Shevchenko
2026-09-04  6:38 ` [PATCH v6 10/13] pinctrl: ambarella: add CV75 pin controller Long Zhao via B4 Relay
2026-09-04 13:29   ` Andy Shevchenko
2026-09-04  6:38 ` [PATCH v6 11/13] serial: 8250_dw: add Ambarella CV75 quirks Long Zhao via B4 Relay
2026-09-04 22:43   ` Linus Walleij
2026-09-10  8:33   ` Andy Shevchenko
2026-09-10  9:12     ` zl020895 [this message]
2026-09-10  9:27       ` Andy Shevchenko
2026-09-10  9:33         ` Ilpo Järvinen
2026-09-10  9:45           ` zl020895
2026-09-10 15:39             ` Andy Shevchenko
2026-09-10  8:44   ` Ilpo Järvinen
2026-09-10  9:15     ` zl020895
2026-09-04  6:38 ` [PATCH v6 12/13] arm64: ambarella: add ARCH_AMBARELLA and CV75 EVK DT Long Zhao via B4 Relay
2026-09-04 22:45   ` Linus Walleij
2026-09-04  6:38 ` [PATCH v6 13/13] MAINTAINERS: add ARM/AMBARELLA SoC support Long Zhao via B4 Relay
2026-09-04 22:45   ` Linus Walleij
2026-09-04  6:54 ` [PATCH v6 00/13] Ambarella CV75 SoC minimal bring-up Jerome Brunet
2026-09-04  6:56   ` Krzysztof Kozlowski
2026-09-11 12:55     ` Jerome Brunet
2026-09-11 12:57       ` Krzysztof Kozlowski

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