From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76535C433F5 for ; Wed, 8 Sep 2021 08:49:36 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 45F826115C for ; Wed, 8 Sep 2021 08:49:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 45F826115C Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Date:Cc:To:From:Subject:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=3KeWruUjE5neMrtevGlbACkcYIyt8dxbMT7h4q9kSzw=; b=lMT1/k1qq9b/rT PRo+UoIyGGfILNEHRACC8XQAoKl+Edi1O8dYw+4hYFavycRkGnWu0JiXfhJIuU2wYTYshKphHn+lh 8pMzdV88pDCMy9O+6vjwiFHwbQWQQp7Bhdt1yQAGBt+Li9r2jAt1iZaPmkCvGXX/YCGVZuq7VaIi+ u8p+F6t/P2mz6TQsGbsdGR8/Wbw/Ilxbc8RVT3RcvT3kWA3o9K4mSF2bTIQADlWDujZeecXkXo8Du 5ueaCemN+UxLKNi3HGjO0PSuepVEWb8k4TJfuMHqWA0X59adnMQJs0Q0SFQiYfflrv8/p9+/BfGVB +CTWK2R2Hqq34eoCGj5A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mNtFE-006CqV-M3; Wed, 08 Sep 2021 08:47:48 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mNtFA-006Cpb-RE for linux-arm-kernel@lists.infradead.org; Wed, 08 Sep 2021 08:47:46 +0000 Received: from gallifrey.ext.pengutronix.de ([2001:67c:670:201:5054:ff:fe8d:eefb] helo=[IPv6:::1]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1mNtF6-0007Wo-8D; Wed, 08 Sep 2021 10:47:40 +0200 Message-ID: <125bd22edb69ce38a18bcc80c6507da28e8eb185.camel@pengutronix.de> Subject: Re: [PATCH 1/3] PCI: imx: encapsulate the clock enable into one standalone function From: Lucas Stach To: Richard Zhu , bhelgaas@google.com, lorenzo.pieralisi@arm.com Cc: linux-pci@vger.kernel.org, linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de Date: Wed, 08 Sep 2021 10:47:39 +0200 In-Reply-To: <1631084366-24785-1-git-send-email-hongxing.zhu@nxp.com> References: <1631084366-24785-1-git-send-email-hongxing.zhu@nxp.com> User-Agent: Evolution 3.40.4 (3.40.4-1.fc34) MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:201:5054:ff:fe8d:eefb X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210908_014744_933421_F845C250 X-CRM114-Status: GOOD ( 24.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Am Mittwoch, dem 08.09.2021 um 14:59 +0800 schrieb Richard Zhu: > No function changes, just encapsulate the i.MX PCIe clocks enable > operations into one standalone function > > Signed-off-by: Richard Zhu > --- > drivers/pci/controller/dwc/pci-imx6.c | 82 +++++++++++++++++---------- > 1 file changed, 51 insertions(+), 31 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c > index 80fc98acf097..0264432e4c4a 100644 > --- a/drivers/pci/controller/dwc/pci-imx6.c > +++ b/drivers/pci/controller/dwc/pci-imx6.c > @@ -143,6 +143,8 @@ struct imx6_pcie { > #define PHY_RX_OVRD_IN_LO_RX_DATA_EN BIT(5) > #define PHY_RX_OVRD_IN_LO_RX_PLL_EN BIT(3) > > +static int imx6_pcie_clk_enable(struct imx6_pcie *imx6_pcie); > + I don't think this is strictly needed. Can you just move the placement of the new imx6_pcie_clk_enable function in the file, such that we can avoid the forward declaration? > static int pcie_phy_poll_ack(struct imx6_pcie *imx6_pcie, bool exp_val) > { > struct dw_pcie *pci = imx6_pcie->pci; > @@ -498,33 +500,12 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) > } > } > > - ret = clk_prepare_enable(imx6_pcie->pcie_phy); > - if (ret) { > - dev_err(dev, "unable to enable pcie_phy clock\n"); > - goto err_pcie_phy; > - } > - > - ret = clk_prepare_enable(imx6_pcie->pcie_bus); > + ret = imx6_pcie_clk_enable(imx6_pcie); > if (ret) { > - dev_err(dev, "unable to enable pcie_bus clock\n"); > - goto err_pcie_bus; > + dev_err(dev, "unable to enable pcie clocks\n"); > + goto err_clks; > } > > - ret = clk_prepare_enable(imx6_pcie->pcie); > - if (ret) { > - dev_err(dev, "unable to enable pcie clock\n"); > - goto err_pcie; > - } > - > - ret = imx6_pcie_enable_ref_clk(imx6_pcie); > - if (ret) { > - dev_err(dev, "unable to enable pcie ref clock\n"); > - goto err_ref_clk; > - } > - > - /* allow the clocks to stabilize */ > - usleep_range(200, 500); > - > /* Some boards don't have PCIe reset GPIO. */ > if (gpio_is_valid(imx6_pcie->reset_gpio)) { > gpio_set_value_cansleep(imx6_pcie->reset_gpio, > @@ -578,13 +559,7 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) > > return; > > -err_ref_clk: > - clk_disable_unprepare(imx6_pcie->pcie); > -err_pcie: > - clk_disable_unprepare(imx6_pcie->pcie_bus); > -err_pcie_bus: > - clk_disable_unprepare(imx6_pcie->pcie_phy); > -err_pcie_phy: > +err_clks: > if (imx6_pcie->vpcie && regulator_is_enabled(imx6_pcie->vpcie) > 0) { > ret = regulator_disable(imx6_pcie->vpcie); > if (ret) > @@ -914,6 +889,51 @@ static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie) > usleep_range(1000, 10000); > } > > +static int imx6_pcie_clk_enable(struct imx6_pcie *imx6_pcie) > +{ > + struct dw_pcie *pci = imx6_pcie->pci; > + struct device *dev = pci->dev; > + int ret; > + > + ret = clk_prepare_enable(imx6_pcie->pcie_phy); > + if (ret) { > + dev_err(dev, "unable to enable pcie_phy clock\n"); > + return ret; > + } > + > + ret = clk_prepare_enable(imx6_pcie->pcie_bus); > + if (ret) { > + dev_err(dev, "unable to enable pcie_bus clock\n"); > + goto err_pcie_bus; > + } > + > + ret = clk_prepare_enable(imx6_pcie->pcie); > + if (ret) { > + dev_err(dev, "unable to enable pcie clock\n"); > + goto err_pcie; > + } > + > + ret = imx6_pcie_enable_ref_clk(imx6_pcie); > + if (ret) { > + dev_err(dev, "unable to enable pcie ref clock\n"); > + goto err_ref_clk; > + } > + > + /* allow the clocks to stabilize */ > + usleep_range(200, 500); > + return 0; > + > +err_ref_clk: > + clk_disable_unprepare(imx6_pcie->pcie); > +err_pcie: > + clk_disable_unprepare(imx6_pcie->pcie_bus); > +err_pcie_bus: > + clk_disable_unprepare(imx6_pcie->pcie_phy); > + > + return ret; > + Superfluous newline. Regards, Lucas > +} > + > static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie) > { > clk_disable_unprepare(imx6_pcie->pcie); _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel