MXC: mx31pdk: mc13783: Trying to full support mc13783 regulators

MXC: mx31pdk: mc13783: Trying to full support mc13783 regulators

[Alberto Panizzo]

Hi all! In those days I am trying to full support the i.MX31PDK board
in the mainline kernel.

I am facing an annoying problem with the MC13783 power management chip:
when i try to enable one digital output (GPOn) the system freezes!
I do not understand this behaviour, Freescale datasheet for mc13783
make no correlation between those digital output and other chip signals!

Another strange thing is that also enabling the GPO1, that following 
the board schematics, take the way to the connector without influencing
other components in the CPU Board, will get the system freeze!

Following there is a dump of all registers before the enabling GPO1 call
hangs the system:

mc13783-regulator mc13783-regulator: reg: 0, val: 0
mc13783-regulator mc13783-regulator: reg: 1, val: e9fffe
mc13783-regulator mc13783-regulator: reg: 2, val: 8d840
mc13783-regulator mc13783-regulator: reg: 3, val: 1
mc13783-regulator mc13783-regulator: reg: 4, val: ffffff
mc13783-regulator mc13783-regulator: reg: 5, val: 4838
mc13783-regulator mc13783-regulator: reg: 6, val: 9c46
mc13783-regulator mc13783-regulator: reg: 7, val: 9b
mc13783-regulator mc13783-regulator: reg: 8, val: 0
mc13783-regulator mc13783-regulator: reg: 9, val: 0
mc13783-regulator mc13783-regulator: reg: 10, val: 0
mc13783-regulator mc13783-regulator: reg: 11, val: 0
mc13783-regulator mc13783-regulator: reg: 12, val: 0
mc13783-regulator mc13783-regulator: reg: 13, val: 40
mc13783-regulator mc13783-regulator: reg: 14, val: 0
mc13783-regulator mc13783-regulator: reg: 15, val: 0
mc13783-regulator mc13783-regulator: reg: 16, val: 200000
mc13783-regulator mc13783-regulator: reg: 17, val: 0
mc13783-regulator mc13783-regulator: reg: 18, val: 0
mc13783-regulator mc13783-regulator: reg: 19, val: 0
mc13783-regulator mc13783-regulator: reg: 20, val: 10
mc13783-regulator mc13783-regulator: reg: 21, val: 1ffff
mc13783-regulator mc13783-regulator: reg: 22, val: 0
mc13783-regulator mc13783-regulator: reg: 23, val: 7fff
mc13783-regulator mc13783-regulator: reg: 24, val: 1c71d
mc13783-regulator mc13783-regulator: reg: 25, val: 1c71c
mc13783-regulator mc13783-regulator: reg: 26, val: 24924
mc13783-regulator mc13783-regulator: reg: 27, val: 24924
mc13783-regulator mc13783-regulator: reg: 28, val: 221605
mc13783-regulator mc13783-regulator: reg: 29, val: 3e1605
mc13783-regulator mc13783-regulator: reg: 30, val: 63eec
mc13783-regulator mc13783-regulator: reg: 31, val: b7c
mc13783-regulator mc13783-regulator: reg: 32, val: 6db65b
mc13783-regulator mc13783-regulator: reg: 33, val: 6db6d2
mc13783-regulator mc13783-regulator: reg: 34, val: 18000
mc13783-regulator mc13783-regulator: reg: 35, val: 0
mc13783-regulator mc13783-regulator: reg: 36, val: 1000
mc13783-regulator mc13783-regulator: reg: 37, val: d35a
mc13783-regulator mc13783-regulator: reg: 38, val: 420000
mc13783-regulator mc13783-regulator: reg: 39, val: 13060
mc13783-regulator mc13783-regulator: reg: 40, val: 180027
mc13783-regulator mc13783-regulator: reg: 41, val: e0004
mc13783-regulator mc13783-regulator: reg: 42, val: 0
mc13783-regulator mc13783-regulator: reg: 43, val: 8000
mc13783-regulator mc13783-regulator: reg: 44, val: 0
mc13783-regulator mc13783-regulator: reg: 45, val: ffffff
mc13783-regulator mc13783-regulator: reg: 46, val: 80
mc13783-regulator mc13783-regulator: reg: 47, val: 0
mc13783-regulator mc13783-regulator: reg: 48, val: 0
mc13783-regulator mc13783-regulator: reg: 49, val: e0060
mc13783-regulator mc13783-regulator: reg: 50, val: 6
mc13783-regulator mc13783-regulator: reg: 51, val: 0
mc13783-regulator mc13783-regulator: reg: 52, val: 0
mc13783-regulator mc13783-regulator: reg: 53, val: 0
mc13783-regulator mc13783-regulator: reg: 54, val: 0
mc13783-regulator mc13783-regulator: reg: 55, val: 0
mc13783-regulator mc13783-regulator: reg: 56, val: 0
mc13783-regulator mc13783-regulator: reg: 57, val: 0
mc13783-regulator mc13783-regulator: reg: 58, val: 0
mc13783-regulator mc13783-regulator: reg: 59, val: 0
mc13783-regulator mc13783-regulator: reg: 60, val: 0
mc13783-regulator mc13783-regulator: reg: 61, val: 0
mc13783-regulator mc13783-regulator: reg: 62, val: 0
mc13783-regulator mc13783-regulator: reg: 63, val: 0

Can you suggest me some kind of way to explain this?

The patches that follow this mail could take the current mxc-master
branch to mine.
Note that, especially the last patches are in development, so many
debug messages are enabled.

Alberto!

[PATCH 1/4] MXC: imx31pdk: Add support for on board NAND Flash.

[Alberto Panizzo]

This add support for the CPU Board NAND device. Remember to
enable (if using) the RedBoot partition table parsing support
and to pointing it to the right flash page number.

Signed-off-by: Alberto Panizzo <alberto.panizzo@gmail.com>
---
 arch/arm/mach-mx3/mx31pdk.c |   10 ++++++++++
 1 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-mx3/mx31pdk.c b/arch/arm/mach-mx3/mx31pdk.c
index 0f7a2f0..ca1fe5d 100644
--- a/arch/arm/mach-mx3/mx31pdk.c
+++ b/arch/arm/mach-mx3/mx31pdk.c
@@ -34,6 +34,7 @@
 #include <mach/board-mx31pdk.h>
 #include <mach/imx-uart.h>
 #include <mach/iomux-mx3.h>
+#include <mach/mxc_nand.h>
 #include "devices.h"
 
 /*!
@@ -53,6 +54,14 @@ static int mx31pdk_pins[] = {
 	IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
 };
 
+/*
+ * NAND Flash
+ */
+static struct mxc_nand_platform_data imx31pdk_nand_flash_pdata = {
+	.width		= 1,
+	.hw_ecc		= 1,
+};
+
 static struct imxuart_platform_data uart_pdata = {
 	.flags = IMXUART_HAVE_RTSCTS,
 };
@@ -241,6 +250,7 @@ static void __init mxc_board_init(void)
 				      "mx31pdk");
 
 	mxc_register_device(&mxc_uart_device0, &uart_pdata);
+	mxc_register_device(&mxc_nand_device, &imx31pdk_nand_flash_pdata);
 
 	if (!mx31pdk_init_expio())
 		platform_device_register(&smsc911x_device);
-- 
1.6.3.3

[PATCH 2/4] MXC: mx31pdk: Add CSPI2 interface support.

[Alberto Panizzo]

This patch add second SPI channel registration.

Signed-off-by: Alberto Panizzo <alberto.panizzo@gmail.com>
---
 arch/arm/mach-mx3/mx31pdk.c |   22 ++++++++++++++++++++++
 1 files changed, 22 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-mx3/mx31pdk.c b/arch/arm/mach-mx3/mx31pdk.c
index ca1fe5d..5771d0e 100644
--- a/arch/arm/mach-mx3/mx31pdk.c
+++ b/arch/arm/mach-mx3/mx31pdk.c
@@ -35,6 +35,7 @@
 #include <mach/imx-uart.h>
 #include <mach/iomux-mx3.h>
 #include <mach/mxc_nand.h>
+#include <mach/spi.h>
 #include "devices.h"
 
 /*!
@@ -52,8 +53,28 @@ static int mx31pdk_pins[] = {
 	MX31_PIN_TXD1__TXD1,
 	MX31_PIN_RXD1__RXD1,
 	IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
+	/* SPI 1 */
+	MX31_PIN_CSPI2_SCLK__SCLK,
+	MX31_PIN_CSPI2_MOSI__MOSI,
+	MX31_PIN_CSPI2_MISO__MISO,
+	MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
+	MX31_PIN_CSPI2_SS0__SS0,
+	MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */
 };
 
+/* SPI */
+
+static int spi1_internal_chipselect[] = {
+	MXC_SPI_CS(0),
+	MXC_SPI_CS(2),
+};
+
+static struct spi_imx_master spi1_pdata = {
+	.chipselect	= spi1_internal_chipselect,
+	.num_chipselect	= ARRAY_SIZE(spi1_internal_chipselect),
+};
+
+
 /*
  * NAND Flash
  */
@@ -251,6 +272,7 @@ static void __init mxc_board_init(void)
 
 	mxc_register_device(&mxc_uart_device0, &uart_pdata);
 	mxc_register_device(&mxc_nand_device, &imx31pdk_nand_flash_pdata);
+	mxc_register_device(&mxc_spi_device1, &spi1_pdata);
 
 	if (!mx31pdk_init_expio())
 		platform_device_register(&smsc911x_device);
-- 
1.6.3.3

[PATCH 3/4] MXC: mc13783: Developing, trying to full support regulators.

[Alberto Panizzo]

This patch add the ability to change voltages settings
for all possible mc13783 regulators.
Pay attention that it is a development patch with many 
debug messages enabled.

Signed-off-by: Alberto Panizzo <alberto.panizzo@gmail.com>
---
 drivers/mfd/mc13783-core.c          |   20 ++
 drivers/regulator/mc13783.c         |  489 ++++++++++++++++++++++++++++++++--
 drivers/spi/spi_imx.c               |    2 +
 include/linux/mfd/mc13783-private.h |   53 ++++-
 4 files changed, 534 insertions(+), 30 deletions(-)

diff --git a/drivers/mfd/mc13783-core.c b/drivers/mfd/mc13783-core.c
index e354d29..50fd9d8 100644
--- a/drivers/mfd/mc13783-core.c
+++ b/drivers/mfd/mc13783-core.c
@@ -20,6 +20,7 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
+#define DEBUG	1
 
 #include <linux/mfd/mc13783-private.h>
 #include <linux/platform_device.h>
@@ -35,6 +36,10 @@
 #include <linux/slab.h>
 #include <linux/irq.h>
 
+#include <mach/hardware.h>
+#include <mach/board-mx31pdk.h>
+#include <linux/io.h>
+
 #define MC13783_MAX_REG_NUM	0x3f
 #define MC13783_FRAME_MASK	0x00ffffff
 #define MC13783_MAX_REG_NUM	0x3f
@@ -87,6 +92,8 @@ static int mc13783_write(struct mc13783 *mc13783, int reg_num, u32 reg_val)
 	frame |= reg_num << MC13783_REG_NUM_SHIFT;
 	frame |= reg_val & MC13783_FRAME_MASK;
 
+	printk(KERN_DEBUG "%s frame: 0x%x\n", __func__, frame);
+
 	return spi_rw(mc13783->spi_device, (u8 *)&frame, 4);
 }
 
@@ -127,15 +134,28 @@ int mc13783_set_bits(struct mc13783 *mc13783, int reg, u32 mask, u32 val)
 	u32 tmp;
 	int ret;
 
+	printk(KERN_DEBUG "%s reg: %d, mask: 0x%x, val: 0x%x\n", __func__, reg, mask, val);
+
 	mutex_lock(&mc13783->io_lock);
 
+	__raw_writew(__raw_readw(CPLD_LED_REG) | 0x10, CPLD_LED_REG);
+
 	ret = mc13783_read(mc13783, reg, &tmp);
+
+	printk(KERN_DEBUG "%s read ret: %d, tmp: 0x%x\n", __func__,ret,tmp);
+
 	tmp = (tmp & ~mask) | val;
 	if (ret == 0)
 		ret = mc13783_write(mc13783, reg, tmp);
 
+	printk(KERN_DEBUG "%s write ret: %d, tmp: 0x%x\n", __func__,ret,tmp);
+
 	mutex_unlock(&mc13783->io_lock);
 
+	printk(KERN_DEBUG "%s done\n", __func__);
+
+	__raw_writew(__raw_readw(CPLD_LED_REG) & 0xef, CPLD_LED_REG);
+
 	return ret;
 }
 EXPORT_SYMBOL_GPL(mc13783_set_bits);
diff --git a/drivers/regulator/mc13783.c b/drivers/regulator/mc13783.c
index 710211f..f265f07 100644
--- a/drivers/regulator/mc13783.c
+++ b/drivers/regulator/mc13783.c
@@ -2,12 +2,15 @@
  * Regulator Driver for Freescale MC13783 PMIC
  *
  * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
+ * Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
 
+#define DEBUG	1
+
 #include <linux/mfd/mc13783-private.h>
 #include <linux/regulator/machine.h>
 #include <linux/regulator/driver.h>
@@ -19,23 +22,220 @@
 
 struct mc13783_regulator {
 	struct regulator_desc desc;
-	int reg;
+	int control_reg;
 	int enable_bit;
+	int vsel_reg;
+	int vsel_shift;
+	int vsel_mask;
+	int const *voltages;
+};
+
+/*
+ * Voltage Values
+ */
+static const int const mc13783_sw_voltages[] = {
+	 900000, 925000, 950000, 975000,
+	1000000,1025000,1050000,1075000,
+	1100000,1125000,1150000,1175000,
+	1200000,1225000,1250000,1275000,
+	1300000,1325000,1350000,1375000,
+	1400000,1425000,1450000,1475000,
+	1500000,1525000,1550000,1575000,
+	1600000,1625000,1650000,1675000,
+	1700000,1700000,1700000,1700000,
+	1800000,1800000,1800000,1800000,
+	1850000,1850000,1850000,1850000,
+	2000000,2000000,2000000,2000000,
+	2100000,2100000,2100000,2100000,
+	2200000,2200000,2200000,2200000,
+	2200000,2200000,2200000,2200000,
+	2200000,2200000,2200000,2200000,
+};
+
+static const int const mc13783_sw3_voltages[] = {
+	5000000,
+	5000000,
+	5000000,
+	5500000,
+};
+
+static const int const mc13783_vaudio_voltages[] = {
+	2775000,
+};
+
+static const int const mc13783_viohi_voltages[] = {
+	2775000,
+};
+
+static const int const mc13783_violo_voltage[] = {
+	1200000,
+	1300000,
+	1500000,
+	1800000,
+};
+
+static const int const mc13783_vdig_voltage[] = {
+	1200000,
+	1300000,
+	1500000,
+	1800000,
+};
+
+static const int const mc13783_vgen_voltage[] = {
+	1200000,
+	1300000,
+	1500000,
+	1800000,
+	1100000,
+	2000000,
+	2775000,
+	2400000,
+};
+
+static const int const mc13783_vrfdig_voltage[] = {
+	1200000,
+	1500000,
+	1800000,
+	1875000,
+};
+
+static const int const mc13783_vrfref_voltage[] = {
+	2475000,
+	2600000,
+	2700000,
+	2775000,
+};
+
+static const int const mc13783_vrfcp_voltage[] = {
+	2700000,
+	2775000,
+};
+
+static const int const mc13783_vsim_voltage[] = {
+	1800000,
+	2900000,
+	3000000,
+};
+
+static const int const mc13783_vesim_voltage[] = {
+	1800000,
+	2900000,
+};
+
+static const int const mc13783_vcam_voltage[] = {
+	1500000,
+	1800000,
+	2500000,
+	2550000,
+	2600000,
+	2750000,
+	2800000,
+	3000000,
+};
+
+static const int const mc13783_vrfbg_voltages[] = {
+	1250000,
+};
+
+static const int const mc13783_vvib_voltage[] = {
+	1300000,
+	1800000,
+	2000000,
+	3000000,
+};
+
+static const int const mc13783_vmmc_voltage[] = {
+	1600000,
+	1800000,
+	2000000,
+	2600000,
+	2700000,
+	2800000,
+	2900000,
+	3000000,
+};
+
+static const int const mc13783_vrf_voltage[] = {
+	1500000,
+	1875000,
+	2700000,
+	2775000,
 };
 
 static struct regulator_ops mc13783_regulator_ops;
 
 static struct mc13783_regulator mc13783_regulators[] = {
+	[MC13783_SW_SW1A] = {
+		.desc = {
+			.name	= "SW_SW1A",
+			.n_voltages = ARRAY_SIZE(mc13783_sw_voltages),
+			.ops	= &mc13783_regulator_ops,
+			.type	= REGULATOR_VOLTAGE,
+			.id	= MC13783_SW_SW1A,
+			.owner	= THIS_MODULE,
+		},
+		.vsel_reg = MC13783_REG_SWITCHERS_0,
+		.vsel_shift = MC13783_REGSET_SW_VSEL_SHIFT,
+		.vsel_mask = MC13783_REGSET_SW_VSEL_MASK,
+		.voltages = mc13783_sw_voltages,
+	},
+	[MC13783_SW_SW1B] = {
+		.desc = {
+			.name	= "SW_SW1B",
+			.n_voltages = ARRAY_SIZE(mc13783_sw_voltages),
+			.ops	= &mc13783_regulator_ops,
+			.type	= REGULATOR_VOLTAGE,
+			.id	= MC13783_SW_SW1B,
+			.owner	= THIS_MODULE,
+		},
+		.vsel_reg = MC13783_REG_SWITCHERS_1,
+		.vsel_shift = MC13783_REGSET_SW_VSEL_SHIFT,
+		.vsel_mask = MC13783_REGSET_SW_VSEL_MASK,
+		.voltages = mc13783_sw_voltages,
+	},
+	[MC13783_SW_SW2A] = {
+		.desc = {
+			.name	= "SW_SW2A",
+			.n_voltages = ARRAY_SIZE(mc13783_sw_voltages),
+			.ops	= &mc13783_regulator_ops,
+			.type	= REGULATOR_VOLTAGE,
+			.id	= MC13783_SW_SW2A,
+			.owner	= THIS_MODULE,
+		},
+		.vsel_reg = MC13783_REG_SWITCHERS_2,
+		.vsel_shift = MC13783_REGSET_SW_VSEL_SHIFT,
+		.vsel_mask = MC13783_REGSET_SW_VSEL_MASK,
+		.voltages = mc13783_sw_voltages,
+	},
+	[MC13783_SW_SW2B] = {
+		.desc = {
+			.name	= "SW_SW2B",
+			.n_voltages = ARRAY_SIZE(mc13783_sw_voltages),
+			.ops	= &mc13783_regulator_ops,
+			.type	= REGULATOR_VOLTAGE,
+			.id	= MC13783_SW_SW2B,
+			.owner	= THIS_MODULE,
+		},
+		.vsel_reg = MC13783_REG_SWITCHERS_3,
+		.vsel_shift = MC13783_REGSET_SW_VSEL_SHIFT,
+		.vsel_mask = MC13783_REGSET_SW_VSEL_MASK,
+		.voltages = mc13783_sw_voltages,
+	},
 	[MC13783_SW_SW3] = {
 		.desc = {
 			.name	= "SW_SW3",
+			.n_voltages = ARRAY_SIZE(mc13783_sw3_voltages),
 			.ops	= &mc13783_regulator_ops,
 			.type	= REGULATOR_VOLTAGE,
 			.id	= MC13783_SW_SW3,
 			.owner	= THIS_MODULE,
 		},
-		.reg = MC13783_REG_SWITCHERS_5,
+		.control_reg = MC13783_REG_SWITCHERS_5,
 		.enable_bit = MC13783_SWCTRL_SW3_EN,
+		.vsel_reg = MC13783_REG_SWITCHERS_5,
+		.vsel_shift = MC13783_REGSET_SW3_VSEL_SHIFT,
+		.vsel_mask = MC13783_REGSET_SW3_VSEL_MASK,
+		.voltages = mc13783_sw3_voltages,
 	},
 	[MC13783_SW_PLL] = {
 		.desc = {
@@ -45,195 +245,271 @@ static struct mc13783_regulator mc13783_regulators[] = {
 			.id	= MC13783_SW_PLL,
 			.owner	= THIS_MODULE,
 		},
-		.reg = MC13783_REG_SWITCHERS_4,
+		.control_reg = MC13783_REG_SWITCHERS_4,
 		.enable_bit = MC13783_SWCTRL_PLL_EN,
 	},
 	[MC13783_REGU_VAUDIO] = {
 		.desc = {
 			.name	= "REGU_VAUDIO",
+			.n_voltages = ARRAY_SIZE(mc13783_vaudio_voltages),
 			.ops	= &mc13783_regulator_ops,
 			.type	= REGULATOR_VOLTAGE,
 			.id	= MC13783_REGU_VAUDIO,
 			.owner	= THIS_MODULE,
 		},
-		.reg = MC13783_REG_REGULATOR_MODE_0,
+		.control_reg = MC13783_REG_REGULATOR_MODE_0,
 		.enable_bit = MC13783_REGCTRL_VAUDIO_EN,
+		.voltages = mc13783_vaudio_voltages,
 	},
 	[MC13783_REGU_VIOHI] = {
 		.desc = {
 			.name	= "REGU_VIOHI",
+			.n_voltages = ARRAY_SIZE(mc13783_viohi_voltages),
 			.ops	= &mc13783_regulator_ops,
 			.type	= REGULATOR_VOLTAGE,
 			.id	= MC13783_REGU_VIOHI,
 			.owner	= THIS_MODULE,
 		},
-		.reg = MC13783_REG_REGULATOR_MODE_0,
+		.control_reg = MC13783_REG_REGULATOR_MODE_0,
 		.enable_bit = MC13783_REGCTRL_VIOHI_EN,
+		.voltages = mc13783_viohi_voltages,
 	},
 	[MC13783_REGU_VIOLO] = {
 		.desc = {
 			.name	= "REGU_VIOLO",
+			.n_voltages = ARRAY_SIZE(mc13783_violo_voltage),
 			.ops	= &mc13783_regulator_ops,
 			.type	= REGULATOR_VOLTAGE,
 			.id	= MC13783_REGU_VIOLO,
 			.owner	= THIS_MODULE,
 		},
-		.reg = MC13783_REG_REGULATOR_MODE_0,
+		.control_reg = MC13783_REG_REGULATOR_MODE_0,
 		.enable_bit = MC13783_REGCTRL_VIOLO_EN,
+		.vsel_reg = MC13783_REG_REGULATOR_SETTING_0,
+		.vsel_shift = MC13783_REGSET_VIOLO_VSEL_SHIFT,
+		.vsel_mask = MC13783_REGSET_VIOLO_VSEL_MASK,
+		.voltages = mc13783_violo_voltage,
 	},
 	[MC13783_REGU_VDIG] = {
 		.desc = {
 			.name	= "REGU_VDIG",
+			.n_voltages = ARRAY_SIZE(mc13783_vdig_voltage),
 			.ops	= &mc13783_regulator_ops,
 			.type	= REGULATOR_VOLTAGE,
 			.id	= MC13783_REGU_VDIG,
 			.owner	= THIS_MODULE,
 		},
-		.reg = MC13783_REG_REGULATOR_MODE_0,
+		.control_reg = MC13783_REG_REGULATOR_MODE_0,
 		.enable_bit = MC13783_REGCTRL_VDIG_EN,
+		.vsel_reg = MC13783_REG_REGULATOR_SETTING_0,
+		.vsel_shift = MC13783_REGSET_VDIG_VSEL_SHIFT,
+		.vsel_mask = MC13783_REGSET_VDIG_VSEL_MASK,
+		.voltages = mc13783_vdig_voltage,
 	},
 	[MC13783_REGU_VGEN] = {
 		.desc = {
 			.name	= "REGU_VGEN",
+			.n_voltages = ARRAY_SIZE(mc13783_vgen_voltage),
 			.ops	= &mc13783_regulator_ops,
 			.type	= REGULATOR_VOLTAGE,
 			.id	= MC13783_REGU_VGEN,
 			.owner	= THIS_MODULE,
 		},
-		.reg = MC13783_REG_REGULATOR_MODE_0,
+		.control_reg = MC13783_REG_REGULATOR_MODE_0,
 		.enable_bit = MC13783_REGCTRL_VGEN_EN,
+		.vsel_reg = MC13783_REG_REGULATOR_SETTING_0,
+		.vsel_shift = MC13783_REGSET_VGEN_VSEL_SHIFT,
+		.vsel_mask = MC13783_REGSET_VGEN_VSEL_MASK,
+		.voltages = mc13783_vgen_voltage,
 	},
 	[MC13783_REGU_VRFDIG] = {
 		.desc = {
 			.name	= "REGU_VRFDIG",
+			.n_voltages = ARRAY_SIZE(mc13783_vrfdig_voltage),
 			.ops	= &mc13783_regulator_ops,
 			.type	= REGULATOR_VOLTAGE,
 			.id	= MC13783_REGU_VRFDIG,
 			.owner	= THIS_MODULE,
 		},
-		.reg = MC13783_REG_REGULATOR_MODE_0,
+		.control_reg = MC13783_REG_REGULATOR_MODE_0,
 		.enable_bit = MC13783_REGCTRL_VRFDIG_EN,
+		.vsel_reg = MC13783_REG_REGULATOR_SETTING_0,
+		.vsel_shift = MC13783_REGSET_VRFDIG_VSEL_SHIFT,
+		.vsel_mask = MC13783_REGSET_VRFDIG_VSEL_MASK,
+		.voltages = mc13783_vrfdig_voltage,
 	},
 	[MC13783_REGU_VRFREF] = {
 		.desc = {
 			.name	= "REGU_VRFREF",
+			.n_voltages = ARRAY_SIZE(mc13783_vrfref_voltage),
 			.ops	= &mc13783_regulator_ops,
 			.type	= REGULATOR_VOLTAGE,
 			.id	= MC13783_REGU_VRFREF,
 			.owner	= THIS_MODULE,
 		},
-		.reg = MC13783_REG_REGULATOR_MODE_0,
+		.control_reg = MC13783_REG_REGULATOR_MODE_0,
 		.enable_bit = MC13783_REGCTRL_VRFREF_EN,
+		.vsel_reg = MC13783_REG_REGULATOR_SETTING_0,
+		.vsel_shift = MC13783_REGSET_VRFREF_VSEL_SHIFT,
+		.vsel_mask = MC13783_REGSET_VRFREF_VSEL_MASK,
+		.voltages = mc13783_vrfref_voltage,
 	},
 	[MC13783_REGU_VRFCP] = {
 		.desc = {
 			.name	= "REGU_VRFCP",
+			.n_voltages = ARRAY_SIZE(mc13783_vrfcp_voltage),
 			.ops	= &mc13783_regulator_ops,
 			.type	= REGULATOR_VOLTAGE,
 			.id	= MC13783_REGU_VRFCP,
 			.owner	= THIS_MODULE,
 		},
-		.reg = MC13783_REG_REGULATOR_MODE_0,
+		.control_reg = MC13783_REG_REGULATOR_MODE_0,
 		.enable_bit = MC13783_REGCTRL_VRFCP_EN,
+		.vsel_reg = MC13783_REG_REGULATOR_SETTING_0,
+		.vsel_shift = MC13783_REGSET_VRFCP_VSEL_SHIFT,
+		.vsel_mask = MC13783_REGSET_VRFCP_VSEL_MASK,
+		.voltages = mc13783_vrfcp_voltage,
 	},
 	[MC13783_REGU_VSIM] = {
 		.desc = {
 			.name	= "REGU_VSIM",
+			.n_voltages = ARRAY_SIZE(mc13783_vsim_voltage),
 			.ops	= &mc13783_regulator_ops,
 			.type	= REGULATOR_VOLTAGE,
 			.id	= MC13783_REGU_VSIM,
 			.owner	= THIS_MODULE,
 		},
-		.reg = MC13783_REG_REGULATOR_MODE_1,
+		.control_reg = MC13783_REG_REGULATOR_MODE_1,
 		.enable_bit = MC13783_REGCTRL_VSIM_EN,
+		.vsel_reg = MC13783_REG_REGULATOR_SETTING_0,
+		.vsel_shift = MC13783_REGSET_VSIM_VSEL_SHIFT,
+		.vsel_mask = MC13783_REGSET_VSIM_VSEL_MASK,
+		.voltages = mc13783_vsim_voltage,
 	},
 	[MC13783_REGU_VESIM] = {
 		.desc = {
 			.name	= "REGU_VESIM",
+			.n_voltages = ARRAY_SIZE(mc13783_vesim_voltage),
 			.ops	= &mc13783_regulator_ops,
 			.type	= REGULATOR_VOLTAGE,
 			.id	= MC13783_REGU_VESIM,
 			.owner	= THIS_MODULE,
 		},
-		.reg = MC13783_REG_REGULATOR_MODE_1,
+		.control_reg = MC13783_REG_REGULATOR_MODE_1,
 		.enable_bit = MC13783_REGCTRL_VESIM_EN,
+		.vsel_reg = MC13783_REG_REGULATOR_SETTING_0,
+		.vsel_shift = MC13783_REGSET_VESIM_VSEL_SHIFT,
+		.vsel_mask = MC13783_REGSET_VESIM_VSEL_MASK,
+		.voltages = mc13783_vesim_voltage,
 	},
 	[MC13783_REGU_VCAM] = {
 		.desc = {
 			.name	= "REGU_VCAM",
+			.n_voltages = ARRAY_SIZE(mc13783_vcam_voltage),
 			.ops	= &mc13783_regulator_ops,
 			.type	= REGULATOR_VOLTAGE,
 			.id	= MC13783_REGU_VCAM,
 			.owner	= THIS_MODULE,
 		},
-		.reg = MC13783_REG_REGULATOR_MODE_1,
+		.control_reg = MC13783_REG_REGULATOR_MODE_1,
 		.enable_bit = MC13783_REGCTRL_VCAM_EN,
+		.vsel_reg = MC13783_REG_REGULATOR_SETTING_0,
+		.vsel_shift = MC13783_REGSET_VCAM_VSEL_SHIFT,
+		.vsel_mask = MC13783_REGSET_VCAM_VSEL_MASK,
+		.voltages = mc13783_vcam_voltage,
 	},
 	[MC13783_REGU_VRFBG] = {
 		.desc = {
 			.name	= "REGU_VRFBG",
+			.n_voltages = ARRAY_SIZE(mc13783_vrfbg_voltages),
 			.ops	= &mc13783_regulator_ops,
 			.type	= REGULATOR_VOLTAGE,
 			.id	= MC13783_REGU_VRFBG,
 			.owner	= THIS_MODULE,
 		},
-		.reg = MC13783_REG_REGULATOR_MODE_1,
+		.control_reg = MC13783_REG_REGULATOR_MODE_1,
 		.enable_bit = MC13783_REGCTRL_VRFBG_EN,
+		.voltages = mc13783_vrfbg_voltages
 	},
 	[MC13783_REGU_VVIB] = {
 		.desc = {
 			.name	= "REGU_VVIB",
+			.n_voltages = ARRAY_SIZE(mc13783_vvib_voltage),
 			.ops	= &mc13783_regulator_ops,
 			.type	= REGULATOR_VOLTAGE,
 			.id	= MC13783_REGU_VVIB,
 			.owner	= THIS_MODULE,
 		},
-		.reg = MC13783_REG_REGULATOR_MODE_1,
+		.control_reg = MC13783_REG_REGULATOR_MODE_1,
 		.enable_bit = MC13783_REGCTRL_VVIB_EN,
+		.vsel_reg = MC13783_REG_REGULATOR_SETTING_1,
+		.vsel_shift = MC13783_REGSET_VVIB_VSEL_SHIFT,
+		.vsel_mask = MC13783_REGSET_VVIB_VSEL_MASK,
+		.voltages = mc13783_vvib_voltage,
 	},
 	[MC13783_REGU_VRF1] = {
 		.desc = {
 			.name	= "REGU_VRF1",
+			.n_voltages = ARRAY_SIZE(mc13783_vrf_voltage),
 			.ops	= &mc13783_regulator_ops,
 			.type	= REGULATOR_VOLTAGE,
 			.id	= MC13783_REGU_VRF1,
 			.owner	= THIS_MODULE,
 		},
-		.reg = MC13783_REG_REGULATOR_MODE_1,
+		.control_reg = MC13783_REG_REGULATOR_MODE_1,
 		.enable_bit = MC13783_REGCTRL_VRF1_EN,
+		.vsel_reg = MC13783_REG_REGULATOR_SETTING_1,
+		.vsel_shift = MC13783_REGSET_VRF1_VSEL_SHIFT,
+		.vsel_mask = MC13783_REGSET_VRF1_VSEL_MASK,
+		.voltages = mc13783_vrf_voltage,
 	},
 	[MC13783_REGU_VRF2] = {
 		.desc = {
 			.name	= "REGU_VRF2",
+			.n_voltages = ARRAY_SIZE(mc13783_vrf_voltage),
 			.ops	= &mc13783_regulator_ops,
 			.type	= REGULATOR_VOLTAGE,
 			.id	= MC13783_REGU_VRF2,
 			.owner	= THIS_MODULE,
 		},
-		.reg = MC13783_REG_REGULATOR_MODE_1,
+		.control_reg = MC13783_REG_REGULATOR_MODE_1,
 		.enable_bit = MC13783_REGCTRL_VRF2_EN,
+		.vsel_reg = MC13783_REG_REGULATOR_SETTING_1,
+		.vsel_shift = MC13783_REGSET_VRF2_VSEL_SHIFT,
+		.vsel_mask = MC13783_REGSET_VRF2_VSEL_MASK,
+		.voltages = mc13783_vrf_voltage,
 	},
 	[MC13783_REGU_VMMC1] = {
 		.desc = {
 			.name	= "REGU_VMMC1",
+			.n_voltages = ARRAY_SIZE(mc13783_vmmc_voltage),
 			.ops	= &mc13783_regulator_ops,
 			.type	= REGULATOR_VOLTAGE,
 			.id	= MC13783_REGU_VMMC1,
 			.owner	= THIS_MODULE,
 		},
-		.reg = MC13783_REG_REGULATOR_MODE_1,
+		.control_reg = MC13783_REG_REGULATOR_MODE_1,
 		.enable_bit = MC13783_REGCTRL_VMMC1_EN,
+		.vsel_reg = MC13783_REG_REGULATOR_SETTING_1,
+		.vsel_shift = MC13783_REGSET_VMMC1_VSEL_SHIFT,
+		.vsel_mask = MC13783_REGSET_VMMC1_VSEL_MASK,
+		.voltages = mc13783_vmmc_voltage,
 	},
 	[MC13783_REGU_VMMC2] = {
 		.desc = {
 			.name	= "REGU_VMMC2",
+			.n_voltages = ARRAY_SIZE(mc13783_vmmc_voltage),
 			.ops	= &mc13783_regulator_ops,
 			.type	= REGULATOR_VOLTAGE,
 			.id	= MC13783_REGU_VMMC2,
 			.owner	= THIS_MODULE,
 		},
-		.reg = MC13783_REG_REGULATOR_MODE_1,
+		.control_reg = MC13783_REG_REGULATOR_MODE_1,
 		.enable_bit = MC13783_REGCTRL_VMMC2_EN,
+		.vsel_reg = MC13783_REG_REGULATOR_SETTING_1,
+		.vsel_shift = MC13783_REGSET_VMMC2_VSEL_SHIFT,
+		.vsel_mask = MC13783_REGSET_VMMC2_VSEL_MASK,
+		.voltages = mc13783_vmmc_voltage,
 	},
 	[MC13783_REGU_GPO1] = {
 		.desc = {
@@ -243,7 +519,7 @@ static struct mc13783_regulator mc13783_regulators[] = {
 			.id	= MC13783_REGU_GPO1,
 			.owner	= THIS_MODULE,
 		},
-		.reg = MC13783_REG_POWER_MISCELLANEOUS,
+		.control_reg = MC13783_REG_POWER_MISCELLANEOUS,
 		.enable_bit = MC13783_REGCTRL_GPO1_EN,
 	},
 	[MC13783_REGU_GPO2] = {
@@ -254,7 +530,7 @@ static struct mc13783_regulator mc13783_regulators[] = {
 			.id	= MC13783_REGU_GPO2,
 			.owner	= THIS_MODULE,
 		},
-		.reg = MC13783_REG_POWER_MISCELLANEOUS,
+		.control_reg = MC13783_REG_POWER_MISCELLANEOUS,
 		.enable_bit = MC13783_REGCTRL_GPO2_EN,
 	},
 	[MC13783_REGU_GPO3] = {
@@ -265,7 +541,7 @@ static struct mc13783_regulator mc13783_regulators[] = {
 			.id	= MC13783_REGU_GPO3,
 			.owner	= THIS_MODULE,
 		},
-		.reg = MC13783_REG_POWER_MISCELLANEOUS,
+		.control_reg = MC13783_REG_POWER_MISCELLANEOUS,
 		.enable_bit = MC13783_REGCTRL_GPO3_EN,
 	},
 	[MC13783_REGU_GPO4] = {
@@ -276,7 +552,7 @@ static struct mc13783_regulator mc13783_regulators[] = {
 			.id	= MC13783_REGU_GPO4,
 			.owner	= THIS_MODULE,
 		},
-		.reg = MC13783_REG_POWER_MISCELLANEOUS,
+		.control_reg = MC13783_REG_POWER_MISCELLANEOUS,
 		.enable_bit = MC13783_REGCTRL_GPO4_EN,
 	},
 };
@@ -292,11 +568,25 @@ static int mc13783_enable(struct regulator_dev *rdev)
 	struct mc13783_priv *priv = rdev_get_drvdata(rdev);
 	int id = rdev_get_id(rdev);
 
+	/* Print out all mc13783 registers */
+	int i, ret;
+	for(i = 0; id >= MC13783_REGU_GPO1 && i < MC13783_REG_NB; i++)
+	{
+		mc13783_reg_read(priv->mc13783,i, &ret);
+		dev_dbg(rdev_get_dev(rdev), "reg: %d, val: %x\n",i , ret);
+	}
+
 	dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
 
-	return mc13783_set_bits(priv->mc13783, mc13783_regulators[id].reg,
+	/* The regulator is enabled by default? */
+	if (!mc13783_regulators[id].control_reg)
+		return 0;
+
+	ret = mc13783_set_bits(priv->mc13783, mc13783_regulators[id].control_reg,
 			mc13783_regulators[id].enable_bit,
 			mc13783_regulators[id].enable_bit);
+	dev_dbg(rdev_get_dev(rdev), "%s ret: %d\n", __func__, ret);
+	return ret;
 }
 
 static int mc13783_disable(struct regulator_dev *rdev)
@@ -306,7 +596,10 @@ static int mc13783_disable(struct regulator_dev *rdev)
 
 	dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
 
-	return mc13783_set_bits(priv->mc13783, mc13783_regulators[id].reg,
+	if (!mc13783_regulators[id].control_reg)
+		return -EINVAL;
+
+	return mc13783_set_bits(priv->mc13783, mc13783_regulators[id].control_reg,
 			mc13783_regulators[id].enable_bit, 0);
 }
 
@@ -316,17 +609,138 @@ static int mc13783_is_enabled(struct regulator_dev *rdev)
 	int ret, id = rdev_get_id(rdev);
 	unsigned int val;
 
-	ret = mc13783_reg_read(priv->mc13783, mc13783_regulators[id].reg, &val);
+	/* The regulator is enabled by default */
+	if (!mc13783_regulators[id].control_reg)
+		return true;
+
+	ret = mc13783_reg_read(priv->mc13783, mc13783_regulators[id].control_reg, &val);
 	if (ret)
 		return ret;
 
 	return (val & mc13783_regulators[id].enable_bit) != 0;
 }
 
+static int mc13783_list_voltage (struct regulator_dev *rdev, unsigned selector)
+{
+	int id = rdev_get_id(rdev);
+
+	if (selector >= mc13783_regulators[id].desc.n_voltages)
+		return -EINVAL;
+
+	return mc13783_regulators[id].voltages[selector];
+}
+
+static int mc13783_get_best_voltage_index(struct regulator_dev *rdev,
+					  int min_uV, int max_uV)
+{
+	int reg_id = rdev_get_id(rdev);
+	int i;
+	int bestmatch;
+	int bestindex;
+
+	/*
+	 * Locate the minimum voltage fitting the criteria on
+	 * this regulator. The switchable voltages are not
+	 * in strict falling order so we need to check them
+	 * all for the best match.
+	 */
+	bestmatch = INT_MAX;
+	bestindex = -1;
+	for (i = 0; i < mc13783_regulators[reg_id].desc.n_voltages; i++) {
+		if (mc13783_regulators[reg_id].voltages[i] <= max_uV &&
+		    mc13783_regulators[reg_id].voltages[i] >= min_uV &&
+		    mc13783_regulators[reg_id].voltages[i] < bestmatch) {
+			bestmatch = mc13783_regulators[reg_id].voltages[i];
+			bestindex = i;
+		}
+	}
+
+	if (bestindex < 0) {
+		dev_warn(&rdev->dev, "requested %d<=x<=%d uV, out of range!\n",
+			 min_uV, max_uV);
+		return -EINVAL;
+	}
+	return bestindex;
+}
+
+static int mc13783_set_voltage (struct regulator_dev *rdev, int min_uV, int max_uV)
+{
+	struct mc13783_priv *priv = rdev_get_drvdata(rdev);
+	int value, id = rdev_get_id(rdev);
+
+	dev_dbg(rdev_get_dev(rdev), "%s id: %d min_uV: %d max_uV: %d\n",
+		__func__, id, min_uV, max_uV);
+
+	dev_dbg(rdev_get_dev(rdev), "%s n_voltages: %d \n",
+		__func__, mc13783_regulators[id].desc.n_voltages);
+
+	/* If not coherent return -EINVAL */
+	if (mc13783_regulators[id].desc.n_voltages == 0)
+		return -EINVAL;
+
+	/* If it is a fixed regulator*/
+	if (mc13783_regulators[id].desc.n_voltages == 1)
+	{
+		if (min_uV > mc13783_regulators[id].voltages[0] &&
+		    max_uV < mc13783_regulators[id].voltages[0])
+			return 0;
+		else
+			return -EINVAL;
+	}
+
+	/* Find the best index */
+	value = mc13783_get_best_voltage_index(rdev, min_uV, max_uV);
+	dev_dbg(rdev_get_dev(rdev), "%s best value: %d \n",
+		__func__, value);
+	if (value < 0)
+		return value;
+
+	dev_dbg(rdev_get_dev(rdev), "%s id: %d best index: %d\n",
+		__func__, id, value);
+
+	return mc13783_set_bits(priv->mc13783, mc13783_regulators[id].vsel_reg,
+			mc13783_regulators[id].vsel_mask,
+			value << mc13783_regulators[id].vsel_shift);
+}
+
+static int mc13783_get_voltage (struct regulator_dev *rdev)
+{
+	struct mc13783_priv *priv = rdev_get_drvdata(rdev);
+	int ret, id = rdev_get_id(rdev);
+	unsigned int val;
+
+	dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
+
+	/* If not coherent return -EINVAL */
+	if (!mc13783_regulators[id].desc.n_voltages)
+		return -EINVAL;
+
+	/* If it is a fixed voltage regulator */
+	if (mc13783_regulators[id].desc.n_voltages == 1)
+		return mc13783_regulators[id].voltages[0];
+
+	ret = mc13783_reg_read( priv->mc13783,
+				mc13783_regulators[id].vsel_reg, &val);
+	if (ret)
+		return ret;
+
+	val =(val & mc13783_regulators[id].vsel_mask)
+		>> mc13783_regulators[id].vsel_shift;
+
+	dev_dbg(rdev_get_dev(rdev), "%s id: %d val: %d\n", __func__, id, val);
+
+	BUG_ON(val > mc13783_regulators[id].desc.n_voltages);
+
+	return mc13783_regulators[id].voltages[val];
+}
+
 static struct regulator_ops mc13783_regulator_ops = {
 	.enable		= mc13783_enable,
 	.disable	= mc13783_disable,
 	.is_enabled	= mc13783_is_enabled,
+	.list_voltage	= mc13783_list_voltage,
+	.set_voltage	= mc13783_set_voltage,
+	.get_voltage	= mc13783_get_voltage,
 };
 
 static int __devinit mc13783_regulator_probe(struct platform_device *pdev)
@@ -345,6 +759,23 @@ static int __devinit mc13783_regulator_probe(struct platform_device *pdev)
 
 	priv->mc13783 = mc13783;
 
+	/*
+	 * IMX31PDK specific
+	 * will be removed
+	 * START
+	 */
+
+	/*most regulators are controled by standby signal*/
+	/*except violo*/
+	mc13783_set_bits(priv->mc13783, MC13783_REG_REGULATOR_MODE_0,0x492412,0x492412);
+	mc13783_set_bits(priv->mc13783, MC13783_REG_REGULATOR_MODE_1,0x492492,0x492492);
+	/*also sw3 is controled by standby signal*/
+	mc13783_set_bits(priv->mc13783, MC13783_REG_SWITCHERS_5,0x200000,0x200000);
+
+	/*
+	 * END
+	 */
+
 	for (i = 0; i < mc13783->num_regulators; i++) {
 		init_data = &mc13783->regulators[i];
 		priv->regulators[i] = regulator_register(
@@ -389,12 +820,12 @@ static struct platform_driver mc13783_regulator_driver = {
 		.owner	= THIS_MODULE,
 	},
 	.remove		= __devexit_p(mc13783_regulator_remove),
+	.probe		= mc13783_regulator_probe,
 };
 
 static int __init mc13783_regulator_init(void)
 {
-	return platform_driver_probe(&mc13783_regulator_driver,
-			mc13783_regulator_probe);
+	return platform_driver_register(&mc13783_regulator_driver);
 }
 subsys_initcall(mc13783_regulator_init);
 
diff --git a/drivers/spi/spi_imx.c b/drivers/spi/spi_imx.c
index 89c22ef..de1f323 100644
--- a/drivers/spi/spi_imx.c
+++ b/drivers/spi/spi_imx.c
@@ -18,6 +18,8 @@
  * Boston, MA  02110-1301, USA.
  */
 
+#define DEBUG 1
+
 #include <linux/clk.h>
 #include <linux/completion.h>
 #include <linux/delay.h>
diff --git a/include/linux/mfd/mc13783-private.h b/include/linux/mfd/mc13783-private.h
index 47e698c..6614de9 100644
--- a/include/linux/mfd/mc13783-private.h
+++ b/include/linux/mfd/mc13783-private.h
@@ -251,6 +251,17 @@ int mc13783_register_irq(struct mc13783 *mc13783, int irq,
 #define MC13783_REGCTRL_VIBPINCTRL	(1 << 14)
 
 /*
+ * Reg Switchers
+ * 0, 1, 2, 3 (1A, 1B, 2A, 2B)
+ */
+#define MC13783_REGSET_SW_VSEL_SHIFT		0
+#define MC13783_REGSET_SW_DVS_VSEL_SHIFT	6
+#define MC13783_REGSET_SW_STBY_VSEL_SHIFT	12
+#define MC13783_REGSET_SW_VSEL_MASK		(0x3F << 0)
+#define MC13783_REGSET_SW_DVS_VSEL_MASK		(0x3F << 6)
+#define MC13783_REGSET_SW_STBY_VSEL_MASK	(0x3F << 12)
+
+/*
  * Reg Switcher 4
  */
 #define MC13783_SWCTRL_SW1A_MODE	(1 << 0)
@@ -279,12 +290,52 @@ int mc13783_register_irq(struct mc13783 *mc13783, int irq,
 #define MC13783_SWCTRL_SW2B_DVS_SPEED	(1 << 14)
 #define MC13783_SWCTRL_SW2B_PANIC_MODE	(1 << 16)
 #define MC13783_SWCTRL_SW2B_SOFTSTART	(1 << 17)
-#define MC13783_SWSET_SW3		(1 << 18)
+#define MC13783_REGSET_SW3_VSEL_SHIFT	18
+#define MC13783_REGSET_SW3_VSEL_MASK	(3 << 18)
 #define MC13783_SWCTRL_SW3_EN		(1 << 20)
 #define MC13783_SWCTRL_SW3_STBY		(1 << 21)
 #define MC13783_SWCTRL_SW3_MODE		(1 << 22)
 
 /*
+ * Reg Setting 0
+ */
+#define MC13783_REGSET_VIOLO_VSEL_SHIFT		2
+#define MC13783_REGSET_VDIG_VSEL_SHIFT		4
+#define MC13783_REGSET_VGEN_VSEL_SHIFT		6
+#define MC13783_REGSET_VRFDIG_VSEL_SHIFT	9
+#define MC13783_REGSET_VRFREF_VSEL_SHIFT	11
+#define MC13783_REGSET_VRFCP_VSEL_SHIFT		13
+#define MC13783_REGSET_VSIM_VSEL_SHIFT		14
+#define MC13783_REGSET_VESIM_VSEL_SHIFT		15
+#define MC13783_REGSET_VCAM_VSEL_SHIFT		16
+
+#define MC13783_REGSET_VIOLO_VSEL_MASK	(3 << 2)
+#define MC13783_REGSET_VDIG_VSEL_MASK	(3 << 4)
+#define MC13783_REGSET_VGEN_VSEL_MASK	(7 << 6)
+#define MC13783_REGSET_VRFDIG_VSEL_MASK	(3 << 9)
+#define MC13783_REGSET_VRFREF_VSEL_MASK	(3 << 11)
+#define MC13783_REGSET_VRFCP_VSEL_MASK	(1 << 13)
+#define MC13783_REGSET_VSIM_VSEL_MASK	(1 << 14)
+#define MC13783_REGSET_VESIM_VSEL_MASK	(1 << 15)
+#define MC13783_REGSET_VCAM_VSEL_MASK	(7 << 16)
+
+/*
+ * Reg Setting 1
+ */
+#define MC13783_REGSET_VVIB_VSEL_SHIFT	0
+#define MC13783_REGSET_VRF1_VSEL_SHIFT	2
+#define MC13783_REGSET_VRF2_VSEL_SHIFT	4
+#define MC13783_REGSET_VMMC1_VSEL_SHIFT	6
+#define MC13783_REGSET_VMMC2_VSEL_SHIFT	9
+
+#define MC13783_REGSET_VVIB_VSEL_MASK	(3 << 0)
+#define MC13783_REGSET_VRF1_VSEL_MASK	(3 << 2)
+#define MC13783_REGSET_VRF2_VSEL_MASK	(3 << 4)
+#define MC13783_REGSET_VMMC1_VSEL_MASK	(7 << 6)
+#define MC13783_REGSET_VMMC2_VSEL_MASK	(7 << 9)
+
+
+/*
  * ADC/Touch
  */
 #define MC13783_ADC0_LICELLCON		(1 << 0)
-- 
1.6.3.3

[PATCH 4/4] MXC: imx31pdk: Trying to enabling regulators on mc13783

[Alberto Panizzo]

This patch register the mc13783 power management chip on the mx31pdk board.
I know that there are too many regulators registered but this is
a trying for best match the resulting internal mc13783 registers with
the state achieved by the freescale kernel immediately before enabling
the GPO1 output. 

Signed-off-by: Alberto Panizzo <alberto.panizzo@gmail.com>
---
 arch/arm/mach-mx3/mx31pdk.c |  287 +++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 287 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-mx3/mx31pdk.c b/arch/arm/mach-mx3/mx31pdk.c
index 5771d0e..3f65050 100644
--- a/arch/arm/mach-mx3/mx31pdk.c
+++ b/arch/arm/mach-mx3/mx31pdk.c
@@ -23,6 +23,9 @@
 #include <linux/gpio.h>
 #include <linux/smsc911x.h>
 #include <linux/platform_device.h>
+#include <linux/mfd/mc13783.h>
+#include <linux/spi/spi.h>
+#include <linux/regulator/machine.h>
 
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
@@ -60,6 +63,8 @@ static int mx31pdk_pins[] = {
 	MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
 	MX31_PIN_CSPI2_SS0__SS0,
 	MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */
+	/* MC13783 IRQ */
+	IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO),
 };
 
 /* SPI */
@@ -74,6 +79,286 @@ static struct spi_imx_master spi1_pdata = {
 	.num_chipselect	= ARRAY_SIZE(spi1_internal_chipselect),
 };
 
+/* MC13783 */
+#define mV_to_uV(mV) (mV * 1000)
+
+static struct regulator_consumer_supply gpo_consumers[] = {
+	{
+		.supply = "REGU_GPO1",
+	}
+};
+
+static struct regulator_init_data gpo1_init = {
+	.constraints = {
+		.boot_on = 1, /* Enable it! */
+	},
+};
+
+static struct regulator_init_data gpo_init = {
+	.constraints = {
+	},
+	.num_consumer_supplies = ARRAY_SIZE(gpo_consumers),
+	.consumer_supplies = gpo_consumers,
+};
+
+static struct regulator_init_data violo_init = {
+	.constraints = {
+		.min_uV = mV_to_uV(1200), /* mc13783 allows min of 1200. */
+		.max_uV = mV_to_uV(1800), /* mc13783 allows max of 1800. */
+		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+		.boot_on = 1,
+	}
+};
+
+static struct regulator_init_data vdig_init = {
+	.constraints = {
+		.min_uV = mV_to_uV(1200), /* mc13783 allows min of 1200. */
+		.max_uV = mV_to_uV(1800), /* mc13783 allows max of 1800. */
+		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+		.boot_on = 1,
+	}
+};
+
+static struct regulator_init_data vgen_init = {
+	.constraints = {
+		.min_uV = mV_to_uV(1800), /* mc13783 allows min of 1100. */
+		.max_uV = mV_to_uV(1800), /* mc13783 allows max of 2775. */
+		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+		.boot_on = 1,
+		.apply_uV = 1,
+	}
+};
+
+static struct regulator_init_data vrfdig_init = {
+	.constraints = {
+		.min_uV = mV_to_uV(1200), /* mc13783 allows min of 1200. */
+		.max_uV = mV_to_uV(1875), /* mc13783 allows max of 1875. */
+		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+		.boot_on = 1,
+	}
+};
+
+static struct regulator_init_data vrfref_init = {
+	.constraints = {
+		.min_uV = mV_to_uV(2475), /* mc13783 allows min of 2475. */
+		.max_uV = mV_to_uV(2775), /* mc13783 allows max of 2775. */
+		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+		.boot_on = 1,
+	}
+};
+
+static struct regulator_init_data vrfcp_init = {
+	.constraints = {
+		.min_uV = mV_to_uV(2700), /* mc13783 allows min of 2700. */
+		.max_uV = mV_to_uV(2775), /* mc13783 allows max of 2775. */
+		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+		.boot_on = 1,
+	}
+};
+
+static struct regulator_init_data vsim_init = {
+	.constraints = {
+		.min_uV = mV_to_uV(1800), /* mc13783 allows min of 1800. */
+		.max_uV = mV_to_uV(2900), /* mc13783 allows max of 2900. */
+		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+	}
+};
+
+static struct regulator_init_data vesim_init = {
+	.constraints = {
+		.min_uV = mV_to_uV(1800), /* mc13783 allows min of 1800. */
+		.max_uV = mV_to_uV(2900), /* mc13783 allows max of 2900. */
+		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+	}
+};
+
+static struct regulator_init_data vcam_init = {
+	.constraints = {
+		.min_uV = mV_to_uV(1500), /* mc13783 allows min of 1500. */
+		.max_uV = mV_to_uV(3000), /* mc13783 allows max of 3000. */
+		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+	}
+};
+
+static struct regulator_init_data vvib_init = {
+	.constraints = {
+		.min_uV = mV_to_uV(1300), /* mc13783 allows min of 1300. */
+		.max_uV = mV_to_uV(3000), /* mc13783 allows max of 3000. */
+		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+	}
+};
+
+static struct regulator_init_data vrf_init = {
+	.constraints = {
+		.min_uV = mV_to_uV(1500), /* mc13783 allows min of 1500. */
+		.max_uV = mV_to_uV(2775), /* mc13783 allows max of 2775. */
+		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+		.boot_on = 1,
+	}
+};
+
+static struct regulator_init_data vmmc_init = {
+	.constraints = {
+		.min_uV = mV_to_uV(1600), /* mc13783 allows min of 1600. */
+		.max_uV = mV_to_uV(3000), /* mc13783 allows max of 3000. */
+		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+	}
+};
+
+static struct regulator_init_data sw3_init = {
+	.constraints = {
+		.min_uV = mV_to_uV(5000), /* mc13783 allows min of 5000. */
+		.max_uV = mV_to_uV(5500), /* mc13783 allows max of 5500. */
+		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+		.boot_on = 1,
+	}
+};
+
+static struct regulator_init_data sw1_init = {
+	.constraints = {
+		.min_uV = mV_to_uV(1625), /* mc13783 allows min of 1200. */
+		.max_uV = mV_to_uV(1625), /* mc13783 allows max of 1600. */
+		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+		/*		  | REGULATOR_CHANGE_MODE,
+		.valid_modes_mask = REGULATOR_MODE_FAST
+				    | REGULATOR_MODE_NORMAL
+				    | REGULATOR_MODE_IDLE
+				    | REGULATOR_MODE_STANDBY,*/
+		.always_on = 1,
+		.boot_on = 1,
+		.apply_uV = 1,
+		/*.initial_state = PM_SUSPEND_MEM,
+		.state_mem = {
+			.uV = mV_to_uV(1250),
+			.mode = REGULATOR_MODE_NORMAL,
+			.enabled = 1,
+		},*/
+	}
+};
+
+static struct regulator_init_data sw_init = {
+	.constraints = {
+		.min_uV = mV_to_uV(1200), /* mc13783 allows min of 900. */
+		.max_uV = mV_to_uV(2200), /* mc13783 allows max of 2200. */
+		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+		.boot_on = 1,
+	}
+};
+
+static struct regulator_init_data vaudio_init = {
+	.constraints = {
+		.boot_on = 1,
+	}
+};
+
+static struct regulator_init_data viohi_init = {
+	.constraints = {
+		.boot_on = 1,
+	}
+};
+
+static struct regulator_init_data vrfbg_init = {
+	.constraints = {
+		.boot_on = 1,
+	}
+};
+
+static struct mc13783_regulator_init_data mx31pdk_regulators[] = {
+	{
+		.id = MC13783_SW_SW1A,
+		.init_data = &sw1_init,
+	},{
+		.id = MC13783_SW_SW1B,
+		.init_data = &sw_init,
+	},{
+		.id = MC13783_SW_SW2A,
+		.init_data = &sw_init,
+	},{
+		.id = MC13783_SW_SW2B,
+		.init_data = &sw_init,
+	},{
+		.id = MC13783_SW_SW3,
+		.init_data = &sw3_init,
+	},{
+		.id = MC13783_REGU_VVIB,
+		.init_data = &vvib_init,
+	},{
+		.id = MC13783_REGU_VAUDIO,
+		.init_data = &vaudio_init,
+	},{
+		.id = MC13783_REGU_VIOHI,
+		.init_data = &viohi_init,
+	},{
+		.id = MC13783_REGU_VIOLO,
+		.init_data = &violo_init,
+	},{
+		.id = MC13783_REGU_VRFCP,
+		.init_data = &vrfcp_init,
+	},{
+		.id = MC13783_REGU_VDIG,
+		.init_data = &vdig_init,
+	},{
+		.id = MC13783_REGU_VGEN,
+		.init_data = &vgen_init,
+	},{
+		.id = MC13783_REGU_VRFDIG,
+		.init_data = &vrfdig_init,
+	},{
+		.id = MC13783_REGU_VRFREF,
+		.init_data = &vrfref_init,
+	},{
+		.id = MC13783_REGU_VSIM,
+		.init_data = &vsim_init,
+	},{
+		.id = MC13783_REGU_VESIM,
+		.init_data = &vesim_init,
+	},{
+		.id = MC13783_REGU_VCAM,
+		.init_data = &vcam_init,
+	},{
+		.id = MC13783_REGU_VRF1,
+		.init_data = &vrf_init,
+	},{
+		.id = MC13783_REGU_VRF2,
+		.init_data = &vrf_init,
+	},{
+		.id = MC13783_REGU_VMMC1,
+		.init_data = &vmmc_init,
+	},{
+		.id = MC13783_REGU_VMMC2,
+		.init_data = &vmmc_init,
+	},{
+		.id = MC13783_REGU_GPO3, /* GPO3 -> enables SW2B 1.8V out
+					  * this becomes 1V8 on personality
+					  * board.
+					  */
+		.init_data = &gpo_init,
+	},{
+		.id = MC13783_REGU_GPO1, /* Power Enable */
+		.init_data = &gpo1_init,
+	},
+};
+
+static struct mc13783_platform_data mc13783_pdata __initdata = {
+	.regulators = mx31pdk_regulators,
+	.num_regulators = ARRAY_SIZE(mx31pdk_regulators),
+	.flags  = MC13783_USE_REGULATOR | MC13783_USE_RTC
+		| MC13783_USE_ADC,
+};
+
+static struct spi_board_info mx31pdk_spi_devs[] __initdata = {
+	{
+		.modalias	= "mc13783",
+		.max_speed_hz	= 500000,
+		.bus_num	= 1,
+		.chip_select	= 1, /* SS2 */
+		.platform_data	= &mc13783_pdata,
+		.irq		= IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
+		.mode = SPI_CS_HIGH,
+	},
+};
+
+
 
 /*
  * NAND Flash
@@ -272,7 +557,9 @@ static void __init mxc_board_init(void)
 
 	mxc_register_device(&mxc_uart_device0, &uart_pdata);
 	mxc_register_device(&mxc_nand_device, &imx31pdk_nand_flash_pdata);
+
 	mxc_register_device(&mxc_spi_device1, &spi1_pdata);
+	spi_register_board_info(mx31pdk_spi_devs, ARRAY_SIZE(mx31pdk_spi_devs));
 
 	if (!mx31pdk_init_expio())
 		platform_device_register(&smsc911x_device);
-- 
1.6.3.3

[PATCH 4/4] MXC: imx31pdk: Trying to enabling regulators on mc13783

[Mark Brown]

On Thu, Dec 10, 2009 at 07:56:44PM +0100, Alberto Panizzo wrote:

> +/* MC13783 */
> +#define mV_to_uV(mV) (mV * 1000)

Define this somewhere global, it's generally useful.

> +
> +static struct regulator_consumer_supply gpo_consumers[] = {
> +	{
> +		.supply = "REGU_GPO1",
> +	}

What's this supply for?  Normally a supply should be specific to a
device.

> +static struct regulator_init_data gpo1_init = {
> +	.constraints = {
> +		.boot_on = 1, /* Enable it! */

I suspect you'll want always_on there - otherwise the regulator might
get switched off underneath you if the regulator core changes to make
regulator_has_full_constraints() the default.

> +static struct regulator_init_data violo_init = {
> +	.constraints = {
> +		.min_uV = mV_to_uV(1200), /* mc13783 allows min of 1200. */
> +		.max_uV = mV_to_uV(1800), /* mc13783 allows max of 1800. */

The constraints would normally be derived from the board - if none of
them want to adjust the voltage then there should be at most one voltage
specified (the voltage the system should use).

MXC: mx31pdk: mc13783: Trying to full support mc13783 regulators

[Alberto Panizzo]

Oh! I forget! I am testing this without the personality board!
and this is a typical kernel debug output:

Uncompressing
Linux..........................................................................................................................................
Linux version 2.6.32-rc6-g7eeda2b-dirty (alberto at climbing-alby) (gcc
version 4.3.2 (OSELAS.Toolchain-1.99.3) ) #99 PREEMPT Thu Dec 10
18:59:37 CET 2009
CPU: ARMv6-compatible processor [4107b364] revision 4 (ARMv6TEJ),
cr=00c5387f
CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache
Machine: Freescale MX31PDK (3DS)
Memory policy: ECC disabled, Data cache writeback
On node 0 totalpages: 32768
free_area_init_node: node 0, pgdat c053e0e4, node_mem_map c0a8c000
  Normal zone: 256 pages used for memmap
  Normal zone: 0 pages reserved
  Normal zone: 32512 pages, LIFO batch:7
Built 1 zonelists in Zone order, mobility grouping on.  Total pages:
32512
Kernel command line: console= tty0 console=ttymxc0  debug
PID hash table entries: 512 (order: -1, 2048 bytes)
Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
Memory: 128MB = 128MB total
Memory: 118996KB available (3520K code, 7027K data, 112K init, 0K
highmem)
Hierarchical RCU implementation.
NR_IRQS:180
MXC GPIO hardware
MXC IRQ initialized
Clock input source is 26000000
CPU identified as i.MX31, silicon rev 2.0
Console: colour dummy device 80x30
Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar
... MAX_LOCKDEP_SUBCLASSES:  8
... MAX_LOCK_DEPTH:          48
... MAX_LOCKDEP_KEYS:        8191
... CLASSHASH_SIZE:          4096
... MAX_LOCKDEP_ENTRIES:     16384
... MAX_LOCKDEP_CHAINS:      32768
... CHAINHASH_SIZE:          16384
 memory used by lock dependency info: 3951 kB
 per task-struct memory footprint: 2304 bytes
Calibrating delay loop... 529.20 BogoMIPS (lpj=2646016)
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
------------[ cut here ]------------
WARNING: at kernel/lockdep.c:3154 check_flags+0xc0/0x1d4()
Modules linked in:
[<c002aa50>] (unwind_backtrace+0x0/0xdc) from [<c003db08>]
(warn_slowpath_common+0x4c/0x80)
[<c003db08>] (warn_slowpath_common+0x4c/0x80) from [<c005fdbc>]
(check_flags+0xc0/0x1d4)
[<c005fdbc>] (check_flags+0xc0/0x1d4) from [<c006527c>] (lock_acquire
+0x40/0x98)
[<c006527c>] (lock_acquire+0x40/0x98) from [<c02b2670>] (_spin_lock
+0x40/0x78)
[<c02b2670>] (_spin_lock+0x40/0x78) from [<c00a3670>] (set_task_comm
+0x18/0x34)
[<c00a3670>] (set_task_comm+0x18/0x34) from [<c0052730>] (kthreadd
+0x24/0xf4)
[<c0052730>] (kthreadd+0x24/0xf4) from [<c0025f78>] (kernel_thread_exit
+0x0/0x8)
---[ end trace 1b75b31a2719ed1c ]---
possible reason: unannotated irqs-on.
irq event stamp: 1
hardirqs last  enabled at (0): [<(null)>] (null)
hardirqs last disabled at (1): [<c0024fcc>] ret_slow_syscall+0xc/0x1c
softirqs last  enabled at (0): [<c003c548>] copy_process+0x35c/0xec4
softirqs last disabled at (0): [<(null)>] (null)
regulator: core version 0.5
NET: Registered protocol family 16
i.MX31PDK Debug board detected, rev = 0x0200
L2X0 cache controller enabled
bio: create slab <bio-0> at 0
Switching to clocksource mxc_timer1
NET: Registered protocol family 2
IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
TCP established hash table entries: 4096 (order: 3, 32768 bytes)
TCP bind hash table entries: 4096 (order: 5, 163840 bytes)
TCP: Hash tables configured (established 4096 bind 4096)
TCP reno registered
NET: Registered protocol family 1
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
JFFS2 version 2.2. (NAND) ?? 2001-2006 Red Hat, Inc.
msgmni has been set to 232
alg: No test for stdrng (krng)
io scheduler noop registered
io scheduler anticipatory registered
io scheduler deadline registered
io scheduler cfq registered (default)
Serial: IMX driver
imx-uart.0: ttymxc0 at MMIO 0x43f90000 (irq = 45) is a IMX
Serial: Console IMX rounded baud rate from 115201 to 115200
console [ttymxc0] enabled
NAND device: Manufacturer ID: 0xec, Chip ID: 0xaa (Samsung NAND 256MiB
1,8V 8-bit)
Scanning device for bad blocks
Bad eraseblock 55 at 0x0000006e0000
Bad eraseblock 115 at 0x000000e60000
Bad eraseblock 116 at 0x000000e80000
Bad eraseblock 117 at 0x000000ea0000
Bad eraseblock 118 at 0x000000ec0000
Bad eraseblock 119 at 0x000000ee0000
Bad eraseblock 120 at 0x000000f00000
Bad eraseblock 1688 at 0x00000d300000
Bad eraseblock 1735 at 0x00000d8e0000
Bad eraseblock 1742 at 0x00000d9c0000
Searching for RedBoot partition table in mxc_nand at offset 0x80000
5 RedBoot partitions found on MTD device mxc_nand
Creating 5 MTD partitions on "mxc_nand":
0x000000000000-0x000000040000 : "RedBoot"
0x000000080000-0x00000009f000 : "FIS directory"
mtd: partition "FIS directory" doesn't end on an erase block -- force
read-only
0x00000009f000-0x0000000a0000 : "RedBoot config"
mtd: partition "RedBoot config" doesn't start on an erase block boundary
-- force read-only
0x000000100000-0x000000500000 : "kernel"
0x000000600000-0x000002ac0000 : "root"
spi_imx_setup: mode 4, 8 bpw, 500000 hz
spi_imx_setup: mode 4, 32 bpw, 500000 hz
mc13783 spi1.1: MC13783 Rev 3.3 FinVer 0 detected
mc13783_write frame: 0x80ffffff
mc13783_write frame: 0x82ffffff
mc13783_write frame: 0x86ffffff
mc13783_write frame: 0x88ffffff
mc13783_set_bits reg: 1, mask: 0x1, val: 0x0
mc13783_set_bits read ret: 0, tmp: 0xe9ffff
mc13783_write frame: 0x82e9fffe
mc13783_set_bits write ret: 0, tmp: 0xe9fffe
mc13783_set_bits done
mc13783-regulator mc13783-regulator: mc13783_regulator_probe id -1
mc13783_set_bits reg: 32, mask: 0x492412, val: 0x492412
mc13783_set_bits read ret: 0, tmp: 0x249249
mc13783_write frame: 0xc06db65b
mc13783_set_bits write ret: 0, tmp: 0x6db65b
mc13783_set_bits done
mc13783_set_bits reg: 33, mask: 0x492492, val: 0x492492
mc13783_set_bits read ret: 0, tmp: 0x249240
mc13783_write frame: 0xc26db6d2
mc13783_set_bits write ret: 0, tmp: 0x6db6d2
mc13783_set_bits done
mc13783_set_bits reg: 29, mask: 0x200000, val: 0x200000
mc13783_set_bits read ret: 0, tmp: 0x1e1605
mc13783_write frame: 0xba3e1605
mc13783_set_bits write ret: 0, tmp: 0x3e1605
mc13783_set_bits done
regulator regulator.0: mc13783_set_voltage id: 0 min_uV: 1625000 max_uV:
1625000
regulator regulator.0: mc13783_set_voltage n_voltages: 64 
regulator regulator.0: mc13783_set_voltage best value: 29 
regulator regulator.0: mc13783_set_voltage id: 0 best index: 29
mc13783_set_bits reg: 24, mask: 0x3f, val: 0x1d
mc13783_set_bits read ret: 0, tmp: 0x1c71c
mc13783_write frame: 0xb001c71d
mc13783_set_bits write ret: 0, tmp: 0x1c71d
mc13783_set_bits done
regulator regulator.0: mc13783_enable id: 0
regulator: SW_SW1A: 1625 mV 
regulator regulator.1: mc13783_enable id: 1
regulator: SW_SW1B: 1200 <--> 2200 mV 
regulator regulator.2: mc13783_enable id: 2
regulator: SW_SW2A: 1200 <--> 2200 mV 
regulator regulator.3: mc13783_enable id: 3
regulator: SW_SW2B: 1200 <--> 2200 mV 
regulator regulator.4: mc13783_enable id: 4
mc13783_set_bits reg: 29, mask: 0x100000, val: 0x100000
mc13783_set_bits read ret: 0, tmp: 0x3e1605
mc13783_write frame: 0xba3e1605
mc13783_set_bits write ret: 0, tmp: 0x3e1605
mc13783_set_bits done
regulator regulator.4: mc13783_enable ret: 0
regulator: SW_SW3: 5000 <--> 5500 mV 
regulator: REGU_VVIB: 1300 <--> 3000 mV 
set_machine_constraints: override 'REGU_VAUDIO' min_uV, 1 -> 2775000
set_machine_constraints: override 'REGU_VAUDIO' max_uV, 2147483647 ->
2775000
regulator regulator.6: mc13783_enable id: 6
mc13783_set_bits reg: 32, mask: 0x1, val: 0x1
mc13783_set_bits read ret: 0, tmp: 0x6db65b
mc13783_write frame: 0xc06db65b
mc13783_set_bits write ret: 0, tmp: 0x6db65b
mc13783_set_bits done
regulator regulator.6: mc13783_enable ret: 0
regulator: REGU_VAUDIO: 2775 mV 
set_machine_constraints: override 'REGU_VIOHI' min_uV, 1 -> 2775000
set_machine_constraints: override 'REGU_VIOHI' max_uV, 2147483647 ->
2775000
regulator regulator.7: mc13783_enable id: 7
mc13783_set_bits reg: 32, mask: 0x8, val: 0x8
mc13783_set_bits read ret: 0, tmp: 0x6db65b
mc13783_write frame: 0xc06db65b
mc13783_set_bits write ret: 0, tmp: 0x6db65b
mc13783_set_bits done
regulator regulator.7: mc13783_enable ret: 0
regulator: REGU_VIOHI: 2775 mV 
regulator regulator.8: mc13783_enable id: 8
mc13783_set_bits reg: 32, mask: 0x40, val: 0x40
mc13783_set_bits read ret: 0, tmp: 0x6db65b
mc13783_write frame: 0xc06db65b
mc13783_set_bits write ret: 0, tmp: 0x6db65b
mc13783_set_bits done
regulator regulator.8: mc13783_enable ret: 0
regulator: REGU_VIOLO: 1200 <--> 1800 mV 
regulator regulator.9: mc13783_enable id: 13
mc13783_set_bits reg: 32, mask: 0x200000, val: 0x200000
mc13783_set_bits read ret: 0, tmp: 0x6db65b
mc13783_write frame: 0xc06db65b
mc13783_set_bits write ret: 0, tmp: 0x6db65b
mc13783_set_bits done
regulator regulator.9: mc13783_enable ret: 0
regulator: REGU_VRFCP: 2700 <--> 2775 mV 
regulator regulator.10: mc13783_enable id: 9
mc13783_set_bits reg: 32, mask: 0x200, val: 0x200
mc13783_set_bits read ret: 0, tmp: 0x6db65b
mc13783_write frame: 0xc06db65b
mc13783_set_bits write ret: 0, tmp: 0x6db65b
mc13783_set_bits done
regulator regulator.10: mc13783_enable ret: 0
regulator: REGU_VDIG: 1200 <--> 1800 mV 
regulator regulator.11: mc13783_set_voltage id: 10 min_uV: 1800000
max_uV: 1800000
regulator regulator.11: mc13783_set_voltage n_voltages: 8 
regulator regulator.11: mc13783_set_voltage best value: 3 
regulator regulator.11: mc13783_set_voltage id: 10 best index: 3
mc13783_set_bits reg: 30, mask: 0x1c0, val: 0xc0
mc13783_set_bits read ret: 0, tmp: 0x63eac
mc13783_write frame: 0xbc063eec
mc13783_set_bits write ret: 0, tmp: 0x63eec
mc13783_set_bits done
regulator regulator.11: mc13783_enable id: 10
mc13783_set_bits reg: 32, mask: 0x1000, val: 0x1000
mc13783_set_bits read ret: 0, tmp: 0x6db65b
mc13783_write frame: 0xc06db65b
mc13783_set_bits write ret: 0, tmp: 0x6db65b
mc13783_set_bits done
regulator regulator.11: mc13783_enable ret: 0
regulator: REGU_VGEN: 1800 mV 
regulator regulator.12: mc13783_enable id: 11
mc13783_set_bits reg: 32, mask: 0x8000, val: 0x8000
mc13783_set_bits read ret: 0, tmp: 0x6db65b
mc13783_write frame: 0xc06db65b
mc13783_set_bits write ret: 0, tmp: 0x6db65b
mc13783_set_bits done
regulator regulator.12: mc13783_enable ret: 0
regulator: REGU_VRFDIG: 1200 <--> 1875 mV 
regulator regulator.13: mc13783_enable id: 12
mc13783_set_bits reg: 32, mask: 0x40000, val: 0x40000
mc13783_set_bits read ret: 0, tmp: 0x6db65b
mc13783_write frame: 0xc06db65b
mc13783_set_bits write ret: 0, tmp: 0x6db65b
mc13783_set_bits done
regulator regulator.13: mc13783_enable ret: 0
regulator: REGU_VRFREF: 2475 <--> 2775 mV 
regulator: REGU_VSIM: 1800 <--> 2900 mV 
regulator: REGU_VESIM: 1800 <--> 2900 mV 
regulator: REGU_VCAM: 1500 <--> 3000 mV 
regulator regulator.17: mc13783_enable id: 19
mc13783_set_bits reg: 33, mask: 0x1000, val: 0x1000
mc13783_set_bits read ret: 0, tmp: 0x6db6d2
mc13783_write frame: 0xc26db6d2
mc13783_set_bits write ret: 0, tmp: 0x6db6d2
mc13783_set_bits done
regulator regulator.17: mc13783_enable ret: 0
regulator: REGU_VRF1: 1500 <--> 2775 mV 
regulator regulator.18: mc13783_enable id: 20
mc13783_set_bits reg: 33, mask: 0x8000, val: 0x8000
mc13783_set_bits read ret: 0, tmp: 0x6db6d2
mc13783_write frame: 0xc26db6d2
mc13783_set_bits write ret: 0, tmp: 0x6db6d2
mc13783_set_bits done
regulator regulator.18: mc13783_enable ret: 0
regulator: REGU_VRF2: 1500 <--> 2775 mV 
regulator: REGU_VMMC1: 1600 <--> 3000 mV 
regulator: REGU_VMMC2: 1600 <--> 3000 mV 
regulator: REGU_GPO3: 0 mV 
regulator regulator.22: reg: 0, val: 0
regulator regulator.22: reg: 1, val: e9fffe
regulator regulator.22: reg: 2, val: 8d840
regulator regulator.22: reg: 3, val: 0
regulator regulator.22: reg: 4, val: ffffff
regulator regulator.22: reg: 5, val: 4838
regulator regulator.22: reg: 6, val: 9c46
regulator regulator.22: reg: 7, val: 9b
regulator regulator.22: reg: 8, val: 0
regulator regulator.22: reg: 9, val: 0
regulator regulator.22: reg: 10, val: 0
regulator regulator.22: reg: 11, val: 0
regulator regulator.22: reg: 12, val: 0
regulator regulator.22: reg: 13, val: 40
regulator regulator.22: reg: 14, val: 0
regulator regulator.22: reg: 15, val: 0
regulator regulator.22: reg: 16, val: 200000
regulator regulator.22: reg: 17, val: 0
regulator regulator.22: reg: 18, val: 0
regulator regulator.22: reg: 19, val: 0
regulator regulator.22: reg: 20, val: 10
regulator regulator.22: reg: 21, val: 1ffff
regulator regulator.22: reg: 22, val: 0
regulator regulator.22: reg: 23, val: 7fff
regulator regulator.22: reg: 24, val: 1c71d
regulator regulator.22: reg: 25, val: 1c71c
regulator regulator.22: reg: 26, val: 24924
regulator regulator.22: reg: 27, val: 24924
regulator regulator.22: reg: 28, val: 221605
regulator regulator.22: reg: 29, val: 3e1605
regulator regulator.22: reg: 30, val: 63eec
regulator regulator.22: reg: 31, val: b7c
regulator regulator.22: reg: 32, val: 6db65b
regulator regulator.22: reg: 33, val: 6db6d2
regulator regulator.22: reg: 34, val: 18000
regulator regulator.22: reg: 35, val: 0
regulator regulator.22: reg: 36, val: 1000
regulator regulator.22: reg: 37, val: d35a
regulator regulator.22: reg: 38, val: 420000
regulator regulator.22: reg: 39, val: 13060
regulator regulator.22: reg: 40, val: 180027
regulator regulator.22: reg: 41, val: e0004
regulator regulator.22: reg: 42, val: 0
regulator regulator.22: reg: 43, val: 8000
regulator regulator.22: reg: 44, val: 0
regulator regulator.22: reg: 45, val: ffffff
regulator regulator.22: reg: 46, val: 80
regulator regulator.22: reg: 47, val: 0
regulator regulator.22: reg: 48, val: 0
regulator regulator.22: reg: 49, val: e0060
regulator regulator.22: reg: 50, val: 6
regulator regulator.22: reg: 51, val: 0
regulator regulator.22: reg: 52, val: 0
regulator regulator.22: reg: 53, val: 0
regulator regulator.22: reg: 54, val: 0
regulator regulator.22: reg: 55, val: 0
regulator regulator.22: reg: 56, val: 0
regulator regulator.22: reg: 57, val: 0
regulator regulator.22: reg: 58, val: 0
regulator regulator.22: reg: 59, val: 0
regulator regulator.22: reg: 60, val: 0
regulator regulator.22: reg: 61, val: 0
regulator regulator.22: reg: 62, val: 0
regulator regulator.22: reg: 63, val: 0
regulator regulator.22: mc13783_enable id: 23
mc13783_set_bits reg: 34, mask: 0x40, val: 0x40
mc13783_set_bits read ret: 0, tmp: 0x18000
mc13783_write frame: 0xc4018040




No more message.
I have modified the mc13783_write function (function that write
something in mc13783 registers) to light a debug led at the beginning
and to shout down it before return. 
This led at the remain on -> no strange interference with serial output,
the cpu is really hanged.

And, another important: all GPOn enabling call, enable the corresponding
output before freezing.

[PATCH 4/4] MXC: imx31pdk: Trying to enabling regulators on mc13783

[Alberto Panizzo]

Il giorno gio, 10/12/2009 alle 19.10 +0000, Mark Brown ha scritto:
> On Thu, Dec 10, 2009 at 07:56:44PM +0100, Alberto Panizzo wrote:
> 
> > +/* MC13783 */
> > +#define mV_to_uV(mV) (mV * 1000)
> 
> Define this somewhere global, it's generally useful.

Yes, maybe in include/linux/mfd/mc13783.h 

> 
> > +
> > +static struct regulator_consumer_supply gpo_consumers[] = {
> > +	{
> > +		.supply = "REGU_GPO1",
> > +	}
> 
> What's this supply for?  Normally a supply should be specific to a
> device.

Right, it is just a tentative to reproduce the freescale working code.

> 
> > +static struct regulator_init_data gpo1_init = {
> > +	.constraints = {
> > +		.boot_on = 1, /* Enable it! */
> 
> I suspect you'll want always_on there - otherwise the regulator might
> get switched off underneath you if the regulator core changes to make
> regulator_has_full_constraints() the default.
> 
> > +static struct regulator_init_data violo_init = {
> > +	.constraints = {
> > +		.min_uV = mV_to_uV(1200), /* mc13783 allows min of 1200. */
> > +		.max_uV = mV_to_uV(1800), /* mc13783 allows max of 1800. */
> 
> The constraints would normally be derived from the board - if none of
> them want to adjust the voltage then there should be at most one voltage
> specified (the voltage the system should use).

Ok, the definitive patch will embrace those. Could you suggest something
on the main problem? 

This patch is a try, not the really, I decided to post this series because
I've tried all my options but the system freezes when a mc 13783 GPOn output
is enabled..

[PATCH 4/4] MXC: imx31pdk: Trying to enabling regulators on mc13783

[Mark Brown]

On Thu, Dec 10, 2009 at 08:27:28PM +0100, Alberto Panizzo wrote:
> Il giorno gio, 10/12/2009 alle 19.10 +0000, Mark Brown ha scritto:
> > On Thu, Dec 10, 2009 at 07:56:44PM +0100, Alberto Panizzo wrote:

> > > +#define mV_to_uV(mV) (mV * 1000)

> > Define this somewhere global, it's generally useful.

> Yes, maybe in include/linux/mfd/mc13783.h 

It's not exactly Atlas-specific either, though?

> > > +static struct regulator_consumer_supply gpo_consumers[] = {
> > > +	{
> > > +		.supply = "REGU_GPO1",
> > > +	}

> > What's this supply for?  Normally a supply should be specific to a
> > device.

> Right, it is just a tentative to reproduce the freescale working code.

I suspect the Freescale code isn't mainlinable as-is; I would suggest
removing the consumer until there is an actual consumer which can make
use of this to be on the safe side.

> > > +static struct regulator_init_data violo_init = {
> > > +	.constraints = {
> > > +		.min_uV = mV_to_uV(1200), /* mc13783 allows min of 1200. */
> > > +		.max_uV = mV_to_uV(1800), /* mc13783 allows max of 1800. */

> > The constraints would normally be derived from the board - if none of
> > them want to adjust the voltage then there should be at most one voltage
> > specified (the voltage the system should use).

> Ok, the definitive patch will embrace those. Could you suggest something
> on the main problem? 

> This patch is a try, not the really, I decided to post this series because
> I've tried all my options but the system freezes when a mc 13783 GPOn output
> is enabled..

I'd suggest looking at the other supplies and seeing if they behave
themselves while that comes up, and also looking at the devices that are
connected to that supply and seeing what they might do when power is
applied.

[PATCH 4/4] MXC: imx31pdk: Trying to enabling regulators on mc13783

[Liam Girdwood]

On Thu, 2009-12-10 at 20:27 +0100, Alberto Panizzo wrote:
> Il giorno gio, 10/12/2009 alle 19.10 +0000, Mark Brown ha scritto:
> > On Thu, Dec 10, 2009 at 07:56:44PM +0100, Alberto Panizzo wrote:
> > 
> > > +/* MC13783 */
> > > +#define mV_to_uV(mV) (mV * 1000)
> > 
> > Define this somewhere global, it's generally useful.
> 
> Yes, maybe in include/linux/mfd/mc13783.h 
> 

This is actually quite useful to other drivers too as most seem to work
in mV. What about in regulator/driver.h 

Thanks

Liam

MXC: mx31pdk: mc13783: Trying to full support mc13783 regulators

[Russell King - ARM Linux]

On Thu, Dec 10, 2009 at 08:11:32PM +0100, Alberto Panizzo wrote:
> ------------[ cut here ]------------
> WARNING: at kernel/lockdep.c:3154 check_flags+0xc0/0x1d4()
> Modules linked in:
> [<c002aa50>] (unwind_backtrace+0x0/0xdc) from [<c003db08>]
> (warn_slowpath_common+0x4c/0x80)
> [<c003db08>] (warn_slowpath_common+0x4c/0x80) from [<c005fdbc>]
> (check_flags+0xc0/0x1d4)
> [<c005fdbc>] (check_flags+0xc0/0x1d4) from [<c006527c>] (lock_acquire
> +0x40/0x98)
> [<c006527c>] (lock_acquire+0x40/0x98) from [<c02b2670>] (_spin_lock
> +0x40/0x78)
> [<c02b2670>] (_spin_lock+0x40/0x78) from [<c00a3670>] (set_task_comm
> +0x18/0x34)
> [<c00a3670>] (set_task_comm+0x18/0x34) from [<c0052730>] (kthreadd
> +0x24/0xf4)
> [<c0052730>] (kthreadd+0x24/0xf4) from [<c0025f78>] (kernel_thread_exit
> +0x0/0x8)
> ---[ end trace 1b75b31a2719ed1c ]---
> possible reason: unannotated irqs-on.
> irq event stamp: 1
> hardirqs last  enabled at (0): [<(null)>] (null)
> hardirqs last disabled at (1): [<c0024fcc>] ret_slow_syscall+0xc/0x1c
> softirqs last  enabled at (0): [<c003c548>] copy_process+0x35c/0xec4
> softirqs last disabled at (0): [<(null)>] (null)

BTW, this warning is created by the hidden irqs-on in the ret_slow_syscall
path - clearly we can't call lockdep to tell it that IRQs are now on once
they are because we'll generally be in userspace at that point.  I'm not
sure what the right answer to this is yet.

[PATCH 4/4] MXC: imx31pdk: Trying to enabling regulators on mc13783

[Sascha linux-arm]

On Thu, Dec 10, 2009 at 07:10:17PM +0000, Mark Brown wrote:
> On Thu, Dec 10, 2009 at 07:56:44PM +0100, Alberto Panizzo wrote:
> 
> > +/* MC13783 */
> > +#define mV_to_uV(mV) (mV * 1000)
> 
> Define this somewhere global, it's generally useful.

And please define it like

#define mV_to_uV(mV) ((mV) * 1000)

Sascha


-- 
Pengutronix e.K.                           |                             |
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[PATCH 3/4] MXC: mc13783: Developing, trying to full support regulators.

[Uwe Kleine-König]

Hello,

On Thu, Dec 10, 2009 at 07:50:13PM +0100, Alberto Panizzo wrote:
> This patch add the ability to change voltages settings
> for all possible mc13783 regulators.
> Pay attention that it is a development patch with many 
> debug messages enabled.

Can you please develop on top of my rewrite of
drivers/mfd/mc13783-core.c that currently sits in 

	git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-2.6.git for-next

and waits to hit Linus' tree.
The same applies to drivers/regulator/mc13783.c (though my update sits
in 

	git://git.kernel.org/pub/scm/linux/kernel/git/lrg/voltage-2.6.git for-next

And note that I plan to get rid of include/linux/mfd/mc13783-private.h.

> +	printk(KERN_DEBUG "%s frame: 0x%x\n", __func__, frame);
> +
if you define DEBUG, you can use pr_debug or better dev_dbg.

Best regards
Uwe

-- 
Pengutronix e.K.                              | Uwe Kleine-K?nig            |
Industrial Linux Solutions                    | http://www.pengutronix.de/  |