* [PATCH] ARM: SAMSUNG: Move pwm-clock code into plat-samsung
2010-01-08 2:36 Samsung SoC common code updates Ben Dooks
@ 2010-01-08 2:36 ` Ben Dooks
2010-01-08 2:36 ` [PATCH] ARM: SAMSUNG: Move device definitions in plat-samsung Ben Dooks
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Ben Dooks @ 2010-01-08 2:36 UTC (permalink / raw)
To: linux-arm-kernel
Move the code for the pwm-clock into plat-samsung, as it is common to
all Samsung SoCs.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
---
arch/arm/plat-s3c/Makefile | 1 -
arch/arm/plat-samsung/Makefile | 1 +
arch/arm/{plat-s3c => plat-samsung}/pwm-clock.c | 0
3 files changed, 1 insertions(+), 1 deletions(-)
rename arch/arm/{plat-s3c => plat-samsung}/pwm-clock.c (100%)
diff --git a/arch/arm/plat-s3c/Makefile b/arch/arm/plat-s3c/Makefile
index 99f91ad..ef10a91 100644
--- a/arch/arm/plat-s3c/Makefile
+++ b/arch/arm/plat-s3c/Makefile
@@ -13,7 +13,6 @@ obj- :=
obj-y += init.o
obj-y += time.o
-obj-y += pwm-clock.o
obj-y += gpio.o
obj-y += gpio-config.o
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 7612198..d4d5f94 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -12,5 +12,6 @@ obj- :=
# Objects we always build independent of SoC choice
obj-y += clock.o
+obj-y += pwm-clock.o
obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o
diff --git a/arch/arm/plat-s3c/pwm-clock.c b/arch/arm/plat-samsung/pwm-clock.c
similarity index 100%
rename from arch/arm/plat-s3c/pwm-clock.c
rename to arch/arm/plat-samsung/pwm-clock.c
--
1.6.0.4
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH] ARM: SAMSUNG: Move device definitions in plat-samsung
2010-01-08 2:36 Samsung SoC common code updates Ben Dooks
2010-01-08 2:36 ` [PATCH] ARM: SAMSUNG: Move pwm-clock code into plat-samsung Ben Dooks
@ 2010-01-08 2:36 ` Ben Dooks
2010-01-08 2:37 ` [PATCH] ARM: SAMSUNG: Move gpio-config.c into plat-samsung Ben Dooks
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Ben Dooks @ 2010-01-08 2:36 UTC (permalink / raw)
To: linux-arm-kernel
Move all the platform device definitions from plat-s3c into plat-samsung
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
---
arch/arm/plat-s3c/Kconfig | 42 --------------------
arch/arm/plat-s3c/Makefile | 12 ------
arch/arm/plat-samsung/Kconfig | 42 ++++++++++++++++++++
arch/arm/plat-samsung/Makefile | 12 ++++++
arch/arm/{plat-s3c => plat-samsung}/dev-fb.c | 0
arch/arm/{plat-s3c => plat-samsung}/dev-hsmmc.c | 0
arch/arm/{plat-s3c => plat-samsung}/dev-hsmmc1.c | 0
arch/arm/{plat-s3c => plat-samsung}/dev-hsmmc2.c | 0
arch/arm/{plat-s3c => plat-samsung}/dev-i2c0.c | 0
arch/arm/{plat-s3c => plat-samsung}/dev-i2c1.c | 0
arch/arm/{plat-s3c => plat-samsung}/dev-nand.c | 0
.../arm/{plat-s3c => plat-samsung}/dev-usb-hsotg.c | 0
arch/arm/{plat-s3c => plat-samsung}/dev-usb.c | 0
13 files changed, 54 insertions(+), 54 deletions(-)
rename arch/arm/{plat-s3c => plat-samsung}/dev-fb.c (100%)
rename arch/arm/{plat-s3c => plat-samsung}/dev-hsmmc.c (100%)
rename arch/arm/{plat-s3c => plat-samsung}/dev-hsmmc1.c (100%)
rename arch/arm/{plat-s3c => plat-samsung}/dev-hsmmc2.c (100%)
rename arch/arm/{plat-s3c => plat-samsung}/dev-i2c0.c (100%)
rename arch/arm/{plat-s3c => plat-samsung}/dev-i2c1.c (100%)
rename arch/arm/{plat-s3c => plat-samsung}/dev-nand.c (100%)
rename arch/arm/{plat-s3c => plat-samsung}/dev-usb-hsotg.c (100%)
rename arch/arm/{plat-s3c => plat-samsung}/dev-usb.c (100%)
diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig
index 9e9d028..cd979b1 100644
--- a/arch/arm/plat-s3c/Kconfig
+++ b/arch/arm/plat-s3c/Kconfig
@@ -170,46 +170,4 @@ config S3C_DMA
help
Internal configuration for S3C DMA core
-# device definitions to compile in
-
-config S3C_DEV_HSMMC
- bool
- help
- Compile in platform device definitions for HSMMC code
-
-config S3C_DEV_HSMMC1
- bool
- help
- Compile in platform device definitions for HSMMC channel 1
-
-config S3C_DEV_HSMMC2
- bool
- help
- Compile in platform device definitions for HSMMC channel 2
-
-config S3C_DEV_I2C1
- bool
- help
- Compile in platform device definitions for I2C channel 1
-
-config S3C_DEV_FB
- bool
- help
- Compile in platform device definition for framebuffer
-
-config S3C_DEV_USB_HOST
- bool
- help
- Compile in platform device definition for USB host.
-
-config S3C_DEV_USB_HSOTG
- bool
- help
- Compile in platform device definition for USB high-speed OtG
-
-config S3C_DEV_NAND
- bool
- help
- Compile in platform device definition for NAND controller
-
endif
diff --git a/arch/arm/plat-s3c/Makefile b/arch/arm/plat-s3c/Makefile
index ef10a91..d862995 100644
--- a/arch/arm/plat-s3c/Makefile
+++ b/arch/arm/plat-s3c/Makefile
@@ -29,15 +29,3 @@ obj-$(CONFIG_S3C2410_PM_CHECK) += pm-check.o
# PWM support
obj-$(CONFIG_HAVE_PWM) += pwm.o
-
-# devices
-
-obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o
-obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o
-obj-$(CONFIG_S3C_DEV_HSMMC2) += dev-hsmmc2.o
-obj-y += dev-i2c0.o
-obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o
-obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o
-obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o
-obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o
-obj-$(CONFIG_S3C_DEV_NAND) += dev-nand.o
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index e3ae684..5a72a52 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -19,4 +19,46 @@ config SAMSUNG_CLKSRC
Select the clock code for the clksrc implementation
used by newer systems such as the S3C64XX.
+# device definitions to compile in
+
+config S3C_DEV_HSMMC
+ bool
+ help
+ Compile in platform device definitions for HSMMC code
+
+config S3C_DEV_HSMMC1
+ bool
+ help
+ Compile in platform device definitions for HSMMC channel 1
+
+config S3C_DEV_HSMMC2
+ bool
+ help
+ Compile in platform device definitions for HSMMC channel 2
+
+config S3C_DEV_I2C1
+ bool
+ help
+ Compile in platform device definitions for I2C channel 1
+
+config S3C_DEV_FB
+ bool
+ help
+ Compile in platform device definition for framebuffer
+
+config S3C_DEV_USB_HOST
+ bool
+ help
+ Compile in platform device definition for USB host.
+
+config S3C_DEV_USB_HSOTG
+ bool
+ help
+ Compile in platform device definition for USB high-speed OtG
+
+config S3C_DEV_NAND
+ bool
+ help
+ Compile in platform device definition for NAND controller
+
endif
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index d4d5f94..32f03e5 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -15,3 +15,15 @@ obj-y += clock.o
obj-y += pwm-clock.o
obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o
+
+# devices
+
+obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o
+obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o
+obj-$(CONFIG_S3C_DEV_HSMMC2) += dev-hsmmc2.o
+obj-y += dev-i2c0.o
+obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o
+obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o
+obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o
+obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o
+obj-$(CONFIG_S3C_DEV_NAND) += dev-nand.o
diff --git a/arch/arm/plat-s3c/dev-fb.c b/arch/arm/plat-samsung/dev-fb.c
similarity index 100%
rename from arch/arm/plat-s3c/dev-fb.c
rename to arch/arm/plat-samsung/dev-fb.c
diff --git a/arch/arm/plat-s3c/dev-hsmmc.c b/arch/arm/plat-samsung/dev-hsmmc.c
similarity index 100%
rename from arch/arm/plat-s3c/dev-hsmmc.c
rename to arch/arm/plat-samsung/dev-hsmmc.c
diff --git a/arch/arm/plat-s3c/dev-hsmmc1.c b/arch/arm/plat-samsung/dev-hsmmc1.c
similarity index 100%
rename from arch/arm/plat-s3c/dev-hsmmc1.c
rename to arch/arm/plat-samsung/dev-hsmmc1.c
diff --git a/arch/arm/plat-s3c/dev-hsmmc2.c b/arch/arm/plat-samsung/dev-hsmmc2.c
similarity index 100%
rename from arch/arm/plat-s3c/dev-hsmmc2.c
rename to arch/arm/plat-samsung/dev-hsmmc2.c
diff --git a/arch/arm/plat-s3c/dev-i2c0.c b/arch/arm/plat-samsung/dev-i2c0.c
similarity index 100%
rename from arch/arm/plat-s3c/dev-i2c0.c
rename to arch/arm/plat-samsung/dev-i2c0.c
diff --git a/arch/arm/plat-s3c/dev-i2c1.c b/arch/arm/plat-samsung/dev-i2c1.c
similarity index 100%
rename from arch/arm/plat-s3c/dev-i2c1.c
rename to arch/arm/plat-samsung/dev-i2c1.c
diff --git a/arch/arm/plat-s3c/dev-nand.c b/arch/arm/plat-samsung/dev-nand.c
similarity index 100%
rename from arch/arm/plat-s3c/dev-nand.c
rename to arch/arm/plat-samsung/dev-nand.c
diff --git a/arch/arm/plat-s3c/dev-usb-hsotg.c b/arch/arm/plat-samsung/dev-usb-hsotg.c
similarity index 100%
rename from arch/arm/plat-s3c/dev-usb-hsotg.c
rename to arch/arm/plat-samsung/dev-usb-hsotg.c
diff --git a/arch/arm/plat-s3c/dev-usb.c b/arch/arm/plat-samsung/dev-usb.c
similarity index 100%
rename from arch/arm/plat-s3c/dev-usb.c
rename to arch/arm/plat-samsung/dev-usb.c
--
1.6.0.4
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH] ARM: SAMSUNG: Move gpio-config.c into plat-samsung
2010-01-08 2:36 Samsung SoC common code updates Ben Dooks
2010-01-08 2:36 ` [PATCH] ARM: SAMSUNG: Move pwm-clock code into plat-samsung Ben Dooks
2010-01-08 2:36 ` [PATCH] ARM: SAMSUNG: Move device definitions in plat-samsung Ben Dooks
@ 2010-01-08 2:37 ` Ben Dooks
2010-01-08 2:37 ` [PATCH] ARM: SAMSUNG: Move IRQ VIC timer handling out to common header files Ben Dooks
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Ben Dooks @ 2010-01-08 2:37 UTC (permalink / raw)
To: linux-arm-kernel
The arch/arm/plat-s3c/gpio-config.c file is common to pretty much all the Samsung
SoCs, so move it to arch/arm/plat-samsung
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
---
arch/arm/plat-s3c/Kconfig | 33 -------------------
arch/arm/plat-s3c/Makefile | 1 -
arch/arm/plat-samsung/Kconfig | 35 +++++++++++++++++++++
arch/arm/plat-samsung/Makefile | 1 +
arch/arm/{plat-s3c => plat-samsung}/gpio-config.c | 0
5 files changed, 36 insertions(+), 34 deletions(-)
rename arch/arm/{plat-s3c => plat-samsung}/gpio-config.c (100%)
diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig
index cd979b1..454cc39 100644
--- a/arch/arm/plat-s3c/Kconfig
+++ b/arch/arm/plat-s3c/Kconfig
@@ -130,39 +130,6 @@ config S3C_GPIO_TRACK
Internal configuration option to enable the s3c specific gpio
chip tracking if the platform requires it.
-config S3C_GPIO_PULL_UPDOWN
- bool
- help
- Internal configuration to enable the correct GPIO pull helper
-
-config S3C_GPIO_PULL_DOWN
- bool
- help
- Internal configuration to enable the correct GPIO pull helper
-
-config S3C_GPIO_PULL_UP
- bool
- help
- Internal configuration to enable the correct GPIO pull helper
-
-config S3C_GPIO_CFG_S3C24XX
- bool
- help
- Internal configuration to enable S3C24XX style GPIO configuration
- functions.
-
-config S3C_GPIO_CFG_S3C64XX
- bool
- help
- Internal configuration to enable S3C64XX style GPIO configuration
- functions.
-
-config S5P_GPIO_CFG_S5PC1XX
- bool
- help
- Internal configuration to enable S5PC1XX style GPIO configuration
- functions.
-
# DMA
config S3C_DMA
diff --git a/arch/arm/plat-s3c/Makefile b/arch/arm/plat-s3c/Makefile
index d862995..ea4a001 100644
--- a/arch/arm/plat-s3c/Makefile
+++ b/arch/arm/plat-s3c/Makefile
@@ -14,7 +14,6 @@ obj- :=
obj-y += init.o
obj-y += time.o
obj-y += gpio.o
-obj-y += gpio-config.o
# DMA support
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 5a72a52..9e7daf2 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -19,6 +19,41 @@ config SAMSUNG_CLKSRC
Select the clock code for the clksrc implementation
used by newer systems such as the S3C64XX.
+# options for gpio configuration support
+
+config S3C_GPIO_CFG_S3C24XX
+ bool
+ help
+ Internal configuration to enable S3C24XX style GPIO configuration
+ functions.
+
+config S3C_GPIO_CFG_S3C64XX
+ bool
+ help
+ Internal configuration to enable S3C64XX style GPIO configuration
+ functions.
+
+config S5P_GPIO_CFG_S5PC1XX
+ bool
+ help
+ Internal configuration to enable S5PC1XX style GPIO configuration
+ functions.
+
+config S3C_GPIO_PULL_UPDOWN
+ bool
+ help
+ Internal configuration to enable the correct GPIO pull helper
+
+config S3C_GPIO_PULL_DOWN
+ bool
+ help
+ Internal configuration to enable the correct GPIO pull helper
+
+config S3C_GPIO_PULL_UP
+ bool
+ help
+ Internal configuration to enable the correct GPIO pull helper
+
# device definitions to compile in
config S3C_DEV_HSMMC
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 32f03e5..2c01437 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -13,6 +13,7 @@ obj- :=
obj-y += clock.o
obj-y += pwm-clock.o
+obj-y += gpio-config.o
obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o
diff --git a/arch/arm/plat-s3c/gpio-config.c b/arch/arm/plat-samsung/gpio-config.c
similarity index 100%
rename from arch/arm/plat-s3c/gpio-config.c
rename to arch/arm/plat-samsung/gpio-config.c
--
1.6.0.4
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH] ARM: SAMSUNG: Move IRQ VIC timer handling out to common header files
2010-01-08 2:36 Samsung SoC common code updates Ben Dooks
` (2 preceding siblings ...)
2010-01-08 2:37 ` [PATCH] ARM: SAMSUNG: Move gpio-config.c into plat-samsung Ben Dooks
@ 2010-01-08 2:37 ` Ben Dooks
2010-01-08 2:37 ` [PATCH] ARM: SAMSUNG: Move IRQ UART handling for newer devices to plat-samsung Ben Dooks
2010-01-08 2:37 ` [PATCH] ARM: Add common entry code for system with two VICs Ben Dooks
5 siblings, 0 replies; 7+ messages in thread
From: Ben Dooks @ 2010-01-08 2:37 UTC (permalink / raw)
To: linux-arm-kernel
Move the VIC based timer interrupt handling out of plat-s3c64xx and
into plat-samsung to be re-used for other systems. This also reduces
the code size as we now have a common init routine and use the irq_desc
to store the interrupt number of the timer.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
---
arch/arm/plat-s3c64xx/Kconfig | 1 +
arch/arm/plat-s3c64xx/irq.c | 90 ++------------------
arch/arm/plat-samsung/Kconfig | 7 ++
arch/arm/plat-samsung/Makefile | 2 +
arch/arm/plat-samsung/include/plat/irq-vic-timer.h | 13 +++
arch/arm/plat-samsung/irq-vic-timer.c | 86 +++++++++++++++++++
6 files changed, 116 insertions(+), 83 deletions(-)
create mode 100644 arch/arm/plat-samsung/include/plat/irq-vic-timer.h
create mode 100644 arch/arm/plat-samsung/irq-vic-timer.c
diff --git a/arch/arm/plat-s3c64xx/Kconfig b/arch/arm/plat-s3c64xx/Kconfig
index bec1224..02d716f 100644
--- a/arch/arm/plat-s3c64xx/Kconfig
+++ b/arch/arm/plat-s3c64xx/Kconfig
@@ -14,6 +14,7 @@ config PLAT_S3C64XX
select NO_IOPORT
select ARCH_REQUIRE_GPIOLIB
select SAMSUNG_CLKSRC
+ select SAMSUNG_IRQ_VIC_TIMER
select S3C_GPIO_TRACK
select S3C_GPIO_PULL_UPDOWN
select S3C_GPIO_CFG_S3C24XX
diff --git a/arch/arm/plat-s3c64xx/irq.c b/arch/arm/plat-s3c64xx/irq.c
index 8dc5b6d..8b69bca 100644
--- a/arch/arm/plat-s3c64xx/irq.c
+++ b/arch/arm/plat-s3c64xx/irq.c
@@ -21,78 +21,10 @@
#include <asm/hardware/vic.h>
#include <mach/map.h>
+#include <plat/irq-vic-timer.h>
#include <plat/regs-serial.h>
-#include <plat/regs-timer.h>
#include <plat/cpu.h>
-/* Timer interrupt handling */
-
-static void s3c_irq_demux_timer(unsigned int base_irq, unsigned int sub_irq)
-{
- generic_handle_irq(sub_irq);
-}
-
-static void s3c_irq_demux_timer0(unsigned int irq, struct irq_desc *desc)
-{
- s3c_irq_demux_timer(irq, IRQ_TIMER0);
-}
-
-static void s3c_irq_demux_timer1(unsigned int irq, struct irq_desc *desc)
-{
- s3c_irq_demux_timer(irq, IRQ_TIMER1);
-}
-
-static void s3c_irq_demux_timer2(unsigned int irq, struct irq_desc *desc)
-{
- s3c_irq_demux_timer(irq, IRQ_TIMER2);
-}
-
-static void s3c_irq_demux_timer3(unsigned int irq, struct irq_desc *desc)
-{
- s3c_irq_demux_timer(irq, IRQ_TIMER3);
-}
-
-static void s3c_irq_demux_timer4(unsigned int irq, struct irq_desc *desc)
-{
- s3c_irq_demux_timer(irq, IRQ_TIMER4);
-}
-
-/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
-
-static void s3c_irq_timer_mask(unsigned int irq)
-{
- u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
-
- reg &= 0x1f; /* mask out pending interrupts */
- reg &= ~(1 << (irq - IRQ_TIMER0));
- __raw_writel(reg, S3C64XX_TINT_CSTAT);
-}
-
-static void s3c_irq_timer_unmask(unsigned int irq)
-{
- u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
-
- reg &= 0x1f; /* mask out pending interrupts */
- reg |= 1 << (irq - IRQ_TIMER0);
- __raw_writel(reg, S3C64XX_TINT_CSTAT);
-}
-
-static void s3c_irq_timer_ack(unsigned int irq)
-{
- u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
-
- reg &= 0x1f;
- reg |= (1 << 5) << (irq - IRQ_TIMER0);
- __raw_writel(reg, S3C64XX_TINT_CSTAT);
-}
-
-static struct irq_chip s3c_irq_timer = {
- .name = "s3c-timer",
- .mask = s3c_irq_timer_mask,
- .unmask = s3c_irq_timer_unmask,
- .ack = s3c_irq_timer_ack,
-};
-
struct uart_irq {
void __iomem *regs;
unsigned int base_irq;
@@ -227,7 +159,7 @@ static void __init s3c64xx_uart_irq(struct uart_irq *uirq)
void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
{
- int uart, irq;
+ int uart;
printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
@@ -237,20 +169,12 @@ void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
/* add the timer sub-irqs */
- set_irq_chained_handler(IRQ_TIMER0_VIC, s3c_irq_demux_timer0);
- set_irq_chained_handler(IRQ_TIMER1_VIC, s3c_irq_demux_timer1);
- set_irq_chained_handler(IRQ_TIMER2_VIC, s3c_irq_demux_timer2);
- set_irq_chained_handler(IRQ_TIMER3_VIC, s3c_irq_demux_timer3);
- set_irq_chained_handler(IRQ_TIMER4_VIC, s3c_irq_demux_timer4);
-
- for (irq = IRQ_TIMER0; irq <= IRQ_TIMER4; irq++) {
- set_irq_chip(irq, &s3c_irq_timer);
- set_irq_handler(irq, handle_level_irq);
- set_irq_flags(irq, IRQF_VALID);
- }
+ s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0);
+ s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1);
+ s3c_init_vic_timer_irq(IRQ_TIMER2_VIC, IRQ_TIMER2);
+ s3c_init_vic_timer_irq(IRQ_TIMER3_VIC, IRQ_TIMER3);
+ s3c_init_vic_timer_irq(IRQ_TIMER4_VIC, IRQ_TIMER4);
for (uart = 0; uart < ARRAY_SIZE(uart_irqs); uart++)
s3c64xx_uart_irq(&uart_irqs[uart]);
}
-
-
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 9e7daf2..cedecd8 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -19,6 +19,13 @@ config SAMSUNG_CLKSRC
Select the clock code for the clksrc implementation
used by newer systems such as the S3C64XX.
+# options for IRQ support
+
+config SAMSUNG_IRQ_VIC_TIMER
+ bool
+ help
+ Internal configuration to build the VIC timer interrupt code.
+
# options for gpio configuration support
config S3C_GPIO_CFG_S3C24XX
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 2c01437..aa048c7 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -17,6 +17,8 @@ obj-y += gpio-config.o
obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o
+obj-$(CONFIG_SAMSUNG_IRQ_VIC_TIMER) += irq-vic-timer.o
+
# devices
obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o
diff --git a/arch/arm/plat-samsung/include/plat/irq-vic-timer.h b/arch/arm/plat-samsung/include/plat/irq-vic-timer.h
new file mode 100644
index 0000000..a90b534
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/irq-vic-timer.h
@@ -0,0 +1,13 @@
+/* arch/arm/plat-samsung/include/plat/irq-vic-timer.h
+ *
+ * Copyright (c) 2010 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>
+ *
+ * Header file for Samsung SoC IRQ VIC timer
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+extern void s3c_init_vic_timer_irq(unsigned int vic, unsigned int timer);
diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c
new file mode 100644
index 0000000..0270519
--- /dev/null
+++ b/arch/arm/plat-samsung/irq-vic-timer.c
@@ -0,0 +1,86 @@
+/* arch/arm/plat-samsung/irq-vic-timer.c
+ * originally part of arch/arm/plat-s3c64xx/irq.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>
+ * http://armlinux.simtec.co.uk/
+ *
+ * S3C64XX - Interrupt handling
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+
+#include <mach/map.h>
+#include <plat/irq-vic-timer.h>
+#include <plat/regs-timer.h>
+
+static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc)
+{
+ generic_handle_irq((int)desc->handler_data);
+}
+
+/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
+
+static void s3c_irq_timer_mask(unsigned int irq)
+{
+ u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
+
+ reg &= 0x1f; /* mask out pending interrupts */
+ reg &= ~(1 << (irq - IRQ_TIMER0));
+ __raw_writel(reg, S3C64XX_TINT_CSTAT);
+}
+
+static void s3c_irq_timer_unmask(unsigned int irq)
+{
+ u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
+
+ reg &= 0x1f; /* mask out pending interrupts */
+ reg |= 1 << (irq - IRQ_TIMER0);
+ __raw_writel(reg, S3C64XX_TINT_CSTAT);
+}
+
+static void s3c_irq_timer_ack(unsigned int irq)
+{
+ u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
+
+ reg &= 0x1f;
+ reg |= (1 << 5) << (irq - IRQ_TIMER0);
+ __raw_writel(reg, S3C64XX_TINT_CSTAT);
+}
+
+static struct irq_chip s3c_irq_timer = {
+ .name = "s3c-timer",
+ .mask = s3c_irq_timer_mask,
+ .unmask = s3c_irq_timer_unmask,
+ .ack = s3c_irq_timer_ack,
+};
+
+/**
+ * s3c_init_vic_timer_irq() - initialise timer irq chanined off VIC.\
+ * @parent_irq: The parent IRQ on the VIC for the timer.
+ * @timer_irq: The IRQ to be used for the timer.
+ *
+ * Register the necessary IRQ chaining and support for the timer IRQs
+ * chained of the VIC.
+ */
+void __init s3c_init_vic_timer_irq(unsigned int parent_irq,
+ unsigned int timer_irq)
+{
+ struct irq_desc *desc = irq_to_desc(parent_irq);
+
+ set_irq_chained_handler(parent_irq, s3c_irq_demux_vic_timer);
+
+ set_irq_chip(timer_irq, &s3c_irq_timer);
+ set_irq_handler(timer_irq, handle_level_irq);
+ set_irq_flags(timer_irq, IRQF_VALID);
+
+ desc->handler_data = (void *)timer_irq;
+}
--
1.6.0.4
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH] ARM: SAMSUNG: Move IRQ UART handling for newer devices to plat-samsung
2010-01-08 2:36 Samsung SoC common code updates Ben Dooks
` (3 preceding siblings ...)
2010-01-08 2:37 ` [PATCH] ARM: SAMSUNG: Move IRQ VIC timer handling out to common header files Ben Dooks
@ 2010-01-08 2:37 ` Ben Dooks
2010-01-08 2:37 ` [PATCH] ARM: Add common entry code for system with two VICs Ben Dooks
5 siblings, 0 replies; 7+ messages in thread
From: Ben Dooks @ 2010-01-08 2:37 UTC (permalink / raw)
To: linux-arm-kernel
Move the handling for the UART interrupts out of the s3c64xx specific
code and into plat-samsung so that it can be used by all implementations
that need it.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
---
arch/arm/plat-s3c64xx/Kconfig | 1 +
arch/arm/plat-s3c64xx/irq.c | 117 +--------------------
arch/arm/plat-samsung/Kconfig | 5 +
arch/arm/plat-samsung/Makefile | 1 +
arch/arm/plat-samsung/include/plat/irq-uart.h | 20 ++++
arch/arm/plat-samsung/irq-uart.c | 143 +++++++++++++++++++++++++
6 files changed, 173 insertions(+), 114 deletions(-)
create mode 100644 arch/arm/plat-samsung/include/plat/irq-uart.h
create mode 100644 arch/arm/plat-samsung/irq-uart.c
diff --git a/arch/arm/plat-s3c64xx/Kconfig b/arch/arm/plat-s3c64xx/Kconfig
index 02d716f..0fba1f9 100644
--- a/arch/arm/plat-s3c64xx/Kconfig
+++ b/arch/arm/plat-s3c64xx/Kconfig
@@ -15,6 +15,7 @@ config PLAT_S3C64XX
select ARCH_REQUIRE_GPIOLIB
select SAMSUNG_CLKSRC
select SAMSUNG_IRQ_VIC_TIMER
+ select SAMSUNG_IRQ_UART
select S3C_GPIO_TRACK
select S3C_GPIO_PULL_UPDOWN
select S3C_GPIO_CFG_S3C24XX
diff --git a/arch/arm/plat-s3c64xx/irq.c b/arch/arm/plat-s3c64xx/irq.c
index 8b69bca..b98451e 100644
--- a/arch/arm/plat-s3c64xx/irq.c
+++ b/arch/arm/plat-s3c64xx/irq.c
@@ -22,19 +22,10 @@
#include <mach/map.h>
#include <plat/irq-vic-timer.h>
-#include <plat/regs-serial.h>
+#include <plat/irq-uart.h>
#include <plat/cpu.h>
-struct uart_irq {
- void __iomem *regs;
- unsigned int base_irq;
- unsigned int parent_irq;
-};
-
-/* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
- * are consecutive when looking up the interrupt in the demux routines.
- */
-static struct uart_irq uart_irqs[] = {
+static struct s3c_uart_irq uart_irqs[] = {
[0] = {
.regs = S3C_VA_UART0,
.base_irq = IRQ_S3CUART_BASE0,
@@ -57,110 +48,9 @@ static struct uart_irq uart_irqs[] = {
},
};
-static inline void __iomem *s3c_irq_uart_base(unsigned int irq)
-{
- struct uart_irq *uirq = get_irq_chip_data(irq);
- return uirq->regs;
-}
-
-static inline unsigned int s3c_irq_uart_bit(unsigned int irq)
-{
- return irq & 3;
-}
-
-/* UART interrupt registers, not worth adding to seperate include header */
-
-static void s3c_irq_uart_mask(unsigned int irq)
-{
- void __iomem *regs = s3c_irq_uart_base(irq);
- unsigned int bit = s3c_irq_uart_bit(irq);
- u32 reg;
-
- reg = __raw_readl(regs + S3C64XX_UINTM);
- reg |= (1 << bit);
- __raw_writel(reg, regs + S3C64XX_UINTM);
-}
-
-static void s3c_irq_uart_maskack(unsigned int irq)
-{
- void __iomem *regs = s3c_irq_uart_base(irq);
- unsigned int bit = s3c_irq_uart_bit(irq);
- u32 reg;
-
- reg = __raw_readl(regs + S3C64XX_UINTM);
- reg |= (1 << bit);
- __raw_writel(reg, regs + S3C64XX_UINTM);
- __raw_writel(1 << bit, regs + S3C64XX_UINTP);
-}
-
-static void s3c_irq_uart_unmask(unsigned int irq)
-{
- void __iomem *regs = s3c_irq_uart_base(irq);
- unsigned int bit = s3c_irq_uart_bit(irq);
- u32 reg;
-
- reg = __raw_readl(regs + S3C64XX_UINTM);
- reg &= ~(1 << bit);
- __raw_writel(reg, regs + S3C64XX_UINTM);
-}
-
-static void s3c_irq_uart_ack(unsigned int irq)
-{
- void __iomem *regs = s3c_irq_uart_base(irq);
- unsigned int bit = s3c_irq_uart_bit(irq);
-
- __raw_writel(1 << bit, regs + S3C64XX_UINTP);
-}
-
-static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc)
-{
- struct uart_irq *uirq = &uart_irqs[irq - IRQ_UART0];
- u32 pend = __raw_readl(uirq->regs + S3C64XX_UINTP);
- int base = uirq->base_irq;
-
- if (pend & (1 << 0))
- generic_handle_irq(base);
- if (pend & (1 << 1))
- generic_handle_irq(base + 1);
- if (pend & (1 << 2))
- generic_handle_irq(base + 2);
- if (pend & (1 << 3))
- generic_handle_irq(base + 3);
-}
-
-static struct irq_chip s3c_irq_uart = {
- .name = "s3c-uart",
- .mask = s3c_irq_uart_mask,
- .unmask = s3c_irq_uart_unmask,
- .mask_ack = s3c_irq_uart_maskack,
- .ack = s3c_irq_uart_ack,
-};
-
-static void __init s3c64xx_uart_irq(struct uart_irq *uirq)
-{
- void __iomem *reg_base = uirq->regs;
- unsigned int irq;
- int offs;
-
- /* mask all interrupts at the start. */
- __raw_writel(0xf, reg_base + S3C64XX_UINTM);
-
- for (offs = 0; offs < 3; offs++) {
- irq = uirq->base_irq + offs;
-
- set_irq_chip(irq, &s3c_irq_uart);
- set_irq_chip_data(irq, uirq);
- set_irq_handler(irq, handle_level_irq);
- set_irq_flags(irq, IRQF_VALID);
- }
-
- set_irq_chained_handler(uirq->parent_irq, s3c_irq_demux_uart);
-}
void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
{
- int uart;
-
printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
/* initialise the pair of VICs */
@@ -175,6 +65,5 @@ void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
s3c_init_vic_timer_irq(IRQ_TIMER3_VIC, IRQ_TIMER3);
s3c_init_vic_timer_irq(IRQ_TIMER4_VIC, IRQ_TIMER4);
- for (uart = 0; uart < ARRAY_SIZE(uart_irqs); uart++)
- s3c64xx_uart_irq(&uart_irqs[uart]);
+ s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs));
}
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index cedecd8..900b463 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -26,6 +26,11 @@ config SAMSUNG_IRQ_VIC_TIMER
help
Internal configuration to build the VIC timer interrupt code.
+config SAMSUNG_IRQ_UART
+ bool
+ help
+ Internal configuration to build the IRQ UART demux code.
+
# options for gpio configuration support
config S3C_GPIO_CFG_S3C24XX
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index aa048c7..aeb7e12 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -17,6 +17,7 @@ obj-y += gpio-config.o
obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o
+obj-$(CONFIG_SAMSUNG_IRQ_UART) += irq-uart.o
obj-$(CONFIG_SAMSUNG_IRQ_VIC_TIMER) += irq-vic-timer.o
# devices
diff --git a/arch/arm/plat-samsung/include/plat/irq-uart.h b/arch/arm/plat-samsung/include/plat/irq-uart.h
new file mode 100644
index 0000000..a9331e4
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/irq-uart.h
@@ -0,0 +1,20 @@
+/* arch/arm/plat-samsung/include/plat/irq-uart.h
+ *
+ * Copyright (c) 2010 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>
+ *
+ * Header file for Samsung SoC UART IRQ demux for S3C64XX and later
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+struct s3c_uart_irq {
+ void __iomem *regs;
+ unsigned int base_irq;
+ unsigned int parent_irq;
+};
+
+extern void s3c_init_uart_irqs(struct s3c_uart_irq *irq, unsigned int nr_irqs);
+
diff --git a/arch/arm/plat-samsung/irq-uart.c b/arch/arm/plat-samsung/irq-uart.c
new file mode 100644
index 0000000..4f8c102
--- /dev/null
+++ b/arch/arm/plat-samsung/irq-uart.c
@@ -0,0 +1,143 @@
+/* arch/arm/plat-samsung/irq-uart.c
+ * originally part of arch/arm/plat-s3c64xx/irq.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>
+ * http://armlinux.simtec.co.uk/
+ *
+ * Samsung- UART Interrupt handling
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/serial_core.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+
+#include <mach/map.h>
+#include <plat/irq-uart.h>
+#include <plat/regs-serial.h>
+#include <plat/cpu.h>
+
+/* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
+ * are consecutive when looking up the interrupt in the demux routines.
+ */
+
+static inline void __iomem *s3c_irq_uart_base(unsigned int irq)
+{
+ struct s3c_uart_irq *uirq = get_irq_chip_data(irq);
+ return uirq->regs;
+}
+
+static inline unsigned int s3c_irq_uart_bit(unsigned int irq)
+{
+ return irq & 3;
+}
+
+static void s3c_irq_uart_mask(unsigned int irq)
+{
+ void __iomem *regs = s3c_irq_uart_base(irq);
+ unsigned int bit = s3c_irq_uart_bit(irq);
+ u32 reg;
+
+ reg = __raw_readl(regs + S3C64XX_UINTM);
+ reg |= (1 << bit);
+ __raw_writel(reg, regs + S3C64XX_UINTM);
+}
+
+static void s3c_irq_uart_maskack(unsigned int irq)
+{
+ void __iomem *regs = s3c_irq_uart_base(irq);
+ unsigned int bit = s3c_irq_uart_bit(irq);
+ u32 reg;
+
+ reg = __raw_readl(regs + S3C64XX_UINTM);
+ reg |= (1 << bit);
+ __raw_writel(reg, regs + S3C64XX_UINTM);
+ __raw_writel(1 << bit, regs + S3C64XX_UINTP);
+}
+
+static void s3c_irq_uart_unmask(unsigned int irq)
+{
+ void __iomem *regs = s3c_irq_uart_base(irq);
+ unsigned int bit = s3c_irq_uart_bit(irq);
+ u32 reg;
+
+ reg = __raw_readl(regs + S3C64XX_UINTM);
+ reg &= ~(1 << bit);
+ __raw_writel(reg, regs + S3C64XX_UINTM);
+}
+
+static void s3c_irq_uart_ack(unsigned int irq)
+{
+ void __iomem *regs = s3c_irq_uart_base(irq);
+ unsigned int bit = s3c_irq_uart_bit(irq);
+
+ __raw_writel(1 << bit, regs + S3C64XX_UINTP);
+}
+
+static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc)
+{
+ struct s3c_uart_irq *uirq = desc->handler_data;
+ u32 pend = __raw_readl(uirq->regs + S3C64XX_UINTP);
+ int base = uirq->base_irq;
+
+ if (pend & (1 << 0))
+ generic_handle_irq(base);
+ if (pend & (1 << 1))
+ generic_handle_irq(base + 1);
+ if (pend & (1 << 2))
+ generic_handle_irq(base + 2);
+ if (pend & (1 << 3))
+ generic_handle_irq(base + 3);
+}
+
+static struct irq_chip s3c_irq_uart = {
+ .name = "s3c-uart",
+ .mask = s3c_irq_uart_mask,
+ .unmask = s3c_irq_uart_unmask,
+ .mask_ack = s3c_irq_uart_maskack,
+ .ack = s3c_irq_uart_ack,
+};
+
+static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq)
+{
+ struct irq_desc *desc = irq_to_desc(uirq->parent_irq);
+ void __iomem *reg_base = uirq->regs;
+ unsigned int irq;
+ int offs;
+
+ /* mask all interrupts at the start. */
+ __raw_writel(0xf, reg_base + S3C64XX_UINTM);
+
+ for (offs = 0; offs < 3; offs++) {
+ irq = uirq->base_irq + offs;
+
+ set_irq_chip(irq, &s3c_irq_uart);
+ set_irq_chip_data(irq, uirq);
+ set_irq_handler(irq, handle_level_irq);
+ set_irq_flags(irq, IRQF_VALID);
+ }
+
+ desc->handler_data = uirq;
+ set_irq_chained_handler(uirq->parent_irq, s3c_irq_demux_uart);
+}
+
+/**
+ * s3c_init_uart_irqs() - initialise UART IRQs and the necessary demuxing
+ * @irq: The interrupt data for registering
+ * @nr_irqs: The number of interrupt descriptions in @irq.
+ *
+ * Register the UART interrupts specified by @irq including the demuxing
+ * routines. This supports the S3C6400 and newer style of devices.
+ */
+void __init s3c_init_uart_irqs(struct s3c_uart_irq *irq, unsigned int nr_irqs)
+{
+ for (; nr_irqs > 0; nr_irqs--, irq++)
+ s3c_init_uart_irq(irq);
+}
--
1.6.0.4
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH] ARM: Add common entry code for system with two VICs
2010-01-08 2:36 Samsung SoC common code updates Ben Dooks
` (4 preceding siblings ...)
2010-01-08 2:37 ` [PATCH] ARM: SAMSUNG: Move IRQ UART handling for newer devices to plat-samsung Ben Dooks
@ 2010-01-08 2:37 ` Ben Dooks
5 siblings, 0 replies; 7+ messages in thread
From: Ben Dooks @ 2010-01-08 2:37 UTC (permalink / raw)
To: linux-arm-kernel
Add a common entry-macro-vic2.S for systems where there are two VICs
so that the machine or platform directories just need to setup the
correct information before including <asm/entry-macro-vic2.S> into
their own entry-macro.S file.
Since this code is from the S3C64XX project, we update the S3C64XX
machine entry code to use this new header.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
---
arch/arm/include/asm/entry-macro-vic2.S | 57 ++++++++++++++++++++++
arch/arm/mach-s3c6400/include/mach/entry-macro.S | 28 +----------
arch/arm/mach-s3c6400/include/mach/map.h | 4 +-
arch/arm/mach-s3c6400/include/mach/tick.h | 2 +-
arch/arm/plat-s3c64xx/cpu.c | 4 +-
arch/arm/plat-s3c64xx/include/plat/irqs.h | 8 ++--
arch/arm/plat-s3c64xx/irq.c | 4 +-
7 files changed, 69 insertions(+), 38 deletions(-)
create mode 100644 arch/arm/include/asm/entry-macro-vic2.S
diff --git a/arch/arm/include/asm/entry-macro-vic2.S b/arch/arm/include/asm/entry-macro-vic2.S
new file mode 100644
index 0000000..3ceb85e
--- /dev/null
+++ b/arch/arm/include/asm/entry-macro-vic2.S
@@ -0,0 +1,57 @@
+/* arch/arm/include/asm/entry-macro-vic2.S
+ *
+ * Originally arch/arm/mach-s3c6400/include/mach/entry-macro.S
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ * http://armlinux.simtec.co.uk/
+ * Ben Dooks <ben@simtec.co.uk>
+ *
+ * Low-level IRQ helper macros for a device with two VICs
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+*/
+
+/* This should be included from <mach/entry-macro.S> with the necessary
+ * defines for virtual addresses and IRQ bases for the two vics.
+ *
+ * The code needs the following defined:
+ * IRQ_VIC0_BASE IRQ number of VIC0's first IRQ
+ * IRQ_VIC1_BASE IRQ number of VIC1's first IRQ
+ * VA_VIC0 Virtual address of VIC0
+ * VA_VIC1 Virtual address of VIC1
+ *
+ * Note, code assumes VIC0's virtual address is an ARM immediate constant
+ * away from VIC1.
+*/
+
+#include <asm/hardware/vic.h>
+
+ .macro disable_fiq
+ .endm
+
+ .macro get_irqnr_preamble, base, tmp
+ ldr \base, =VA_VIC0
+ .endm
+
+ .macro arch_ret_to_user, tmp1, tmp2
+ .endm
+
+ .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
+
+ @ check the vic0
+ mov \irqnr, #IRQ_VIC0_BASE + 31
+ ldr \irqstat, [ \base, # VIC_IRQ_STATUS ]
+ teq \irqstat, #0
+
+ @ otherwise try vic1
+ addeq \tmp, \base, #(VA_VIC1 - VA_VIC0)
+ addeq \irqnr, \irqnr, #(IRQ_VIC1_BASE - IRQ_VIC0_BASE)
+ ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
+ teqeq \irqstat, #0
+
+ clzne \irqstat, \irqstat
+ subne \irqnr, \irqnr, \irqstat
+ .endm
diff --git a/arch/arm/mach-s3c6400/include/mach/entry-macro.S b/arch/arm/mach-s3c6400/include/mach/entry-macro.S
index fbd90d2..33a8fe2 100644
--- a/arch/arm/mach-s3c6400/include/mach/entry-macro.S
+++ b/arch/arm/mach-s3c6400/include/mach/entry-macro.S
@@ -12,33 +12,7 @@
* warranty of any kind, whether express or implied.
*/
-#include <asm/hardware/vic.h>
#include <mach/map.h>
#include <plat/irqs.h>
- .macro disable_fiq
- .endm
-
- .macro get_irqnr_preamble, base, tmp
- ldr \base, =S3C_VA_VIC0
- .endm
-
- .macro arch_ret_to_user, tmp1, tmp2
- .endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
-
- @ check the vic0
- mov \irqnr, # S3C_IRQ_OFFSET + 31
- ldr \irqstat, [ \base, # VIC_IRQ_STATUS ]
- teq \irqstat, #0
-
- @ otherwise try vic1
- addeq \tmp, \base, #(S3C_VA_VIC1 - S3C_VA_VIC0)
- addeq \irqnr, \irqnr, #32
- ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
- teqeq \irqstat, #0
-
- clzne \irqstat, \irqstat
- subne \irqnr, \irqnr, \irqstat
- .endm
+#include <asm/entry-macro-vic2.S>
diff --git a/arch/arm/mach-s3c6400/include/mach/map.h b/arch/arm/mach-s3c6400/include/mach/map.h
index 106ee13..d4cd3ab 100644
--- a/arch/arm/mach-s3c6400/include/mach/map.h
+++ b/arch/arm/mach-s3c6400/include/mach/map.h
@@ -70,8 +70,8 @@
#define S3C64XX_VA_USB_HSPHY S3C_ADDR_CPU(0x00200000)
/* place VICs close together */
-#define S3C_VA_VIC0 (S3C_VA_IRQ + 0x00)
-#define S3C_VA_VIC1 (S3C_VA_IRQ + 0x10000)
+#define VA_VIC0 (S3C_VA_IRQ + 0x00)
+#define VA_VIC1 (S3C_VA_IRQ + 0x10000)
/* compatibiltiy defines. */
#define S3C_PA_TIMER S3C64XX_PA_TIMER
diff --git a/arch/arm/mach-s3c6400/include/mach/tick.h b/arch/arm/mach-s3c6400/include/mach/tick.h
index d9c0dc7..ebe18a9 100644
--- a/arch/arm/mach-s3c6400/include/mach/tick.h
+++ b/arch/arm/mach-s3c6400/include/mach/tick.h
@@ -20,7 +20,7 @@
*/
static inline u32 s3c24xx_ostimer_pending(void)
{
- u32 pend = __raw_readl(S3C_VA_VIC0 + VIC_RAW_STATUS);
+ u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
return pend & 1 << (IRQ_TIMER4_VIC - S3C64XX_IRQ_VIC0(0));
}
diff --git a/arch/arm/plat-s3c64xx/cpu.c b/arch/arm/plat-s3c64xx/cpu.c
index 49796d2..c0e6f2a 100644
--- a/arch/arm/plat-s3c64xx/cpu.c
+++ b/arch/arm/plat-s3c64xx/cpu.c
@@ -78,12 +78,12 @@ static struct map_desc s3c_iodesc[] __initdata = {
.length = SZ_4K,
.type = MT_DEVICE,
}, {
- .virtual = (unsigned long)S3C_VA_VIC0,
+ .virtual = (unsigned long)VA_VIC0,
.pfn = __phys_to_pfn(S3C64XX_PA_VIC0),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
- .virtual = (unsigned long)S3C_VA_VIC1,
+ .virtual = (unsigned long)VA_VIC1,
.pfn = __phys_to_pfn(S3C64XX_PA_VIC1),
.length = SZ_16K,
.type = MT_DEVICE,
diff --git a/arch/arm/plat-s3c64xx/include/plat/irqs.h b/arch/arm/plat-s3c64xx/include/plat/irqs.h
index 7956fd3..176fe15 100644
--- a/arch/arm/plat-s3c64xx/include/plat/irqs.h
+++ b/arch/arm/plat-s3c64xx/include/plat/irqs.h
@@ -24,8 +24,8 @@
#define S3C_IRQ(x) ((x) + S3C_IRQ_OFFSET)
-#define S3C_VIC0_BASE S3C_IRQ(0)
-#define S3C_VIC1_BASE S3C_IRQ(32)
+#define IRQ_VIC0_BASE S3C_IRQ(0)
+#define IRQ_VIC1_BASE S3C_IRQ(32)
/* UART interrupts, each UART has 4 intterupts per channel so
* use the space between the ISA and S3C main interrupts. Note, these
@@ -59,8 +59,8 @@
/* VIC based IRQs */
-#define S3C64XX_IRQ_VIC0(x) (S3C_VIC0_BASE + (x))
-#define S3C64XX_IRQ_VIC1(x) (S3C_VIC1_BASE + (x))
+#define S3C64XX_IRQ_VIC0(x) (IRQ_VIC0_BASE + (x))
+#define S3C64XX_IRQ_VIC1(x) (IRQ_VIC1_BASE + (x))
/* VIC0 */
diff --git a/arch/arm/plat-s3c64xx/irq.c b/arch/arm/plat-s3c64xx/irq.c
index b98451e..67a145d 100644
--- a/arch/arm/plat-s3c64xx/irq.c
+++ b/arch/arm/plat-s3c64xx/irq.c
@@ -54,8 +54,8 @@ void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
/* initialise the pair of VICs */
- vic_init(S3C_VA_VIC0, S3C_VIC0_BASE, vic0_valid, 0);
- vic_init(S3C_VA_VIC1, S3C_VIC1_BASE, vic1_valid, 0);
+ vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, 0);
+ vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, 0);
/* add the timer sub-irqs */
--
1.6.0.4
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