AACI broken with commit 29a4f2d3

[catalin.marinas@arm.com (Catalin Marinas)]

On Fri, 2010-03-26 at 13:10 +0000, Philby John wrote:
> On 03/26/2010 06:30 PM, Catalin Marinas wrote:
> > On Fri, 2010-03-26 at 11:28 +0000, Philby John wrote:
> >> --- a/sound/arm/aaci.c
> >> +++ b/sound/arm/aaci.c
> >> @@ -863,7 +863,11 @@ static int __devinit aaci_probe_ac97(struct aaci *aaci)
> >>          struct snd_ac97 *ac97;
> >>          int ret;
> >>
> >> -       writel(0, aaci->base + AC97_POWERDOWN);
> >> +       /*
> >> +        * Fix: ac97 read back fail errors by reading
> >> +        * from Power down register
> >> +        */
> >> +       readw(aaci->base + 0x26);
> >
> > I still don't understand this. Does aaci->base point to the AACI
> > registers? There is no register at offset 0x26 but there is one at 0x24
> > (32-bit AACIIE2).
> >
> 
> I think there is a register at 0x26 for AACI, except that its not
> defined in aaci.h. References in the manual such as "The AC-link signals
> can be placed in low-power mode, when the power down control
> and status register (0x26) of the CODEC is programmed to the
> appropriate value, both AACIBITCLK and AACISDATAIN are brought to, and
> held at 0.", refer to this register IMHO.

But the above says "the power down control and status register (0x26) of
the CODEC". So this refers to the AC97 registers rather than the AACI
registers. Your patch reads from the AACI registers. The AC97 registers
I think are access with aaci_ac97_(read|write) functions.

-- 
Catalin