From: catalin.marinas@arm.com (Catalin Marinas)
To: linux-arm-kernel@lists.infradead.org
Subject: AACI broken with commit 29a4f2d3
Date: Fri, 26 Mar 2010 14:05:42 +0000 [thread overview]
Message-ID: <1269612342.807.67.camel@e102109-lin.cambridge.arm.com> (raw)
In-Reply-To: <4BACBE0D.4000104@mvista.com>
On Fri, 2010-03-26 at 14:00 +0000, Philby John wrote:
> On 03/26/2010 07:24 PM, Catalin Marinas wrote:
> > On Fri, 2010-03-26 at 13:10 +0000, Philby John wrote:
> >> On 03/26/2010 06:30 PM, Catalin Marinas wrote:
> >>> On Fri, 2010-03-26 at 11:28 +0000, Philby John wrote:
> >>>> --- a/sound/arm/aaci.c
> >>>> +++ b/sound/arm/aaci.c
> >>>> @@ -863,7 +863,11 @@ static int __devinit aaci_probe_ac97(struct aaci *aaci)
> >>>> struct snd_ac97 *ac97;
> >>>> int ret;
> >>>>
> >>>> - writel(0, aaci->base + AC97_POWERDOWN);
> >>>> + /*
> >>>> + * Fix: ac97 read back fail errors by reading
> >>>> + * from Power down register
> >>>> + */
> >>>> + readw(aaci->base + 0x26);
> >>>
> >>> I still don't understand this. Does aaci->base point to the AACI
> >>> registers? There is no register at offset 0x26 but there is one at 0x24
> >>> (32-bit AACIIE2).
> >>>
> >>
> >> I think there is a register at 0x26 for AACI, except that its not
> >> defined in aaci.h. References in the manual such as "The AC-link signals
> >> can be placed in low-power mode, when the power down control
> >> and status register (0x26) of the CODEC is programmed to the
> >> appropriate value, both AACIBITCLK and AACISDATAIN are brought to, and
> >> held at 0.", refer to this register IMHO.
> >
> > But the above says "the power down control and status register (0x26) of
> > the CODEC". So this refers to the AC97 registers rather than the AACI
> > registers. Your patch reads from the AACI registers. The AC97 registers
> > I think are access with aaci_ac97_(read|write) functions.
> >
>
> I think its snd_ac97_read().
Which calls aaci_ac97_read().
> But they internally again use readl/writel. Won't these cause
> alignment issues again?
The AC97 registers are read by writing the register number (0x26 in this
case) to AACI_SL1TX (32-bit register and correctly aligned) and reading
the result from AACI_SLFR. There is no readl/writel to something with
offset 0x26.
--
Catalin
next prev parent reply other threads:[~2010-03-26 14:05 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-03-24 13:51 AACI broken with commit 29a4f2d3 Catalin Marinas
2010-03-24 15:10 ` Catalin Marinas
2010-03-24 15:18 ` Will Deacon
2010-03-25 11:12 ` Takashi Iwai
2010-03-25 11:30 ` Russell King - ARM Linux
2010-03-25 11:36 ` Takashi Iwai
2010-03-25 11:50 ` Philby John
2010-03-25 12:02 ` Catalin Marinas
2010-03-25 12:16 ` Russell King - ARM Linux
2010-03-26 11:28 ` Philby John
2010-03-26 13:00 ` Catalin Marinas
2010-03-26 13:10 ` Philby John
2010-03-26 13:24 ` Mark Brown
2010-03-26 13:54 ` Catalin Marinas
2010-03-26 14:00 ` Philby John
2010-03-26 14:05 ` Catalin Marinas [this message]
2010-03-26 14:08 ` Mark Brown
2010-03-26 14:12 ` Catalin Marinas
2010-03-26 14:15 ` Mark Brown
2010-03-26 16:07 ` Philby John
2010-03-26 21:11 ` Takashi Iwai
2010-03-29 7:45 ` Philby John
2010-03-29 7:57 ` Takashi Iwai
2010-04-06 8:12 ` Takashi Iwai
2010-04-06 17:41 ` Russell King - ARM Linux
2010-04-06 18:07 ` Takashi Iwai
2010-04-12 18:31 ` Russell King - ARM Linux
2010-04-13 7:48 ` Takashi Iwai
2010-03-26 22:56 ` Russell King - ARM Linux
2010-03-26 18:15 ` Russell King - ARM Linux
2010-03-25 12:06 ` Russell King - ARM Linux
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