From: johlstei@codeaurora.org (Jeff Ohlstein)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 05/20 v2] msm: timer: support 8x60 timers
Date: Wed, 6 Oct 2010 00:42:44 -0700 [thread overview]
Message-ID: <1286350979-19328-6-git-send-email-johlstei@codeaurora.org> (raw)
In-Reply-To: <1286350979-19328-1-git-send-email-johlstei@codeaurora.org>
Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
---
arch/arm/mach-msm/include/mach/msm_iomap-8x60.h | 7 +++++++
arch/arm/mach-msm/timer.c | 23 +++++++++++++++++++++--
2 files changed, 28 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
index 1f1822b..18ba569 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
@@ -54,4 +54,11 @@
#define MSM_SHARED_RAM_BASE IOMEM(0xF0100000)
#define MSM_SHARED_RAM_SIZE SZ_1M
+#define MSM_TMR_BASE IOMEM(0xF0200000)
+#define MSM_TMR_PHYS 0x02000000
+#define MSM_TMR_SIZE (SZ_1M)
+
+#define MSM_GPT_BASE (MSM_TMR_BASE + 0x4)
+#define MSM_DGT_BASE (MSM_TMR_BASE + 0x24)
+
#endif
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index dec5ca6..7689848 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -28,7 +28,6 @@
#ifndef MSM_DGT_BASE
#define MSM_DGT_BASE (MSM_GPT_BASE + 0x10)
#endif
-#define MSM_DGT_SHIFT (5)
#define TIMER_MATCH_VAL 0x0000
#define TIMER_COUNT_VAL 0x0004
@@ -36,12 +35,28 @@
#define TIMER_ENABLE_CLR_ON_MATCH_EN 2
#define TIMER_ENABLE_EN 1
#define TIMER_CLEAR 0x000C
-
+#define DGT_CLK_CTL 0x0034
+enum {
+ DGT_CLK_CTL_DIV_1 = 0,
+ DGT_CLK_CTL_DIV_2 = 1,
+ DGT_CLK_CTL_DIV_3 = 2,
+ DGT_CLK_CTL_DIV_4 = 3,
+};
#define CSR_PROTECTION 0x0020
#define CSR_PROTECTION_EN 1
#define GPT_HZ 32768
+
+#if defined(CONFIG_ARCH_QSD8X50)
+#define DGT_HZ (19200000 / 4) /* 19.2 MHz / 4 by default */
+#define MSM_DGT_SHIFT (0)
+#elif defined(CONFIG_ARCH_MSM7X30) || defined(CONFIG_ARCH_MSM8X60)
+#define DGT_HZ (24576000 / 4) /* 24.576 MHz (LPXO) / 4 by default */
+#define MSM_DGT_SHIFT (0)
+#else
#define DGT_HZ 19200000 /* 19.2 MHz or 600 KHz after shift */
+#define MSM_DGT_SHIFT (5)
+#endif
struct msm_clock {
struct clock_event_device clockevent;
@@ -170,6 +185,10 @@ static void __init msm_timer_init(void)
int i;
int res;
+#ifdef CONFIG_ARCH_MSM8X60
+ writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
+#endif
+
for (i = 0; i < ARRAY_SIZE(msm_clocks); i++) {
struct msm_clock *clock = &msm_clocks[i];
struct clock_event_device *ce = &clock->clockevent;
--
1.7.2.1
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
next prev parent reply other threads:[~2010-10-06 7:42 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-10-06 7:42 [PATCH 00/20 v2] Support for Qualcomm msm8660 target Jeff Ohlstein
2010-10-06 7:42 ` [PATCH 01/20 v2] msm: create config option for proc-comm Jeff Ohlstein
2010-10-06 7:42 ` [PATCH 02/20 v2] msm: io: MSM8X60 io support Jeff Ohlstein
2010-10-06 7:42 ` [PATCH 03/20 v2] msm: initial irq definitions for MSM8X60 Jeff Ohlstein
2010-10-06 15:50 ` David Brown
2010-10-06 7:42 ` [PATCH 04/20 v2] msm: irqs-8x60: interrupt map Jeff Ohlstein
2010-10-06 7:42 ` Jeff Ohlstein [this message]
2010-10-06 7:42 ` [PATCH 06/20 v2] msm: MSM8X60 RUMI3 board support Jeff Ohlstein
2010-10-06 7:42 ` [PATCH 07/20 v2] msm: irq: rename existing entry-macro to entry-macro-vic Jeff Ohlstein
2010-10-06 7:42 ` [PATCH 08/20 v2] msm: 8x60: gic initialization fixup for RUMI Jeff Ohlstein
2010-10-06 7:42 ` [PATCH 09/20 v2] msm: clock: add dummy clock driver Jeff Ohlstein
2010-10-06 7:42 ` [PATCH 10/20 v2] msm: dma: add stub functions for dma features not yet present on 8x60 Jeff Ohlstein
2010-10-06 7:42 ` [PATCH 11/20 v2] msm: allow uart to be conditionally disabled Jeff Ohlstein
2010-10-06 7:42 ` [PATCH 12/20 v2] msm: add build support for msm8x60 target Jeff Ohlstein
2010-10-06 7:42 ` [PATCH 13/20 v2] msm: 8x60: setup correct handlers for private interrupts Jeff Ohlstein
2010-10-06 7:42 ` [PATCH 14/20 v2] msm: physical offset for MSM8X60 Jeff Ohlstein
2010-10-06 7:42 ` [PATCH 15/20 v2] msm: add msm8x60_surf machine Jeff Ohlstein
2010-10-06 7:42 ` [PATCH 16/20 v2] msm: MSM8X60 simulator board support Jeff Ohlstein
2010-10-06 7:42 ` [PATCH 17/20 v2] msm: add MSM8x60 FFA support Jeff Ohlstein
2010-10-06 7:42 ` [PATCH 18/20 v2] msm: Add MSM IOMMU support Jeff Ohlstein
2010-10-06 7:42 ` [PATCH 19/20 v2] msm: Platform initialization for the IOMMU driver Jeff Ohlstein
2010-10-06 14:28 ` Daniel Walker
2010-10-06 22:48 ` [PATCH] " Stepan Moskovchenko
2010-10-06 7:42 ` [PATCH 20/20 v2] msm: Platform data for msm8x60 IOMMUs Jeff Ohlstein
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1286350979-19328-6-git-send-email-johlstei@codeaurora.org \
--to=johlstei@codeaurora.org \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).