[PATCH 0/3] Some not-very-exciting random one-liners

[PATCH 0/3] Some not-very-exciting random one-liners

[Will Deacon]

Hello,

I've had these guys lying around in my tree so I thought I'd share.
Perhaps the only interesting observation is that nobody has complained
about the issue addressed in patch 3, implying that very few people are
still using OABI with v7 cores.

All patches taken against 2.6.37-rc1.

Will Deacon (3):
  ARM: backtrace: fix calculation of thread stack base
  ARM: perf-events: squash compiler warning
  ARM: atomic64: use generic implementation for OABI configurations

 arch/arm/Kconfig             |    2 +-
 arch/arm/kernel/perf_event.c |    2 +-
 arch/arm/kernel/stacktrace.c |    2 +-
 arch/arm/kernel/unwind.c     |    2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

[PATCH 1/3] ARM: backtrace: fix calculation of thread stack base

[Will Deacon]

When unwinding stack frames we must take care not to unwind
areas of memory that lie outside of the known extent of the stack.

This patch fixes an incorrect calculation of the stack base where
THREAD_SIZE is added to the stack pointer after it has already
been aligned to this value. Since the ALIGN macro performs this
addition internally, we end up overshooting the base by 8k.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
---
 arch/arm/kernel/stacktrace.c |    2 +-
 arch/arm/kernel/unwind.c     |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/kernel/stacktrace.c b/arch/arm/kernel/stacktrace.c
index 20b7411..c2e112e 100644
--- a/arch/arm/kernel/stacktrace.c
+++ b/arch/arm/kernel/stacktrace.c
@@ -28,7 +28,7 @@ int notrace unwind_frame(struct stackframe *frame)
 
 	/* only go to a higher address on the stack */
 	low = frame->sp;
-	high = ALIGN(low, THREAD_SIZE) + THREAD_SIZE;
+	high = ALIGN(low, THREAD_SIZE);
 
 	/* check current frame pointer is within bounds */
 	if (fp < (low + 12) || fp + 4 >= high)
diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c
index 2a16176..d2cb0b3 100644
--- a/arch/arm/kernel/unwind.c
+++ b/arch/arm/kernel/unwind.c
@@ -279,7 +279,7 @@ int unwind_frame(struct stackframe *frame)
 
 	/* only go to a higher address on the stack */
 	low = frame->sp;
-	high = ALIGN(low, THREAD_SIZE) + THREAD_SIZE;
+	high = ALIGN(low, THREAD_SIZE);
 
 	pr_debug("%s(pc = %08lx lr = %08lx sp = %08lx)\n", __func__,
 		 frame->pc, frame->lr, frame->sp);
-- 
1.7.0.4

[PATCH 2/3] ARM: perf-events: squash compiler warning

[Will Deacon]

armv7_pmnc_counter_has_overflowed can return uninitialised data
if an invalid counter is specified.

This patch fixes the code to return 0 in this case, which squashes
the compiler warning from GCC 4.5.

Cc: Jean Pihet <jpihet@mvista.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
---
 arch/arm/kernel/perf_event.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 49643b1..07a5035 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -1749,7 +1749,7 @@ static inline int armv7_pmnc_has_overflowed(unsigned long pmnc)
 static inline int armv7_pmnc_counter_has_overflowed(unsigned long pmnc,
 					enum armv7_counters counter)
 {
-	int ret;
+	int ret = 0;
 
 	if (counter == ARMV7_CYCLE_COUNTER)
 		ret = pmnc & ARMV7_FLAG_C;
-- 
1.7.0.4

[PATCH 3/3] ARM: atomic64: use generic implementation for OABI configurations

[Will Deacon]

The old apcs-gnu ABI doesn't guarantee that double words are allocated
to registers with even alignment, causing the 64-bit exclusive memory
operations to be rejected by the assembler.

This patch requires that CONFIG_AEABI is set in order to use the native
atomic operations and falls back to the generic (spinlock) code otherwise.

Cc: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Will Deacon <will.deacon@arm.com>
---
 arch/arm/Kconfig |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a19a526..8ae3d48 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -6,7 +6,7 @@ config ARM
 	select HAVE_MEMBLOCK
 	select RTC_LIB
 	select SYS_SUPPORTS_APM_EMULATION
-	select GENERIC_ATOMIC64 if (!CPU_32v6K)
+	select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
 	select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
 	select HAVE_ARCH_KGDB
 	select HAVE_KPROBES if (!XIP_KERNEL)
-- 
1.7.0.4

[PATCH 3/3] ARM: atomic64: use generic implementation for OABI configurations

[Nicolas Pitre]

On Wed, 3 Nov 2010, Will Deacon wrote:

> The old apcs-gnu ABI doesn't guarantee that double words are allocated
> to registers with even alignment, causing the 64-bit exclusive memory
> operations to be rejected by the assembler.
> 
> This patch requires that CONFIG_AEABI is set in order to use the native
> atomic operations and falls back to the generic (spinlock) code otherwise.
> 
> Cc: Nicolas Pitre <nico@fluxnic.net>
> Signed-off-by: Will Deacon <will.deacon@arm.com>

Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>



> ---
>  arch/arm/Kconfig |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index a19a526..8ae3d48 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -6,7 +6,7 @@ config ARM
>  	select HAVE_MEMBLOCK
>  	select RTC_LIB
>  	select SYS_SUPPORTS_APM_EMULATION
> -	select GENERIC_ATOMIC64 if (!CPU_32v6K)
> +	select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
>  	select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
>  	select HAVE_ARCH_KGDB
>  	select HAVE_KPROBES if (!XIP_KERNEL)
> -- 
> 1.7.0.4
>