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From: catalin.marinas@arm.com (Catalin Marinas)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 04/20] ARM: LPAE: use u32 instead of unsigned long for 32-bit ptes
Date: Mon, 15 Nov 2010 17:40:13 +0000	[thread overview]
Message-ID: <1289842829-3027-5-git-send-email-catalin.marinas@arm.com> (raw)
In-Reply-To: <1289842829-3027-1-git-send-email-catalin.marinas@arm.com>

From: Will Deacon <will.deacon@arm.com>

When using 2-level paging, pte_t and pmd_t are typedefs for
unsigned long but phys_addr_t is a typedef for u32.

This patch uses u32 for the page table entry types when
phys_addr_t is not 64-bit, allowing the same conversion
specifier to be used for physical addresses and page table
entries regardless of LPAE.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
---
 arch/arm/include/asm/page-nommu.h           |    8 ++++----
 arch/arm/include/asm/pgtable-2level-types.h |   18 +++++++++---------
 arch/arm/mm/fault-armv.c                    |    2 +-
 3 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/arch/arm/include/asm/page-nommu.h b/arch/arm/include/asm/page-nommu.h
index d1b162a..a20641a 100644
--- a/arch/arm/include/asm/page-nommu.h
+++ b/arch/arm/include/asm/page-nommu.h
@@ -29,10 +29,10 @@
 /*
  * These are used to make use of C type-checking..
  */
-typedef unsigned long pte_t;
-typedef unsigned long pmd_t;
-typedef unsigned long pgd_t[2];
-typedef unsigned long pgprot_t;
+typedef u32 pte_t;
+typedef u32 pmd_t;
+typedef u32 pgd_t[2];
+typedef u32 pgprot_t;
 
 #define pte_val(x)      (x)
 #define pmd_val(x)      (x)
diff --git a/arch/arm/include/asm/pgtable-2level-types.h b/arch/arm/include/asm/pgtable-2level-types.h
index 30f6741..adc4928 100644
--- a/arch/arm/include/asm/pgtable-2level-types.h
+++ b/arch/arm/include/asm/pgtable-2level-types.h
@@ -21,16 +21,16 @@
 
 #undef STRICT_MM_TYPECHECKS
 
-typedef unsigned long pteval_t;
+typedef u32 pteval_t;
 
 #ifdef STRICT_MM_TYPECHECKS
 /*
  * These are used to make use of C type-checking..
  */
-typedef struct { unsigned long pte; } pte_t;
-typedef struct { unsigned long pmd; } pmd_t;
-typedef struct { unsigned long pgd[2]; } pgd_t;
-typedef struct { unsigned long pgprot; } pgprot_t;
+typedef struct { u32 pte; } pte_t;
+typedef struct { u32 pmd; } pmd_t;
+typedef struct { u32 pgd[2]; } pgd_t;
+typedef struct { u32 pgprot; } pgprot_t;
 
 #define pte_val(x)      ((x).pte)
 #define pmd_val(x)      ((x).pmd)
@@ -45,10 +45,10 @@ typedef struct { unsigned long pgprot; } pgprot_t;
 /*
  * .. while these make it easier on the compiler
  */
-typedef unsigned long pte_t;
-typedef unsigned long pmd_t;
-typedef unsigned long pgd_t[2];
-typedef unsigned long pgprot_t;
+typedef u32 pte_t;
+typedef u32 pmd_t;
+typedef u32 pgd_t[2];
+typedef u32 pgprot_t;
 
 #define pte_val(x)      (x)
 #define pmd_val(x)      (x)
diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c
index 83e59f8..01210db 100644
--- a/arch/arm/mm/fault-armv.c
+++ b/arch/arm/mm/fault-armv.c
@@ -26,7 +26,7 @@
 
 #include "mm.h"
 
-static unsigned long shared_pte_mask = L_PTE_MT_BUFFERABLE;
+static pteval_t shared_pte_mask = L_PTE_MT_BUFFERABLE;
 
 #if __LINUX_ARM_ARCH__ < 6
 /*

  parent reply	other threads:[~2010-11-15 17:40 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-11-15 17:40 [PATCH v3 00/20] ARM: Add support for the Large Physical Address Extensions Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 01/20] ARM: LPAE: Use PMD_(SHIFT|SIZE|MASK) instead of PGDIR_* Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 02/20] ARM: LPAE: Factor out 2-level page table definitions into separate files Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 03/20] ARM: LPAE: use long long format when printing physical addresses and ptes Catalin Marinas
2010-11-15 17:40 ` Catalin Marinas [this message]
2010-11-15 17:40 ` [PATCH v3 05/20] ARM: LPAE: Do not assume Linux PTEs are always at PTRS_PER_PTE offset Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 06/20] ARM: LPAE: Introduce L_PTE_NOEXEC and L_PTE_NOWRITE Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 07/20] ARM: LPAE: Introduce the 3-level page table format definitions Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 08/20] ARM: LPAE: Page table maintenance for the 3-level format Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 09/20] ARM: LPAE: MMU setup for the 3-level page table format Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 10/20] ARM: LPAE: Change setup_mm_for_reboot() to work with LPAE Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 11/20] ARM: LPAE: Remove the FIRST_USER_PGD_NR and USER_PTRS_PER_PGD definitions Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 12/20] ARM: LPAE: Add fault handling support Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 13/20] ARM: LPAE: Add context switching support Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 14/20] ARM: LPAE: Add SMP support for the 3-level page table format Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 15/20] ARM: LPAE: use phys_addr_t instead of unsigned long for physical addresses Catalin Marinas
2010-11-16 19:14   ` Stephen Boyd
2010-11-16 19:33     ` Russell King - ARM Linux
2010-11-17 10:47       ` Catalin Marinas
2010-11-17 11:18         ` Arnd Bergmann
2010-11-17 15:28           ` Catalin Marinas
2010-11-17 15:40             ` Arnd Bergmann
2010-11-15 17:40 ` [PATCH v3 16/20] ARM: LPAE: Use generic dma_addr_t type definition Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 17/20] ARM: LPAE: mark memory banks with start > ULONG_MAX as highmem Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 18/20] ARM: LPAE: use phys_addr_t for physical start address in early_mem Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 19/20] ARM: LPAE: add support for ATAG_MEM64 Catalin Marinas
2010-11-15 17:40 ` [PATCH v3 20/20] ARM: LPAE: Add the Kconfig entries Catalin Marinas

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