* [PATCH] ARM: GIC irq desciptor bug fix
@ 2010-12-02 6:17 Chao at marvell.com
2010-12-02 11:50 ` Kyungmin Park
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Chao at marvell.com @ 2010-12-02 6:17 UTC (permalink / raw)
To: linux-arm-kernel
From: cxie4 <cxie4@marvell.com>
gic_set_cpu will directly use irq_desc[]. If CONFIG_SPARSE_IRQ is enabled, there is no
irq_desc[]. So we need use irq_to_desc(irq) to get the descriptor for irq.
Signed-off-by: cxie4 <cxie4@marvell.com>
---
arch/arm/common/gic.c | 8 +++++++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 7dfa9a8..6599acb 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -160,9 +160,15 @@ static int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val)
unsigned int shift = (irq % 4) * 8;
unsigned int cpu = cpumask_first(mask_val);
u32 val;
+ struct irq_desc *desc;
spin_lock(&irq_controller_lock);
- irq_desc[irq].node = cpu;
+ desc = irq_to_desc(irq);
+ if (desc == NULL) {
+ spin_unlock(&irq_controller_lock);
+ return -EINVAL;
+ }
+ desc->node = cpu;
val = readl(reg) & ~(0xff << shift);
val |= 1 << (cpu + shift);
writel(val, reg);
--
1.6.3.3
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH] ARM: GIC irq desciptor bug fix
2010-12-02 6:17 Chao at marvell.com
@ 2010-12-02 11:50 ` Kyungmin Park
2010-12-03 20:54 ` Russell King - ARM Linux
2010-12-08 0:43 ` Ben Dooks
2 siblings, 0 replies; 5+ messages in thread
From: Kyungmin Park @ 2010-12-02 11:50 UTC (permalink / raw)
To: linux-arm-kernel
I posted the similar patch. but looks better.
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
On Thu, Dec 2, 2010 at 3:17 PM, <Chao@marvell.com> wrote:
> From: cxie4 <cxie4@marvell.com>
>
> gic_set_cpu will directly use irq_desc[]. If CONFIG_SPARSE_IRQ is enabled, there is no
> irq_desc[]. So we need use irq_to_desc(irq) to get the descriptor for irq.
>
> Signed-off-by: cxie4 <cxie4@marvell.com>
> ---
> ?arch/arm/common/gic.c | ? ?8 +++++++-
> ?1 files changed, 7 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
> index 7dfa9a8..6599acb 100644
> --- a/arch/arm/common/gic.c
> +++ b/arch/arm/common/gic.c
> @@ -160,9 +160,15 @@ static int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val)
> ? ? ? ?unsigned int shift = (irq % 4) * 8;
> ? ? ? ?unsigned int cpu = cpumask_first(mask_val);
> ? ? ? ?u32 val;
> + ? ? ? struct irq_desc *desc;
>
> ? ? ? ?spin_lock(&irq_controller_lock);
> - ? ? ? irq_desc[irq].node = cpu;
> + ? ? ? desc = irq_to_desc(irq);
> + ? ? ? if (desc == NULL) {
> + ? ? ? ? ? ? ? spin_unlock(&irq_controller_lock);
> + ? ? ? ? ? ? ? return -EINVAL;
> + ? ? ? }
> + ? ? ? desc->node = cpu;
> ? ? ? ?val = readl(reg) & ~(0xff << shift);
> ? ? ? ?val |= 1 << (cpu + shift);
> ? ? ? ?writel(val, reg);
> --
> 1.6.3.3
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH] ARM: GIC irq desciptor bug fix
@ 2010-12-03 1:12 Chao Xie
0 siblings, 0 replies; 5+ messages in thread
From: Chao Xie @ 2010-12-03 1:12 UTC (permalink / raw)
To: linux-arm-kernel
From: cxie4 <cxie4@marvell.com>
gic_set_cpu will directly use irq_desc[]. If CONFIG_SPARSE_IRQ is enabled, there is no
irq_desc[]. So we need use irq_to_desc(irq) to get the descriptor for irq.
Signed-off-by: cxie4 <cxie4@marvell.com>
---
arch/arm/common/gic.c | 8 +++++++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 7dfa9a8..6599acb 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -160,9 +160,15 @@ static int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val)
unsigned int shift = (irq % 4) * 8;
unsigned int cpu = cpumask_first(mask_val);
u32 val;
+ struct irq_desc *desc;
spin_lock(&irq_controller_lock);
- irq_desc[irq].node = cpu;
+ desc = irq_to_desc(irq);
+ if (desc == NULL) {
+ spin_unlock(&irq_controller_lock);
+ return -EINVAL;
+ }
+ desc->node = cpu;
val = readl(reg) & ~(0xff << shift);
val |= 1 << (cpu + shift);
writel(val, reg);
--
1.6.3.3
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH] ARM: GIC irq desciptor bug fix
2010-12-02 6:17 Chao at marvell.com
2010-12-02 11:50 ` Kyungmin Park
@ 2010-12-03 20:54 ` Russell King - ARM Linux
2010-12-08 0:43 ` Ben Dooks
2 siblings, 0 replies; 5+ messages in thread
From: Russell King - ARM Linux @ 2010-12-03 20:54 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Dec 02, 2010 at 02:17:39PM +0800, Chao at marvell.com wrote:
> From: cxie4 <cxie4@marvell.com>
>
> gic_set_cpu will directly use irq_desc[]. If CONFIG_SPARSE_IRQ is enabled, there is no
"SPARSE_IRQ" will do. Please also wrap commit comments so they fit
within 72 columns.
> irq_desc[]. So we need use irq_to_desc(irq) to get the descriptor for irq.
Patch looks fine, please send (with Kyungmin's ack) to my patch system,
thanks.
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH] ARM: GIC irq desciptor bug fix
2010-12-02 6:17 Chao at marvell.com
2010-12-02 11:50 ` Kyungmin Park
2010-12-03 20:54 ` Russell King - ARM Linux
@ 2010-12-08 0:43 ` Ben Dooks
2 siblings, 0 replies; 5+ messages in thread
From: Ben Dooks @ 2010-12-08 0:43 UTC (permalink / raw)
To: linux-arm-kernel
On 02/12/10 06:17, Chao at marvell.com wrote:
> From: cxie4 <cxie4@marvell.com>
I think you should have your full name here.
>
> gic_set_cpu will directly use irq_desc[]. If CONFIG_SPARSE_IRQ is enabled, there is no
> irq_desc[]. So we need use irq_to_desc(irq) to get the descriptor for irq.
>
> Signed-off-by: cxie4 <cxie4@marvell.com>
> ---
> arch/arm/common/gic.c | 8 +++++++-
> 1 files changed, 7 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
> index 7dfa9a8..6599acb 100644
> --- a/arch/arm/common/gic.c
> +++ b/arch/arm/common/gic.c
> @@ -160,9 +160,15 @@ static int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val)
> unsigned int shift = (irq % 4) * 8;
> unsigned int cpu = cpumask_first(mask_val);
> u32 val;
> + struct irq_desc *desc;
>
> spin_lock(&irq_controller_lock);
> - irq_desc[irq].node = cpu;
> + desc = irq_to_desc(irq);
> + if (desc == NULL) {
> + spin_unlock(&irq_controller_lock);
> + return -EINVAL;
> + }
Hmm, NULL would be quite a problem, should we BUG() on this
or maybe WARN on it?
> + desc->node = cpu;
> val = readl(reg) & ~(0xff << shift);
> val |= 1 << (cpu + shift);
> writel(val, reg);
^ permalink raw reply [flat|nested] 5+ messages in thread
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2010-12-02 6:17 Chao at marvell.com
2010-12-02 11:50 ` Kyungmin Park
2010-12-03 20:54 ` Russell King - ARM Linux
2010-12-08 0:43 ` Ben Dooks
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