From mboxrd@z Thu Jan  1 00:00:00 1970
From: eric.dumazet@gmail.com (Eric Dumazet)
Date: Fri, 10 Dec 2010 21:49:25 +0100
Subject: [BUG] 2.6.37-rc3 massive interactivity regression on ARM
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Message-ID: <1292014165.2746.9.camel@edumazet-laptop>
To: linux-arm-kernel@lists.infradead.org
List-Id: linux-arm-kernel.lists.infradead.org

Le vendredi 10 d?cembre 2010 ? 21:39 +0100, Eric Dumazet a ?crit :

> This was exactly my suggestion Christoph.
> 
> I am glad you understand it now.
> 
> 

By the way, we need smp_wmb(), not barrier(), even only the "owner cpu"
can write into its 'percpu' seqcount.

There is nothing special about a seqcount being percpu or a 'global'
one. We must have same memory barrier semantics.

	this_cpu_write_seqcount_begin(&myseqcount);
	this_cpu_add(mydata1, add1);
	this_cpu_add(mydata2, add2);
	this_cpu_inc(mydata3);
	this_cpu_write_seqcount_end(&myseqcount);

We protect the data[1,2,3] set with a seqcount, so need smp_wmb() in
both _begin() and _end()