[PATCH v3 0/2] ARM i.MX53: Some bug fix about MX53 MSL code

[PATCH v3 0/2] ARM i.MX53: Some bug fix about MX53 MSL code

[yong.shen at freescale.com]

Change log:
1. rebased on latest code
2. 1/2 seperate _get_pll_base() for mx51 and mx53
3. 2/2 some minor changes about function or structure names

[PATCH v3 1/2] ARM i.MX53: Some bug fix about MX53 MSL code

[yong.shen at freescale.com]

From: Yong Shen <yong.shen@linaro.org>

1. pll_base address should return right value
2. uart parent clk is from pll3

Signed-off-by: Yong Shen <yong.shen@linaro.org>
---
 arch/arm/mach-mx5/clock-mx51-mx53.c |   25 ++++++++++++++++++++++++-
 arch/arm/mach-mx5/crm_regs.h        |    4 ++++
 2 files changed, 28 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
index 2f9eae2..b290f3f 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -124,7 +124,7 @@ static inline u32 _get_mux(struct clk *parent, struct clk *m0,
 	return -EINVAL;
 }
 
-static inline void __iomem *_get_pll_base(struct clk *pll)
+static inline void __iomem *_mx51_get_pll_base(struct clk *pll)
 {
 	if (pll == &pll1_main_clk)
 		return MX51_DPLL1_BASE;
@@ -132,6 +132,20 @@ static inline void __iomem *_get_pll_base(struct clk *pll)
 		return MX51_DPLL2_BASE;
 	else if (pll == &pll3_sw_clk)
 		return MX51_DPLL3_BASE;
+	else
+		BUG();
+
+	return NULL;
+}
+
+static inline void __iomem *_mx53_get_pll_base(struct clk *pll)
+{
+	if (pll == &pll1_main_clk)
+		return MX53_DPLL1_BASE;
+	else if (pll == &pll2_sw_clk)
+		return MX53_DPLL2_BASE;
+	else if (pll == &pll3_sw_clk)
+		return MX53_DPLL3_BASE;
 	else if (pll == &mx53_pll4_sw_clk)
 		return MX53_DPLL4_BASE;
 	else
@@ -140,6 +154,14 @@ static inline void __iomem *_get_pll_base(struct clk *pll)
 	return NULL;
 }
 
+static inline void __iomem *_get_pll_base(struct clk *pll)
+{
+	if (cpu_is_mx51())
+		return _mx51_get_pll_base(pll);
+	else
+		return _mx53_get_pll_base(pll);
+}
+
 static unsigned long clk_pll_get_rate(struct clk *clk)
 {
 	long mfi, mfn, mfd, pdf, ref_clk, mfn_abs;
@@ -1243,6 +1265,7 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc,
 
 	clk_tree_init();
 
+	clk_set_parent(&uart_root_clk, &pll3_sw_clk);
 	clk_enable(&cpu_clk);
 	clk_enable(&main_bus_clk);
 
diff --git a/arch/arm/mach-mx5/crm_regs.h b/arch/arm/mach-mx5/crm_regs.h
index 51ff9bb..b462c22 100644
--- a/arch/arm/mach-mx5/crm_regs.h
+++ b/arch/arm/mach-mx5/crm_regs.h
@@ -19,6 +19,10 @@
 #define MX51_GPC_BASE		MX51_IO_ADDRESS(MX51_GPC_BASE_ADDR)
 
 /*MX53*/
+#define MX53_CCM_BASE		MX53_IO_ADDRESS(MX53_CCM_BASE_ADDR)
+#define MX53_DPLL1_BASE		MX53_IO_ADDRESS(MX53_PLL1_BASE_ADDR)
+#define MX53_DPLL2_BASE		MX53_IO_ADDRESS(MX53_PLL2_BASE_ADDR)
+#define MX53_DPLL3_BASE		MX53_IO_ADDRESS(MX53_PLL3_BASE_ADDR)
 #define MX53_DPLL4_BASE		MX53_IO_ADDRESS(MX53_PLL3_BASE_ADDR)
 
 /* PLL Register Offsets */
-- 
1.7.0.4

[PATCH v3 2/2] ARM i.MX53: Make MX53 EVK bootable

[yong.shen at freescale.com]

From: Yong Shen <yong.shen@linaro.org>

1. Add entries to Kconfig
2. Add machine definition
3. Add Uart platform data, pad setting and base address
4. Adjust GPIO irq number

Signed-off-by: Yong Shen <yong.shen@linaro.org>
---
 arch/arm/mach-mx5/Kconfig                     |   18 +++++
 arch/arm/mach-mx5/Makefile                    |    1 +
 arch/arm/mach-mx5/Makefile.boot               |    3 +
 arch/arm/mach-mx5/board-mx53_evk.c            |   84 +++++++++++++++++++++++++
 arch/arm/mach-mx5/devices-imx53.h             |   13 ++++
 arch/arm/plat-mxc/devices/platform-imx-uart.c |   10 +++
 arch/arm/plat-mxc/include/mach/iomux-mx53.h   |   20 ++++++
 arch/arm/plat-mxc/include/mach/irqs.h         |    4 +-
 arch/arm/plat-mxc/include/mach/uncompress.h   |    4 +
 9 files changed, 156 insertions(+), 1 deletions(-)
 create mode 100644 arch/arm/mach-mx5/board-mx53_evk.c
 create mode 100644 arch/arm/mach-mx5/devices-imx53.h

diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index 7c31757..55254b6 100644
--- a/arch/arm/mach-mx5/Kconfig
+++ b/arch/arm/mach-mx5/Kconfig
@@ -7,6 +7,9 @@ config ARCH_MX50
 config ARCH_MX51
 	bool
 
+config ARCH_MX53
+	bool
+
 config SOC_IMX50
 	bool
 	select MXC_TZIC
@@ -23,6 +26,12 @@ config	SOC_IMX51
 	select ARCH_HAS_CPUFREQ
 	select ARCH_MX51
 
+config	SOC_IMX53
+	bool
+	select MXC_TZIC
+	select ARCH_MXC_IOMUX_V3
+	select ARCH_MX53
+
 comment "MX5 platforms:"
 
 config MACH_MX51_BABBAGE
@@ -111,6 +120,15 @@ config MACH_MX51_EFIKAMX
 	  Include support for Genesi Efika MX nettop. This includes specific
 	  configurations for the board and its peripherals.
 
+config MACH_MX53_EVK
+	bool "Support MX53 EVK platforms"
+	select SOC_IMX53
+	select IMX_HAVE_PLATFORM_IMX_UART
+	help
+	  Include support for MX53 EVK platform. This includes specific
+	  configurations for the board and its peripherals.
+
+
 config MACH_MX50_RDP
 	bool "Support MX50 reference design platform"
 	depends on BROKEN
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
index d99d7ab..0c398ba 100644
--- a/arch/arm/mach-mx5/Makefile
+++ b/arch/arm/mach-mx5/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_SOC_IMX50) += mm-mx50.o
 obj-$(CONFIG_CPU_FREQ_IMX)    += cpu_op-mx51.o
 obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o
 obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o
+obj-$(CONFIG_MACH_MX53_EVK) += board-mx53_evk.o
 obj-$(CONFIG_MACH_EUKREA_CPUIMX51) += board-cpuimx51.o
 obj-$(CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD) += eukrea_mbimx51-baseboard.o
 obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += board-cpuimx51sd.o
diff --git a/arch/arm/mach-mx5/Makefile.boot b/arch/arm/mach-mx5/Makefile.boot
index 854748f..e928be1 100644
--- a/arch/arm/mach-mx5/Makefile.boot
+++ b/arch/arm/mach-mx5/Makefile.boot
@@ -4,3 +4,6 @@ initrd_phys-$(CONFIG_ARCH_MX50)	:= 0x70800000
    zreladdr-$(CONFIG_ARCH_MX51)	:= 0x90008000
 params_phys-$(CONFIG_ARCH_MX51)	:= 0x90000100
 initrd_phys-$(CONFIG_ARCH_MX51)	:= 0x90800000
+   zreladdr-$(CONFIG_ARCH_MX53)	:= 0x70008000
+params_phys-$(CONFIG_ARCH_MX53)	:= 0x70000100
+initrd_phys-$(CONFIG_ARCH_MX53)	:= 0x70800000
diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c
new file mode 100644
index 0000000..fa97d0d
--- /dev/null
+++ b/arch/arm/mach-mx5/board-mx53_evk.c
@@ -0,0 +1,84 @@
+/*
+ * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2010 Yong Shen. <Yong.Shen@linaro.org>
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+#include <linux/init.h>
+#include <linux/clk.h>
+#include <mach/common.h>
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+#include <mach/imx-uart.h>
+#include <mach/iomux-mx53.h>
+
+#include "crm_regs.h"
+#include "devices-imx53.h"
+
+static iomux_v3_cfg_t mx53_evk_pads[] = {
+	MX53_PAD_CSI0_D10__UART1_TXD,
+	MX53_PAD_CSI0_D11__UART1_RXD,
+	MX53_PAD_ATA_DIOW__UART1_TXD,
+	MX53_PAD_ATA_DMACK__UART1_RXD,
+
+	MX53_PAD_ATA_BUFFER_EN__UART2_RXD,
+	MX53_PAD_ATA_DMARQ__UART2_TXD,
+	MX53_PAD_ATA_DIOR__UART2_RTS,
+	MX53_PAD_ATA_INTRQ__UART2_CTS,
+
+	MX53_PAD_ATA_CS_0__UART3_TXD,
+	MX53_PAD_ATA_CS_1__UART3_RXD,
+	MX53_PAD_ATA_DA_1__UART3_CTS,
+	MX53_PAD_ATA_DA_2__UART3_RTS,
+};
+
+static const struct imxuart_platform_data mx53_evk_uart_pdata __initconst = {
+	.flags = IMXUART_HAVE_RTSCTS,
+};
+
+static inline void mx53_evk_init_uart(void)
+{
+	imx53_add_imx_uart(0, &mx53_evk_uart_pdata);
+	imx53_add_imx_uart(1, &mx53_evk_uart_pdata);
+	imx53_add_imx_uart(2, &mx53_evk_uart_pdata);
+}
+
+static void __init mx53_evk_board_init(void)
+{
+	mxc_iomux_v3_setup_multiple_pads(mx53_evk_pads,
+					ARRAY_SIZE(mx53_evk_pads));
+	mx53_evk_init_uart();
+}
+
+static void __init mx53_evk_timer_init(void)
+{
+	mx53_clocks_init(32768, 24000000, 22579200, 0);
+}
+
+static struct sys_timer mx53_evk_timer = {
+	.init	= mx53_evk_timer_init,
+};
+
+MACHINE_START(MX53_EVK, "Freescale MX53 EVK Board")
+	.map_io = mx53_map_io,
+	.init_irq = mx53_init_irq,
+	.init_machine = mx53_evk_board_init,
+	.timer = &mx53_evk_timer,
+MACHINE_END
diff --git a/arch/arm/mach-mx5/devices-imx53.h b/arch/arm/mach-mx5/devices-imx53.h
new file mode 100644
index 0000000..9d0ec25
--- /dev/null
+++ b/arch/arm/mach-mx5/devices-imx53.h
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2010 Yong Shen. <Yong.Shen@linaro.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it under
+ * the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation.
+ */
+#include <mach/mx53.h>
+#include <mach/devices-common.h>
+
+extern const struct imx_imx_uart_1irq_data imx53_imx_uart_data[] __initconst;
+#define imx53_add_imx_uart(id, pdata)	\
+	imx_add_imx_uart_1irq(&imx53_imx_uart_data[id], pdata)
diff --git a/arch/arm/plat-mxc/devices/platform-imx-uart.c b/arch/arm/plat-mxc/devices/platform-imx-uart.c
index 0c69fbc..3c854c2 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-uart.c
+++ b/arch/arm/plat-mxc/devices/platform-imx-uart.c
@@ -116,6 +116,16 @@ const struct imx_imx_uart_1irq_data imx51_imx_uart_data[] __initconst = {
 };
 #endif /* ifdef CONFIG_SOC_IMX51 */
 
+#ifdef CONFIG_SOC_IMX53
+const struct imx_imx_uart_1irq_data imx53_imx_uart_data[] __initconst = {
+#define imx53_imx_uart_data_entry(_id, _hwid)				\
+	imx_imx_uart_1irq_data_entry(MX53, _id, _hwid, SZ_4K)
+	imx53_imx_uart_data_entry(0, 1),
+	imx53_imx_uart_data_entry(1, 2),
+	imx53_imx_uart_data_entry(2, 3),
+};
+#endif /* ifdef CONFIG_SOC_IMX53 */
+
 struct platform_device *__init imx_add_imx_uart_3irq(
 		const struct imx_imx_uart_3irq_data *data,
 		const struct imxuart_platform_data *pdata)
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx53.h b/arch/arm/plat-mxc/include/mach/iomux-mx53.h
index 80cb3c5..5deee01 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx53.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx53.h
@@ -42,6 +42,26 @@ typedef enum iomux_config {
 #define NON_MUX_I	0x00
 #define NON_PAD_I	0x00
 
+#define MX53_UART_PAD_CTRL		(PAD_CTL_PKE | PAD_CTL_PUE |	\
+		PAD_CTL_DSE_HIGH | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+/* UART1 */
+#define MX53_PAD_CSI0_D10__UART1_TXD	IOMUX_PAD(0x414, 0xE8, 2, 0x0, 0, MX53_UART_PAD_CTRL)
+#define MX53_PAD_CSI0_D11__UART1_RXD	IOMUX_PAD(0x418, 0xEC, 2, 0x878, 1, MX53_UART_PAD_CTRL)
+#define MX53_PAD_ATA_DIOW__UART1_TXD	IOMUX_PAD(0x5F0, 0x270, 3, 0x0,	0, MX53_UART_PAD_CTRL)
+#define MX53_PAD_ATA_DMACK__UART1_RXD	IOMUX_PAD(0x5F4, 0x274, 3, 0x880, 3, MX53_UART_PAD_CTRL)
+
+/* UART2 */
+#define MX53_PAD_ATA_BUFFER_EN__UART2_RXD	IOMUX_PAD(0x5FC, 0x27C, 3, 0x880, 3, MX53_UART_PAD_CTRL)
+#define MX53_PAD_ATA_DMARQ__UART2_TXD	IOMUX_PAD(0x5F8, 0x278, 3, 0x0, 0, MX53_UART_PAD_CTRL)
+#define MX53_PAD_ATA_DIOR__UART2_RTS	IOMUX_PAD(0x604, 0x284, 3, 0x87C, 3, MX53_UART_PAD_CTRL)
+#define MX53_PAD_ATA_INTRQ__UART2_CTS	IOMUX_PAD(0x600, 0x280, 3, 0x0, 0, MX53_UART_PAD_CTRL)
+
+/* UART3 */
+#define MX53_PAD_ATA_CS_0__UART3_TXD	IOMUX_PAD(0x61C, 0x29C, 4, 0x0, 0, MX53_UART_PAD_CTRL)
+#define MX53_PAD_ATA_CS_1__UART3_RXD	IOMUX_PAD(0x620, 0x2A0, 4, 0x888, 3, MX53_UART_PAD_CTRL)
+#define MX53_PAD_ATA_DA_1__UART3_CTS	IOMUX_PAD(0x614, 0x294, 4, 0x0, 0, MX53_UART_PAD_CTRL)
+#define MX53_PAD_ATA_DA_2__UART3_RTS	IOMUX_PAD(0x618, 0x298, 4, 0x884, 5, MX53_UART_PAD_CTRL)
+
 #define MX53_PAD_GPIO_19__GPIO_4_5		IOMUX_PAD(0x348, 0x20,IOMUX_CONFIG_ALT1, 0x0, 0, NO_PAD_CTRL)
 #define MX53_PAD_KEY_COL0__GPIO_4_6		IOMUX_PAD(0x34C, 0x24,IOMUX_CONFIG_ALT1, 0x0, 0, NO_PAD_CTRL)
 #define MX53_PAD_KEY_ROW0__GPIO_4_7		IOMUX_PAD(0x350, 0x28,IOMUX_CONFIG_ALT1, 0x0, 0, NO_PAD_CTRL)
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h
index 064026b..58a49cc 100644
--- a/arch/arm/plat-mxc/include/mach/irqs.h
+++ b/arch/arm/plat-mxc/include/mach/irqs.h
@@ -23,7 +23,9 @@
 #define MXC_GPIO_IRQ_START	MXC_INTERNAL_IRQS
 
 /* these are ordered by size to support multi-SoC kernels */
-#if defined CONFIG_ARCH_MX2
+#if defined CONFIG_ARCH_MX53
+#define MXC_GPIO_IRQS		(32 * 7)
+#elif defined CONFIG_ARCH_MX2
 #define MXC_GPIO_IRQS		(32 * 6)
 #elif defined CONFIG_ARCH_MX50
 #define MXC_GPIO_IRQS		(32 * 6)
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h
index 5ccf3ef..3a70ebf 100644
--- a/arch/arm/plat-mxc/include/mach/uncompress.h
+++ b/arch/arm/plat-mxc/include/mach/uncompress.h
@@ -64,6 +64,7 @@ static inline void flush(void)
 #define MX3X_UART2_BASE_ADDR	0x43F94000
 #define MX51_UART1_BASE_ADDR	0x73fbc000
 #define MX50_UART1_BASE_ADDR	0x53fbc000
+#define MX53_UART1_BASE_ADDR	0x53fbc000
 
 static __inline__ void __arch_decomp_setup(unsigned long arch_id)
 {
@@ -106,6 +107,9 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
 	case MACH_TYPE_MX50_RDP:
 		uart_base = MX50_UART1_BASE_ADDR;
 		break;
+	case MACH_TYPE_MX53_EVK:
+		uart_base = MX53_UART1_BASE_ADDR;
+		break;
 	default:
 		break;
 	}
-- 
1.7.0.4

[PATCH v3 1/2] ARM i.MX53: Some bug fix about MX53 MSL code

[Yong Shen]

Hi there,

Are there any more comments?
Because of the time difference, the review process is longer than it
should be. If no more comments, I am going to ask for merge, so more
works can be carry on based on this.

Thanks for understanding.
Yong

On 1/4/11, yong.shen at freescale.com <yong.shen@freescale.com> wrote:
> From: Yong Shen <yong.shen@linaro.org>
>
> 1. pll_base address should return right value
> 2. uart parent clk is from pll3
>
> Signed-off-by: Yong Shen <yong.shen@linaro.org>
> ---
>  arch/arm/mach-mx5/clock-mx51-mx53.c |   25 ++++++++++++++++++++++++-
>  arch/arm/mach-mx5/crm_regs.h        |    4 ++++
>  2 files changed, 28 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c
> b/arch/arm/mach-mx5/clock-mx51-mx53.c
> index 2f9eae2..b290f3f 100644
> --- a/arch/arm/mach-mx5/clock-mx51-mx53.c
> +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
> @@ -124,7 +124,7 @@ static inline u32 _get_mux(struct clk *parent, struct
> clk *m0,
>  	return -EINVAL;
>  }
>
> -static inline void __iomem *_get_pll_base(struct clk *pll)
> +static inline void __iomem *_mx51_get_pll_base(struct clk *pll)
>  {
>  	if (pll == &pll1_main_clk)
>  		return MX51_DPLL1_BASE;
> @@ -132,6 +132,20 @@ static inline void __iomem *_get_pll_base(struct clk
> *pll)
>  		return MX51_DPLL2_BASE;
>  	else if (pll == &pll3_sw_clk)
>  		return MX51_DPLL3_BASE;
> +	else
> +		BUG();
> +
> +	return NULL;
> +}
> +
> +static inline void __iomem *_mx53_get_pll_base(struct clk *pll)
> +{
> +	if (pll == &pll1_main_clk)
> +		return MX53_DPLL1_BASE;
> +	else if (pll == &pll2_sw_clk)
> +		return MX53_DPLL2_BASE;
> +	else if (pll == &pll3_sw_clk)
> +		return MX53_DPLL3_BASE;
>  	else if (pll == &mx53_pll4_sw_clk)
>  		return MX53_DPLL4_BASE;
>  	else
> @@ -140,6 +154,14 @@ static inline void __iomem *_get_pll_base(struct clk
> *pll)
>  	return NULL;
>  }
>
> +static inline void __iomem *_get_pll_base(struct clk *pll)
> +{
> +	if (cpu_is_mx51())
> +		return _mx51_get_pll_base(pll);
> +	else
> +		return _mx53_get_pll_base(pll);
> +}
> +
>  static unsigned long clk_pll_get_rate(struct clk *clk)
>  {
>  	long mfi, mfn, mfd, pdf, ref_clk, mfn_abs;
> @@ -1243,6 +1265,7 @@ int __init mx53_clocks_init(unsigned long ckil,
> unsigned long osc,
>
>  	clk_tree_init();
>
> +	clk_set_parent(&uart_root_clk, &pll3_sw_clk);
>  	clk_enable(&cpu_clk);
>  	clk_enable(&main_bus_clk);
>
> diff --git a/arch/arm/mach-mx5/crm_regs.h b/arch/arm/mach-mx5/crm_regs.h
> index 51ff9bb..b462c22 100644
> --- a/arch/arm/mach-mx5/crm_regs.h
> +++ b/arch/arm/mach-mx5/crm_regs.h
> @@ -19,6 +19,10 @@
>  #define MX51_GPC_BASE		MX51_IO_ADDRESS(MX51_GPC_BASE_ADDR)
>
>  /*MX53*/
> +#define MX53_CCM_BASE		MX53_IO_ADDRESS(MX53_CCM_BASE_ADDR)
> +#define MX53_DPLL1_BASE		MX53_IO_ADDRESS(MX53_PLL1_BASE_ADDR)
> +#define MX53_DPLL2_BASE		MX53_IO_ADDRESS(MX53_PLL2_BASE_ADDR)
> +#define MX53_DPLL3_BASE		MX53_IO_ADDRESS(MX53_PLL3_BASE_ADDR)
>  #define MX53_DPLL4_BASE		MX53_IO_ADDRESS(MX53_PLL3_BASE_ADDR)
>
>  /* PLL Register Offsets */
> --
> 1.7.0.4
>
>
>

[PATCH v3 1/2] ARM i.MX53: Some bug fix about MX53 MSL code

[Fabio Estevam]

Yong,

On Tue, Jan 4, 2011 at 12:41 PM, Yong Shen <yong.shen@linaro.org> wrote:
> Hi there,
>
> Are there any more comments?
> Because of the time difference, the review process is longer than it
> should be. If no more comments, I am going to ask for merge, so more
> works can be carry on based on this.

Looks like you haven?t checked Sascha?s tree:
http://git.pengutronix.de/?p=imx/linux-2.6.git;a=shortlog;h=refs/heads/imx-for-2.6.38

The patch is there ;-)

Regards,

Fabio Estevam

[PATCH v3 1/2] ARM i.MX53: Some bug fix about MX53 MSL code

[Yong Shen]

Hi Fabio,

:->. my bad. Since my network link is pretty slow, I normally update
every git repo at night, which is why I missed it.

Thanks
Yong

On Wed, Jan 5, 2011 at 7:32 AM, Fabio Estevam <festevam@gmail.com> wrote:
> Yong,
>
> On Tue, Jan 4, 2011 at 12:41 PM, Yong Shen <yong.shen@linaro.org> wrote:
>> Hi there,
>>
>> Are there any more comments?
>> Because of the time difference, the review process is longer than it
>> should be. If no more comments, I am going to ask for merge, so more
>> works can be carry on based on this.
>
> Looks like you haven?t checked Sascha?s tree:
> http://git.pengutronix.de/?p=imx/linux-2.6.git;a=shortlog;h=refs/heads/imx-for-2.6.38
>
> The patch is there ;-)
>
> Regards,
>
> Fabio Estevam
>