From: ccross@android.com (Colin Cross)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 14/21] ARM: tegra: clock: Refcount periph clock enables
Date: Sat, 19 Feb 2011 14:26:03 -0800 [thread overview]
Message-ID: <1298154371-5641-16-git-send-email-ccross@android.com> (raw)
In-Reply-To: <1298154371-5641-1-git-send-email-ccross@android.com>
Some peripheral clocks share enable bits. Refcount the enables so
that calling clk_disable on one clock will not turn off another
clock.
Signed-off-by: Colin Cross <ccross@android.com>
---
arch/arm/mach-tegra/tegra2_clocks.c | 35 +++++++++++++++++++++++++++++------
1 files changed, 29 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c
index 196c249..2734889 100644
--- a/arch/arm/mach-tegra/tegra2_clocks.c
+++ b/arch/arm/mach-tegra/tegra2_clocks.c
@@ -154,6 +154,12 @@ static void __iomem *reg_pmc_base = IO_ADDRESS(TEGRA_PMC_BASE);
*/
static DEFINE_SPINLOCK(clock_register_lock);
+/*
+ * Some peripheral clocks share an enable bit, so refcount the enable bits
+ * in registers CLK_ENABLE_L, CLK_ENABLE_H, and CLK_ENABLE_U
+ */
+static int tegra_periph_clk_enable_refcount[3 * 32];
+
#define clk_writel(value, reg) \
__raw_writel(value, (u32)reg_clk_base + (reg))
#define clk_readl(reg) \
@@ -920,8 +926,19 @@ static void tegra2_periph_clk_init(struct clk *c)
static int tegra2_periph_clk_enable(struct clk *c)
{
u32 val;
+ unsigned long flags;
+ int refcount;
pr_debug("%s on clock %s\n", __func__, c->name);
+ spin_lock_irqsave(&clock_register_lock, flags);
+
+ refcount = tegra_periph_clk_enable_refcount[c->u.periph.clk_num]++;
+
+ spin_unlock_irqrestore(&clock_register_lock, flags);
+
+ if (refcount > 1)
+ return 0;
+
clk_writel(PERIPH_CLK_TO_ENB_BIT(c),
CLK_OUT_ENB_SET + PERIPH_CLK_TO_ENB_SET_REG(c));
if (!(c->flags & PERIPH_NO_RESET) && !(c->flags & PERIPH_MANUAL_RESET))
@@ -939,10 +956,20 @@ static int tegra2_periph_clk_enable(struct clk *c)
static void tegra2_periph_clk_disable(struct clk *c)
{
+ unsigned long flags;
+
pr_debug("%s on clock %s\n", __func__, c->name);
- clk_writel(PERIPH_CLK_TO_ENB_BIT(c),
- CLK_OUT_ENB_CLR + PERIPH_CLK_TO_ENB_SET_REG(c));
+ spin_lock_irqsave(&clock_register_lock, flags);
+
+ if (c->refcnt)
+ tegra_periph_clk_enable_refcount[c->u.periph.clk_num]--;
+
+ if (tegra_periph_clk_enable_refcount[c->u.periph.clk_num] == 0)
+ clk_writel(PERIPH_CLK_TO_ENB_BIT(c),
+ CLK_OUT_ENB_CLR + PERIPH_CLK_TO_ENB_SET_REG(c));
+
+ spin_unlock_irqrestore(&clock_register_lock, flags);
}
static void tegra2_periph_clk_reset(struct clk *c, bool assert)
@@ -1976,7 +2003,6 @@ struct clk tegra_list_clks[] = {
PERIPH_CLK("timer", "timer", NULL, 5, 0, 26000000, mux_clk_m, 0),
PERIPH_CLK("i2s1", "i2s.0", NULL, 11, 0x100, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71),
PERIPH_CLK("i2s2", "i2s.1", NULL, 18, 0x104, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71),
- /* FIXME: spdif has 2 clocks but 1 enable */
PERIPH_CLK("spdif_out", "spdif_out", NULL, 10, 0x108, 100000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71),
PERIPH_CLK("spdif_in", "spdif_in", NULL, 10, 0x10c, 100000000, mux_pllp_pllc_pllm, MUX | DIV_U71),
PERIPH_CLK("pwm", "pwm", NULL, 17, 0x110, 432000000, mux_pllp_pllc_audio_clkm_clk32, MUX | DIV_U71),
@@ -1989,7 +2015,6 @@ struct clk tegra_list_clks[] = {
PERIPH_CLK("sbc4", "spi_tegra.3", NULL, 68, 0x1b4, 160000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71),
PERIPH_CLK("ide", "ide", NULL, 25, 0x144, 100000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), /* requires min voltage */
PERIPH_CLK("ndflash", "tegra_nand", NULL, 13, 0x160, 164000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), /* scales with voltage */
- /* FIXME: vfir shares an enable with uartb */
PERIPH_CLK("vfir", "vfir", NULL, 7, 0x168, 72000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71),
PERIPH_CLK("sdmmc1", "sdhci-tegra.0", NULL, 14, 0x150, 52000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), /* scales with voltage */
PERIPH_CLK("sdmmc2", "sdhci-tegra.1", NULL, 9, 0x154, 52000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), /* scales with voltage */
@@ -2017,13 +2042,11 @@ struct clk tegra_list_clks[] = {
PERIPH_CLK("uarte", "uart.4", NULL, 66, 0x1c4, 600000000, mux_pllp_pllc_pllm_clkm, MUX),
PERIPH_CLK("3d", "3d", NULL, 24, 0x158, 300000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | PERIPH_MANUAL_RESET), /* scales with voltage and process_id */
PERIPH_CLK("2d", "2d", NULL, 21, 0x15c, 300000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), /* scales with voltage and process_id */
- /* FIXME: vi and vi_sensor share an enable */
PERIPH_CLK("vi", "tegra_camera", "vi", 20, 0x148, 150000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), /* scales with voltage and process_id */
PERIPH_CLK("vi_sensor", "tegra_camera", "vi_sensor", 20, 0x1a8, 150000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | PERIPH_NO_RESET), /* scales with voltage and process_id */
PERIPH_CLK("epp", "epp", NULL, 19, 0x16c, 300000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), /* scales with voltage and process_id */
PERIPH_CLK("mpe", "mpe", NULL, 60, 0x170, 250000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), /* scales with voltage and process_id */
PERIPH_CLK("host1x", "host1x", NULL, 28, 0x180, 166000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), /* scales with voltage and process_id */
- /* FIXME: cve and tvo share an enable */
PERIPH_CLK("cve", "cve", NULL, 49, 0x140, 250000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* requires min voltage */
PERIPH_CLK("tvo", "tvo", NULL, 49, 0x188, 250000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* requires min voltage */
PERIPH_CLK("hdmi", "hdmi", NULL, 51, 0x18c, 600000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* requires min voltage */
--
1.7.3.1
next prev parent reply other threads:[~2011-02-19 22:26 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-02-19 22:25 [PATCH v2 12/21] ARM: tegra: clock: Add shared bus clock type Colin Cross
2011-02-19 22:25 ` [PATCH v2 00/21] Tegra clock updates for 2.6.39 Colin Cross
2011-02-19 22:25 ` [PATCH v2 01/21] ARM: tegra: clock: enable clk reset for non-peripheral clocks Colin Cross
2011-02-21 4:05 ` Olof Johansson
2011-02-19 22:25 ` [PATCH v2 02/21] ARM: tegra: clock: Don't BUG on changing an enabled PLL Colin Cross
2011-02-21 4:06 ` Olof Johansson
2011-02-21 6:46 ` Colin Cross
2011-02-19 22:25 ` [PATCH v2 03/21] ARM: tegra: clock: Drop debugging Colin Cross
2011-02-21 4:07 ` Olof Johansson
2011-02-21 6:56 ` Colin Cross
2011-02-19 22:25 ` [PATCH v2 04/21] ARM: tegra: clock: Don't use PLL lock bits Colin Cross
2011-02-21 4:07 ` Olof Johansson
2011-02-19 22:25 ` [PATCH v2 05/21] ARM: tegra: clock: Disable clocks left on by bootloader Colin Cross
2011-02-21 0:40 ` Olof Johansson
2011-02-21 3:43 ` Colin Cross
2011-02-21 4:03 ` Olof Johansson
2011-02-19 22:25 ` [PATCH v2 06/21] ARM: tegra: clock: Initialize clocks that have no enable Colin Cross
2011-02-21 4:08 ` Olof Johansson
2011-02-19 22:25 ` [PATCH v2 07/21] ARM: tegra: clock: Drop CPU dvfs Colin Cross
2011-02-21 4:09 ` Olof Johansson
2011-02-19 22:25 ` [PATCH v2 08/21] ARM: tegra: clock: Rearrange static clock tables Colin Cross
2011-02-21 4:09 ` Olof Johansson
2011-02-19 22:25 ` [PATCH v2 09/21] ARM: tegra: clock: Move unshared clk struct members into union Colin Cross
2011-02-21 4:10 ` Olof Johansson
2011-02-21 7:00 ` Colin Cross
2011-02-19 22:25 ` [PATCH v2 10/21] ARM: tegra: clock: Convert global lock to a lock per clock Colin Cross
2011-02-21 4:11 ` Olof Johansson
2011-02-19 22:26 ` [PATCH v2 11/21] ARM: tegra: cpufreq: Take an extra reference to pllx Colin Cross
2011-02-21 4:12 ` Olof Johansson
2011-02-19 22:26 ` [PATCH v2 12/21] ARM: tegra: clock: Add shared bus clock type Colin Cross
2011-02-19 22:26 ` [PATCH v2 13/21] ARM: tegra: clock: Remove unnecessary uses of #ifdef CONFIG_DEBUG_FS Colin Cross
2011-02-21 4:17 ` Olof Johansson
2011-02-19 22:26 ` Colin Cross [this message]
2011-02-21 4:18 ` [PATCH v2 14/21] ARM: tegra: clock: Refcount periph clock enables Olof Johansson
2011-02-21 7:06 ` Colin Cross
2011-02-19 22:26 ` [PATCH v2 15/21] ARM: tegra: clock: Round rate before setting rate Colin Cross
2011-02-21 4:19 ` Olof Johansson
2011-02-21 7:52 ` Colin Cross
2011-02-19 22:26 ` [PATCH v2 16/21] ARM: tegra: Add external memory controller driver Colin Cross
2011-02-21 4:20 ` Olof Johansson
2011-02-19 22:26 ` [PATCH v2 17/21] ARM: tegra: clocks: Add emc scaling Colin Cross
2011-02-21 4:21 ` Olof Johansson
2011-02-19 22:26 ` [PATCH v2 18/21] ARM: tegra: cpufreq: Adjust memory frequency with cpu frequency Colin Cross
2011-02-21 4:23 ` Olof Johansson
2011-02-19 22:26 ` [PATCH v2 19/21] ARM: tegra: clock: Add function to set SDMMC tap delay Colin Cross
2011-02-21 4:26 ` Olof Johansson
2011-02-19 22:26 ` [PATCH v2 20/21] ARM: tegra: clock: Fix clock issues in suspend Colin Cross
2011-02-21 4:28 ` Olof Johansson
2011-02-19 22:26 ` [PATCH v2 21/21] ARM: tegra: clock: Miscellaneous clock updates Colin Cross
2011-02-21 4:28 ` Olof Johansson
2011-02-21 4:15 ` [PATCH v2 12/21] ARM: tegra: clock: Add shared bus clock type Olof Johansson
2011-02-21 7:02 ` Colin Cross
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