From: sboyd@codeaurora.org (Stephen Boyd)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/4] msm: scm: Check for interruption immediately
Date: Thu, 24 Feb 2011 10:44:44 -0800 [thread overview]
Message-ID: <1298573085-23217-4-git-send-email-sboyd@codeaurora.org> (raw)
In-Reply-To: <1298573085-23217-1-git-send-email-sboyd@codeaurora.org>
When we're interrupted on the secure side, we should just issue
another smc instruction again instead of replaying the arguments
to smc. Fix it.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
arch/arm/mach-msm/scm.c | 51 ++++++++++++++++++++++++----------------------
1 files changed, 27 insertions(+), 24 deletions(-)
diff --git a/arch/arm/mach-msm/scm.c b/arch/arm/mach-msm/scm.c
index 5eddf54..cfa808d 100644
--- a/arch/arm/mach-msm/scm.c
+++ b/arch/arm/mach-msm/scm.c
@@ -174,15 +174,18 @@ static u32 smc(u32 cmd_addr)
register u32 r0 asm("r0") = 1;
register u32 r1 asm("r1") = (u32)&context_id;
register u32 r2 asm("r2") = cmd_addr;
- asm volatile(
- __asmeq("%0", "r0")
- __asmeq("%1", "r0")
- __asmeq("%2", "r1")
- __asmeq("%3", "r2")
- "smc #0 @ switch to secure world\n"
- : "=r" (r0)
- : "r" (r0), "r" (r1), "r" (r2)
- : "r3");
+ do {
+ asm volatile(
+ __asmeq("%0", "r0")
+ __asmeq("%1", "r0")
+ __asmeq("%2", "r1")
+ __asmeq("%3", "r2")
+ "smc #0 @ switch to secure world\n"
+ : "=r" (r0)
+ : "r" (r0), "r" (r1), "r" (r2)
+ : "r3");
+ } while (r0 == SCM_INTERRUPTED);
+
return r0;
}
@@ -197,13 +200,9 @@ static int __scm_call(const struct scm_command *cmd)
* side in the buffer.
*/
flush_cache_all();
- do {
- ret = smc(cmd_addr);
- if (ret < 0) {
- ret = scm_remap_error(ret);
- break;
- }
- } while (ret == SCM_INTERRUPTED);
+ ret = smc(cmd_addr);
+ if (ret < 0)
+ ret = scm_remap_error(ret);
return ret;
}
@@ -274,14 +273,18 @@ u32 scm_get_version(void)
r0 = 0x1 << 8;
r1 = (u32)&context_id;
- asm volatile(
- __asmeq("%0", "r1")
- __asmeq("%1", "r0")
- __asmeq("%2", "r1")
- "smc #0 @ switch to secure world\n"
- : "=r" (r1)
- : "r" (r0), "r" (r1)
- : "r2", "r3");
+ do {
+ asm volatile(
+ __asmeq("%0", "r0")
+ __asmeq("%1", "r1")
+ __asmeq("%2", "r0")
+ __asmeq("%3", "r1")
+ "smc #0 @ switch to secure world\n"
+ : "=r" (r0), "=r" (r1)
+ : "r" (r0), "r" (r1)
+ : "r2", "r3");
+ } while (r0 == SCM_INTERRUPTED);
+
version = r1;
mutex_unlock(&scm_lock);
--
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
next prev parent reply other threads:[~2011-02-24 18:44 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-02-24 18:44 [PATCH 0/4] SCM fixes and updates Stephen Boyd
2011-02-24 18:44 ` [PATCH 1/4] msm: scm: Mark inline asm as volatile Stephen Boyd
2011-02-25 11:56 ` Will Deacon
2011-02-25 19:05 ` Stephen Boyd
2011-02-26 18:12 ` David Brown
2011-02-26 19:43 ` Nicolas Pitre
2011-02-27 17:41 ` David Brown
2011-02-28 2:21 ` Nicolas Pitre
2011-02-27 11:10 ` Will Deacon
2011-02-27 17:38 ` David Brown
2011-03-01 10:30 ` Will Deacon
2011-02-24 18:44 ` [PATCH 2/4] msm: scm: Fix improper register assignment Stephen Boyd
2011-02-25 13:23 ` Will Deacon
2011-02-25 19:22 ` Stephen Boyd
2011-02-26 5:09 ` Saravana Kannan
2011-02-26 8:47 ` Russell King - ARM Linux
2011-02-26 17:58 ` David Brown
2011-02-26 20:04 ` Nicolas Pitre
2011-03-01 10:37 ` Will Deacon
2011-03-01 21:29 ` Saravana Kannan
2011-03-02 0:02 ` Nicolas Pitre
2011-03-01 13:54 ` Will Deacon
2011-02-24 18:44 ` Stephen Boyd [this message]
2011-02-24 18:44 ` [PATCH 4/4] msm: scm: Get cacheline size from CTR Stephen Boyd
2011-02-24 19:01 ` Thomas Gleixner
2011-02-24 19:44 ` Stephen Boyd
2011-02-24 19:56 ` Thomas Gleixner
2011-03-01 4:21 ` Stephen Boyd
2011-02-24 19:32 ` Sergei Shtylyov
2011-02-24 19:50 ` Stephen Boyd
2011-02-24 19:55 ` Russell King - ARM Linux
2011-03-09 19:29 ` [PATCH 0/4] SCM fixes and updates Stephen Boyd
2011-03-10 20:06 ` David Brown
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