[PATCH v2 2/9] lpc2k: Exception vector handling

[ithamar.adema@team-embedded.nl (Ithamar R. Adema)]

On Fri, 2011-03-18 at 15:16 +0000, Russell King - ARM Linux wrote:
> On Fri, Mar 18, 2011 at 04:11:49PM +0100, Ithamar R. Adema wrote:
> > Since the LPC2K does not have an MMU (ARM7TDMI based), it expects the vectors to be
> > stored in on-chip SRAM. However, this moves the vectors too far away from the stubs
> > page, requiring the vector jumps to be indirect.
> 
> Why not copy the vectors and stubs just like we do for MMU-based kernels?

The problem here is the remapping of the low vectors that the LPC2K SoC
does. Although we store the vectors (and stubs) @ 0x40000000 (SRAM) the
SoC remaps only the first 64 bytes of that to address 0x00000000 (low
vectors).

This means that although the vectors are accessible, the stubs are not.
The 64 bytes cover the vectors itself, and the 1-word per vector address
variable stored directly after the vectors.

I'll update the commit log to be a bit more clear on this.

Regards,

Ithamar.