* [PATCH 01/10] ARM: move Versatile SMP pen code to common location
2011-04-30 2:08 Resend [PATCH 00/10] ARM: SMP initialization consolidation Rob Herring
@ 2011-04-30 2:08 ` Rob Herring
2011-04-30 2:08 ` [PATCH 02/10] ARM: ux500: convert to use common secondary pen code Rob Herring
` (9 subsequent siblings)
10 siblings, 0 replies; 16+ messages in thread
From: Rob Herring @ 2011-04-30 2:08 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
The same secondary boot pen code is used by several platforms besides ARM Ltd
boards, so move it to a shared location.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
arch/arm/Kconfig | 7 ++
arch/arm/include/asm/smp.h | 4 +
arch/arm/kernel/Makefile | 3 +-
arch/arm/kernel/headsmp.S | 40 +++++++++++
arch/arm/kernel/smp_pen.c | 104 +++++++++++++++++++++++++++++
arch/arm/mach-realview/include/mach/smp.h | 3 +
arch/arm/mach-realview/platsmp.c | 4 +-
arch/arm/mach-vexpress/include/mach/smp.h | 3 +
arch/arm/mach-vexpress/platsmp.c | 4 +-
arch/arm/plat-versatile/Makefile | 1 -
arch/arm/plat-versatile/headsmp.S | 40 -----------
arch/arm/plat-versatile/platsmp.c | 104 -----------------------------
12 files changed, 165 insertions(+), 152 deletions(-)
create mode 100644 arch/arm/kernel/headsmp.S
create mode 100644 arch/arm/kernel/smp_pen.c
delete mode 100644 arch/arm/plat-versatile/headsmp.S
delete mode 100644 arch/arm/plat-versatile/platsmp.c
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d46185a..84e2127 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1057,6 +1057,7 @@ config PLAT_PXA
config PLAT_VERSATILE
bool
+ select SMP_COMMON_PEN if SMP
config ARM_TIMER_SP804
bool
@@ -1381,6 +1382,12 @@ config HAVE_ARM_SCU
help
This option enables support for the ARM system coherency unit
+config SMP_COMMON_PEN
+ bool
+ depends on SMP
+ help
+ This option enables common secondary boot pen code.
+
config HAVE_ARM_TWD
bool
depends on SMP
diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h
index 96ed521..6766cd3 100644
--- a/arch/arm/include/asm/smp.h
+++ b/arch/arm/include/asm/smp.h
@@ -73,6 +73,10 @@ extern void platform_secondary_init(unsigned int cpu);
*/
extern void platform_smp_prepare_cpus(unsigned int);
+extern void pen_secondary_init(unsigned int cpu);
+extern int pen_boot_secondary(unsigned int cpu, struct task_struct *);
+extern void pen_secondary_startup(void);
+
/*
* Initial data for bringing up a secondary CPU.
*/
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 908c78c..62061fa 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -23,7 +23,7 @@ obj-$(CONFIG_LEDS) += leds.o
obj-$(CONFIG_OC_ETM) += etm.o
obj-$(CONFIG_ISA_DMA_API) += dma.o
-obj-$(CONFIG_ARCH_ACORN) += ecard.o
+obj-$(CONFIG_ARCH_ACORN) += ecard.o
obj-$(CONFIG_FIQ) += fiq.o
obj-$(CONFIG_MODULES) += armksyms.o module.o
obj-$(CONFIG_ARTHUR) += arthur.o
@@ -32,6 +32,7 @@ obj-$(CONFIG_PCI) += bios32.o isa.o
obj-$(CONFIG_PM_SLEEP) += sleep.o
obj-$(CONFIG_HAVE_SCHED_CLOCK) += sched_clock.o
obj-$(CONFIG_SMP) += smp.o smp_tlb.o
+obj-$(CONFIG_SMP_COMMON_PEN) += headsmp.o smp_pen.o
obj-$(CONFIG_HAVE_ARM_SCU) += smp_scu.o
obj-$(CONFIG_HAVE_ARM_TWD) += smp_twd.o
obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
diff --git a/arch/arm/kernel/headsmp.S b/arch/arm/kernel/headsmp.S
new file mode 100644
index 0000000..712b401
--- /dev/null
+++ b/arch/arm/kernel/headsmp.S
@@ -0,0 +1,40 @@
+/*
+ * linux/arch/arm/kernel/headsmp.S
+ *
+ * Copyright (c) 2003 ARM Limited
+ * All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/linkage.h>
+#include <linux/init.h>
+
+ __INIT
+
+/*
+ * Entry point for secondary CPUs.
+ * This provides a "holding pen" into which all secondary cores are held
+ * until we're ready for them to initialise.
+ */
+ENTRY(pen_secondary_startup)
+ mrc p15, 0, r0, c0, c0, 5
+ and r0, r0, #15
+ adr r4, 1f
+ ldmia r4, {r5, r6}
+ sub r4, r4, r5
+ add r6, r6, r4
+pen: ldr r7, [r6]
+ cmp r7, r0
+ bne pen
+
+ /*
+ * we've been released from the holding pen: secondary_stack
+ * should now contain the SVC stack for this core
+ */
+ b secondary_startup
+
+ .align
+1: .long .
+ .long pen_release
diff --git a/arch/arm/kernel/smp_pen.c b/arch/arm/kernel/smp_pen.c
new file mode 100644
index 0000000..8a81eeb
--- /dev/null
+++ b/arch/arm/kernel/smp_pen.c
@@ -0,0 +1,104 @@
+/*
+ * linux/arch/arm/kernel/smp_pen.c
+ *
+ * Copyright (C) 2002 ARM Ltd.
+ * All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/jiffies.h>
+#include <linux/smp.h>
+
+#include <asm/cacheflush.h>
+
+/*
+ * control for which core is the next to come out of the secondary
+ * boot "holding pen"
+ */
+volatile int __cpuinitdata pen_release = -1;
+
+/*
+ * Write pen_release in a way that is guaranteed to be visible to all
+ * observers, irrespective of whether they're taking part in coherency
+ * or not. This is necessary for the hotplug code to work reliably.
+ */
+static void __cpuinit write_pen_release(int val)
+{
+ pen_release = val;
+ smp_wmb();
+ __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
+ outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1));
+}
+
+static DEFINE_SPINLOCK(boot_lock);
+
+void __cpuinit pen_secondary_init(unsigned int cpu)
+{
+ /*
+ * if any interrupts are already enabled for the primary
+ * core (e.g. timer irq), then they will not have been enabled
+ * for us: do so
+ */
+ gic_secondary_init(0);
+
+ /*
+ * let the primary processor know we're out of the
+ * pen, then head off into the C entry point
+ */
+ write_pen_release(-1);
+
+ /*
+ * Synchronise with the boot thread.
+ */
+ spin_lock(&boot_lock);
+ spin_unlock(&boot_lock);
+}
+
+int __cpuinit pen_boot_secondary(unsigned int cpu, struct task_struct *idle)
+{
+ unsigned long timeout;
+
+ /*
+ * Set synchronisation state between this boot processor
+ * and the secondary one
+ */
+ spin_lock(&boot_lock);
+
+ /*
+ * This is really belt and braces; we hold unintended secondary
+ * CPUs in the holding pen until we're ready for them. However,
+ * since we haven't sent them a soft interrupt, they shouldn't
+ * be there.
+ */
+ write_pen_release(cpu);
+
+ /*
+ * Send the secondary CPU a soft interrupt, thereby causing
+ * the boot monitor to read the system wide flags register,
+ * and branch to the address found there.
+ */
+ smp_cross_call(cpumask_of(cpu), 1);
+
+ timeout = jiffies + (1 * HZ);
+ while (time_before(jiffies, timeout)) {
+ smp_rmb();
+ if (pen_release == -1)
+ break;
+
+ udelay(10);
+ }
+
+ /*
+ * now the secondary core is starting up let it run its
+ * calibrations, then wait for it to finish
+ */
+ spin_unlock(&boot_lock);
+
+ return pen_release != -1 ? -ENOSYS : 0;
+}
diff --git a/arch/arm/mach-realview/include/mach/smp.h b/arch/arm/mach-realview/include/mach/smp.h
index c8221b3..e688f64 100644
--- a/arch/arm/mach-realview/include/mach/smp.h
+++ b/arch/arm/mach-realview/include/mach/smp.h
@@ -3,6 +3,9 @@
#include <asm/hardware/gic.h>
+#define boot_secondary pen_boot_secondary
+#define platform_secondary_init pen_secondary_init
+
/*
* We use IRQ1 as the IPI
*/
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index 2391922..f443ef3 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -24,8 +24,6 @@
#include "core.h"
-extern void versatile_secondary_startup(void);
-
static void __iomem *scu_base_addr(void)
{
if (machine_is_realview_eb_mp())
@@ -82,6 +80,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
* until it receives a soft interrupt, and then the
* secondary CPU branches to this address.
*/
- __raw_writel(BSYM(virt_to_phys(versatile_secondary_startup)),
+ __raw_writel(BSYM(virt_to_phys(pen_secondary_startup)),
__io_address(REALVIEW_SYS_FLAGSSET));
}
diff --git a/arch/arm/mach-vexpress/include/mach/smp.h b/arch/arm/mach-vexpress/include/mach/smp.h
index 4c05e4a..306ff05 100644
--- a/arch/arm/mach-vexpress/include/mach/smp.h
+++ b/arch/arm/mach-vexpress/include/mach/smp.h
@@ -3,6 +3,9 @@
#include <asm/hardware/gic.h>
+#define boot_secondary pen_boot_secondary
+#define platform_secondary_init pen_secondary_init
+
/*
* We use IRQ1 as the IPI
*/
diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c
index 2b5f7ac..7fa0b68 100644
--- a/arch/arm/mach-vexpress/platsmp.c
+++ b/arch/arm/mach-vexpress/platsmp.c
@@ -20,8 +20,6 @@
#include "core.h"
-extern void versatile_secondary_startup(void);
-
/*
* Initialise the CPU possible map early - this describes the CPUs
* which may be present or become present in the system.
@@ -46,6 +44,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
* secondary CPU branches to this address.
*/
writel(~0, MMIO_P2V(V2M_SYS_FLAGSCLR));
- writel(BSYM(virt_to_phys(versatile_secondary_startup)),
+ writel(BSYM(virt_to_phys(pen_secondary_startup)),
MMIO_P2V(V2M_SYS_FLAGSSET));
}
diff --git a/arch/arm/plat-versatile/Makefile b/arch/arm/plat-versatile/Makefile
index 86fe64d..ef7b749 100644
--- a/arch/arm/plat-versatile/Makefile
+++ b/arch/arm/plat-versatile/Makefile
@@ -3,4 +3,3 @@ obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
obj-$(CONFIG_PLAT_VERSATILE_CLCD) += clcd.o
obj-$(CONFIG_PLAT_VERSATILE_FPGA_IRQ) += fpga-irq.o
obj-$(CONFIG_PLAT_VERSATILE_LEDS) += leds.o
-obj-$(CONFIG_SMP) += headsmp.o platsmp.o
diff --git a/arch/arm/plat-versatile/headsmp.S b/arch/arm/plat-versatile/headsmp.S
deleted file mode 100644
index d397a1f..0000000
--- a/arch/arm/plat-versatile/headsmp.S
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * linux/arch/arm/plat-versatile/headsmp.S
- *
- * Copyright (c) 2003 ARM Limited
- * All Rights Reserved
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/linkage.h>
-#include <linux/init.h>
-
- __INIT
-
-/*
- * Realview/Versatile Express specific entry point for secondary CPUs.
- * This provides a "holding pen" into which all secondary cores are held
- * until we're ready for them to initialise.
- */
-ENTRY(versatile_secondary_startup)
- mrc p15, 0, r0, c0, c0, 5
- and r0, r0, #15
- adr r4, 1f
- ldmia r4, {r5, r6}
- sub r4, r4, r5
- add r6, r6, r4
-pen: ldr r7, [r6]
- cmp r7, r0
- bne pen
-
- /*
- * we've been released from the holding pen: secondary_stack
- * should now contain the SVC stack for this core
- */
- b secondary_startup
-
- .align
-1: .long .
- .long pen_release
diff --git a/arch/arm/plat-versatile/platsmp.c b/arch/arm/plat-versatile/platsmp.c
deleted file mode 100644
index ba3d471..0000000
--- a/arch/arm/plat-versatile/platsmp.c
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * linux/arch/arm/plat-versatile/platsmp.c
- *
- * Copyright (C) 2002 ARM Ltd.
- * All Rights Reserved
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/delay.h>
-#include <linux/device.h>
-#include <linux/jiffies.h>
-#include <linux/smp.h>
-
-#include <asm/cacheflush.h>
-
-/*
- * control for which core is the next to come out of the secondary
- * boot "holding pen"
- */
-volatile int __cpuinitdata pen_release = -1;
-
-/*
- * Write pen_release in a way that is guaranteed to be visible to all
- * observers, irrespective of whether they're taking part in coherency
- * or not. This is necessary for the hotplug code to work reliably.
- */
-static void __cpuinit write_pen_release(int val)
-{
- pen_release = val;
- smp_wmb();
- __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
- outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1));
-}
-
-static DEFINE_SPINLOCK(boot_lock);
-
-void __cpuinit platform_secondary_init(unsigned int cpu)
-{
- /*
- * if any interrupts are already enabled for the primary
- * core (e.g. timer irq), then they will not have been enabled
- * for us: do so
- */
- gic_secondary_init(0);
-
- /*
- * let the primary processor know we're out of the
- * pen, then head off into the C entry point
- */
- write_pen_release(-1);
-
- /*
- * Synchronise with the boot thread.
- */
- spin_lock(&boot_lock);
- spin_unlock(&boot_lock);
-}
-
-int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
-{
- unsigned long timeout;
-
- /*
- * Set synchronisation state between this boot processor
- * and the secondary one
- */
- spin_lock(&boot_lock);
-
- /*
- * This is really belt and braces; we hold unintended secondary
- * CPUs in the holding pen until we're ready for them. However,
- * since we haven't sent them a soft interrupt, they shouldn't
- * be there.
- */
- write_pen_release(cpu);
-
- /*
- * Send the secondary CPU a soft interrupt, thereby causing
- * the boot monitor to read the system wide flags register,
- * and branch to the address found there.
- */
- smp_cross_call(cpumask_of(cpu), 1);
-
- timeout = jiffies + (1 * HZ);
- while (time_before(jiffies, timeout)) {
- smp_rmb();
- if (pen_release == -1)
- break;
-
- udelay(10);
- }
-
- /*
- * now the secondary core is starting up let it run its
- * calibrations, then wait for it to finish
- */
- spin_unlock(&boot_lock);
-
- return pen_release != -1 ? -ENOSYS : 0;
-}
--
1.7.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 02/10] ARM: ux500: convert to use common secondary pen code
2011-04-30 2:08 Resend [PATCH 00/10] ARM: SMP initialization consolidation Rob Herring
2011-04-30 2:08 ` [PATCH 01/10] ARM: move Versatile SMP pen code to common location Rob Herring
@ 2011-04-30 2:08 ` Rob Herring
2011-04-30 2:08 ` [PATCH 03/10] ARM: msm: " Rob Herring
` (8 subsequent siblings)
10 siblings, 0 replies; 16+ messages in thread
From: Rob Herring @ 2011-04-30 2:08 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
arch/arm/mach-ux500/Kconfig | 1 +
arch/arm/mach-ux500/Makefile | 2 +-
arch/arm/mach-ux500/headsmp.S | 37 ---------------
arch/arm/mach-ux500/include/mach/smp.h | 4 +-
arch/arm/mach-ux500/platsmp.c | 79 +-------------------------------
5 files changed, 5 insertions(+), 118 deletions(-)
delete mode 100644 arch/arm/mach-ux500/headsmp.S
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index 5862601..ba5c78c 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -7,6 +7,7 @@ config UX500_SOC_COMMON
select HAS_MTU
select NOMADIK_GPIO
select ARM_ERRATA_753970
+ select SMP_COMMON_PEN if SMP
menu "Ux500 SoC"
diff --git a/arch/arm/mach-ux500/Makefile b/arch/arm/mach-ux500/Makefile
index b549a8f..8c89d18 100644
--- a/arch/arm/mach-ux500/Makefile
+++ b/arch/arm/mach-ux500/Makefile
@@ -12,7 +12,7 @@ obj-$(CONFIG_MACH_U8500) += board-mop500.o board-mop500-sdi.o \
board-mop500-u8500uib.o \
board-mop500-pins.o
obj-$(CONFIG_MACH_U5500) += board-u5500.o board-u5500-sdi.o
-obj-$(CONFIG_SMP) += platsmp.o headsmp.o
+obj-$(CONFIG_SMP) += platsmp.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
obj-$(CONFIG_U5500_MODEM_IRQ) += modem-irq-db5500.o
diff --git a/arch/arm/mach-ux500/headsmp.S b/arch/arm/mach-ux500/headsmp.S
deleted file mode 100644
index 64fa451..0000000
--- a/arch/arm/mach-ux500/headsmp.S
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Copyright (c) 2009 ST-Ericsson
- * This file is based ARM Realview platform
- * Copyright (c) 2003 ARM Limited
- * All Rights Reserved
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/linkage.h>
-#include <linux/init.h>
-
- __INIT
-
-/*
- * U8500 specific entry point for secondary CPUs.
- */
-ENTRY(u8500_secondary_startup)
- mrc p15, 0, r0, c0, c0, 5
- and r0, r0, #15
- adr r4, 1f
- ldmia r4, {r5, r6}
- sub r4, r4, r5
- add r6, r6, r4
-pen: ldr r7, [r6]
- cmp r7, r0
- bne pen
-
- /*
- * we've been released from the holding pen: secondary_stack
- * should now contain the SVC stack for this core
- */
- b secondary_startup
-
-1: .long .
- .long pen_release
diff --git a/arch/arm/mach-ux500/include/mach/smp.h b/arch/arm/mach-ux500/include/mach/smp.h
index ca2b15b..a99d674 100644
--- a/arch/arm/mach-ux500/include/mach/smp.h
+++ b/arch/arm/mach-ux500/include/mach/smp.h
@@ -11,8 +11,8 @@
#include <asm/hardware/gic.h>
-/* This is required to wakeup the secondary core */
-extern void u8500_secondary_startup(void);
+#define boot_secondary pen_boot_secondary
+#define platform_secondary_init pen_secondary_init
/*
* We use IRQ1 as the IPI
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index 4fff4d4..88f30b8 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -22,25 +22,6 @@
#include <mach/hardware.h>
#include <mach/setup.h>
-/*
- * control for which core is the next to come out of the secondary
- * boot "holding pen"
- */
-volatile int pen_release = -1;
-
-/*
- * Write pen_release in a way that is guaranteed to be visible to all
- * observers, irrespective of whether they're taking part in coherency
- * or not. This is necessary for the hotplug code to work reliably.
- */
-static void write_pen_release(int val)
-{
- pen_release = val;
- smp_wmb();
- __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
- outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1));
-}
-
static void __iomem *scu_base_addr(void)
{
if (cpu_is_u5500())
@@ -53,64 +34,6 @@ static void __iomem *scu_base_addr(void)
return NULL;
}
-static DEFINE_SPINLOCK(boot_lock);
-
-void __cpuinit platform_secondary_init(unsigned int cpu)
-{
- /*
- * if any interrupts are already enabled for the primary
- * core (e.g. timer irq), then they will not have been enabled
- * for us: do so
- */
- gic_secondary_init(0);
-
- /*
- * let the primary processor know we're out of the
- * pen, then head off into the C entry point
- */
- write_pen_release(-1);
-
- /*
- * Synchronise with the boot thread.
- */
- spin_lock(&boot_lock);
- spin_unlock(&boot_lock);
-}
-
-int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
-{
- unsigned long timeout;
-
- /*
- * set synchronisation state between this boot processor
- * and the secondary one
- */
- spin_lock(&boot_lock);
-
- /*
- * The secondary processor is waiting to be released from
- * the holding pen - release it, then wait for it to flag
- * that it has been released by resetting pen_release.
- */
- write_pen_release(cpu);
-
- smp_cross_call(cpumask_of(cpu), 1);
-
- timeout = jiffies + (1 * HZ);
- while (time_before(jiffies, timeout)) {
- if (pen_release == -1)
- break;
- }
-
- /*
- * now the secondary core is starting up let it run its
- * calibrations, then wait for it to finish
- */
- spin_unlock(&boot_lock);
-
- return pen_release != -1 ? -ENOSYS : 0;
-}
-
static void __init wakeup_secondary(void)
{
void __iomem *backupram;
@@ -129,7 +52,7 @@ static void __init wakeup_secondary(void)
* is waiting for. This would wake up the secondary core from WFE
*/
#define UX500_CPU1_JUMPADDR_OFFSET 0x1FF4
- __raw_writel(virt_to_phys(u8500_secondary_startup),
+ __raw_writel(virt_to_phys(pen_secondary_startup),
backupram + UX500_CPU1_JUMPADDR_OFFSET);
#define UX500_CPU1_WAKEMAGIC_OFFSET 0x1FF0
--
1.7.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 03/10] ARM: msm: use common secondary pen code
2011-04-30 2:08 Resend [PATCH 00/10] ARM: SMP initialization consolidation Rob Herring
2011-04-30 2:08 ` [PATCH 01/10] ARM: move Versatile SMP pen code to common location Rob Herring
2011-04-30 2:08 ` [PATCH 02/10] ARM: ux500: convert to use common secondary pen code Rob Herring
@ 2011-04-30 2:08 ` Rob Herring
2011-04-30 2:08 ` [PATCH 04/10] ARM: add common scu_init_cpus Rob Herring
` (7 subsequent siblings)
10 siblings, 0 replies; 16+ messages in thread
From: Rob Herring @ 2011-04-30 2:08 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
arch/arm/Kconfig | 1 +
arch/arm/mach-msm/Makefile | 2 +-
arch/arm/mach-msm/headsmp.S | 40 -----------------------
arch/arm/mach-msm/platsmp.c | 73 ++-----------------------------------------
4 files changed, 5 insertions(+), 111 deletions(-)
delete mode 100644 arch/arm/mach-msm/headsmp.S
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 84e2127..959b27f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -647,6 +647,7 @@ config ARCH_MSM
select GENERIC_CLOCKEVENTS
select ARCH_REQUIRE_GPIOLIB
select CLKDEV_LOOKUP
+ select SMP_COMMON_PEN if SMP
help
Support for Qualcomm MSM/QSD based systems. This runs on the
apps processor of the MSM/QSD and depends on a shared memory
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 9519fd2..8460f98 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -16,7 +16,7 @@ obj-$(CONFIG_MSM_SMD) += last_radio_log.o
obj-$(CONFIG_MSM_SCM) += scm.o scm-boot.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
-obj-$(CONFIG_SMP) += headsmp.o platsmp.o
+obj-$(CONFIG_SMP) += platsmp.o
obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o devices-msm7x00.o
obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o board-trout-panel.o devices-msm7x00.o
diff --git a/arch/arm/mach-msm/headsmp.S b/arch/arm/mach-msm/headsmp.S
deleted file mode 100644
index 0c631a9..0000000
--- a/arch/arm/mach-msm/headsmp.S
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * linux/arch/arm/mach-realview/headsmp.S
- *
- * Copyright (c) 2003 ARM Limited
- * All Rights Reserved
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/linkage.h>
-#include <linux/init.h>
-
- __CPUINIT
-
-/*
- * MSM specific entry point for secondary CPUs. This provides
- * a "holding pen" into which all secondary cores are held until we're
- * ready for them to initialise.
- */
-ENTRY(msm_secondary_startup)
- mrc p15, 0, r0, c0, c0, 5
- and r0, r0, #15
- adr r4, 1f
- ldmia r4, {r5, r6}
- sub r4, r4, r5
- add r6, r6, r4
-pen: ldr r7, [r6]
- cmp r7, r0
- bne pen
-
- /*
- * we've been released from the holding pen: secondary_stack
- * should now contain the SVC stack for this core
- */
- b secondary_startup
-
- .align
-1: .long .
- .long pen_release
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index 0f427bc..4315bb5 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -31,45 +31,18 @@
/* Mask for edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
#define GIC_PPI_EDGE_MASK 0xFFFFD7FF
-extern void msm_secondary_startup(void);
-/*
- * control for which core is the next to come out of the secondary
- * boot "holding pen".
- */
-volatile int pen_release = -1;
-
-static DEFINE_SPINLOCK(boot_lock);
-
void __cpuinit platform_secondary_init(unsigned int cpu)
{
/* Configure edge-triggered PPIs */
writel(GIC_PPI_EDGE_MASK, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
- /*
- * if any interrupts are already enabled for the primary
- * core (e.g. timer irq), then they will not have been enabled
- * for us: do so
- */
- gic_secondary_init(0);
-
- /*
- * let the primary processor know we're out of the
- * pen, then head off into the C entry point
- */
- pen_release = -1;
- smp_wmb();
-
- /*
- * Synchronise with the boot thread.
- */
- spin_lock(&boot_lock);
- spin_unlock(&boot_lock);
+ pen_secondary_init(cpu);
}
static __cpuinit void prepare_cold_cpu(unsigned int cpu)
{
int ret;
- ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup),
+ ret = scm_set_boot_addr(virt_to_phys(pen_secondary_startup),
SCM_FLAG_COLDBOOT_CPU1);
if (ret == 0) {
void *sc1_base_ptr;
@@ -96,47 +69,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
cold_boot_done = true;
}
- /*
- * set synchronisation state between this boot processor
- * and the secondary one
- */
- spin_lock(&boot_lock);
-
- /*
- * The secondary processor is waiting to be released from
- * the holding pen - release it, then wait for it to flag
- * that it has been released by resetting pen_release.
- *
- * Note that "pen_release" is the hardware CPU ID, whereas
- * "cpu" is Linux's internal ID.
- */
- pen_release = cpu;
- __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
- outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1));
-
- /*
- * Send the secondary CPU a soft interrupt, thereby causing
- * the boot monitor to read the system wide flags register,
- * and branch to the address found there.
- */
- smp_cross_call(cpumask_of(cpu), 1);
-
- timeout = jiffies + (1 * HZ);
- while (time_before(jiffies, timeout)) {
- smp_rmb();
- if (pen_release == -1)
- break;
-
- udelay(10);
- }
-
- /*
- * now the secondary core is starting up let it run its
- * calibrations, then wait for it to finish
- */
- spin_unlock(&boot_lock);
-
- return pen_release != -1 ? -ENOSYS : 0;
+ return pen_boot_secondary(cpu, idle);
}
/*
--
1.7.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 04/10] ARM: add common scu_init_cpus
2011-04-30 2:08 Resend [PATCH 00/10] ARM: SMP initialization consolidation Rob Herring
` (2 preceding siblings ...)
2011-04-30 2:08 ` [PATCH 03/10] ARM: msm: " Rob Herring
@ 2011-04-30 2:08 ` Rob Herring
2011-04-30 2:08 ` [PATCH 05/10] ARM: omap: use " Rob Herring
` (6 subsequent siblings)
10 siblings, 0 replies; 16+ messages in thread
From: Rob Herring @ 2011-04-30 2:08 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
Cortex-A9 SCU based platforms use the same code for smp_init_cpus, so create
a common implementation for systems with an SCU.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
arch/arm/include/asm/smp_scu.h | 1 +
arch/arm/kernel/smp_scu.c | 19 +++++++++++++++++++
2 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/smp_scu.h b/arch/arm/include/asm/smp_scu.h
index 4eb6d00..6b03557 100644
--- a/arch/arm/include/asm/smp_scu.h
+++ b/arch/arm/include/asm/smp_scu.h
@@ -7,6 +7,7 @@
#ifndef __ASSEMBLER__
unsigned int scu_get_core_count(void __iomem *);
+void scu_init_cpus(void __iomem *);
void scu_enable(void __iomem *);
int scu_power_mode(void __iomem *, unsigned int);
#endif
diff --git a/arch/arm/kernel/smp_scu.c b/arch/arm/kernel/smp_scu.c
index a1e757c..e58b8c4 100644
--- a/arch/arm/kernel/smp_scu.c
+++ b/arch/arm/kernel/smp_scu.c
@@ -29,6 +29,25 @@ unsigned int __init scu_get_core_count(void __iomem *scu_base)
return (ncores & 0x03) + 1;
}
+void __init scu_init_cpus(void __iomem *scu_base)
+{
+ unsigned int i, ncores;
+
+ ncores = scu_get_core_count(scu_base);
+
+ /* sanity check */
+ if (ncores > NR_CPUS) {
+ printk(KERN_WARNING
+ "SCU: No. of cores (%d) greater than configured "
+ "maximum of %d - clipping\n",
+ ncores, NR_CPUS);
+ ncores = NR_CPUS;
+ }
+
+ for (i = 0; i < ncores; i++)
+ set_cpu_possible(i, true);
+}
+
/*
* Enable the SCU
*/
--
1.7.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 05/10] ARM: omap: use common scu_init_cpus
2011-04-30 2:08 Resend [PATCH 00/10] ARM: SMP initialization consolidation Rob Herring
` (3 preceding siblings ...)
2011-04-30 2:08 ` [PATCH 04/10] ARM: add common scu_init_cpus Rob Herring
@ 2011-04-30 2:08 ` Rob Herring
2011-04-30 2:08 ` [PATCH 06/10] ARM: realview: " Rob Herring
` (5 subsequent siblings)
10 siblings, 0 replies; 16+ messages in thread
From: Rob Herring @ 2011-04-30 2:08 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
Convert omap to use common scu_init_cpus function.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
arch/arm/mach-omap2/omap-smp.c | 16 +---------------
1 files changed, 1 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index b66cfe8..831c8a0 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -99,25 +99,11 @@ static void __init wakeup_secondary(void)
*/
void __init smp_init_cpus(void)
{
- unsigned int i, ncores;
-
/* Never released */
scu_base = ioremap(OMAP44XX_SCU_BASE, SZ_256);
BUG_ON(!scu_base);
- ncores = scu_get_core_count(scu_base);
-
- /* sanity check */
- if (ncores > NR_CPUS) {
- printk(KERN_WARNING
- "OMAP4: no. of cores (%d) greater than configured "
- "maximum of %d - clipping\n",
- ncores, NR_CPUS);
- ncores = NR_CPUS;
- }
-
- for (i = 0; i < ncores; i++)
- set_cpu_possible(i, true);
+ scu_init_cpus(scu_base);
}
void __init platform_smp_prepare_cpus(unsigned int max_cpus)
--
1.7.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 06/10] ARM: realview: use common scu_init_cpus
2011-04-30 2:08 Resend [PATCH 00/10] ARM: SMP initialization consolidation Rob Herring
` (4 preceding siblings ...)
2011-04-30 2:08 ` [PATCH 05/10] ARM: omap: use " Rob Herring
@ 2011-04-30 2:08 ` Rob Herring
2011-04-30 2:08 ` [PATCH 07/10] ARM: vexpress: " Rob Herring
` (4 subsequent siblings)
10 siblings, 0 replies; 16+ messages in thread
From: Rob Herring @ 2011-04-30 2:08 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
Convert realview to use common scu_init_cpus function.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
arch/arm/mach-realview/platsmp.c | 17 +----------------
1 files changed, 1 insertions(+), 16 deletions(-)
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index f443ef3..655a93b 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -43,22 +43,7 @@ static void __iomem *scu_base_addr(void)
*/
void __init smp_init_cpus(void)
{
- void __iomem *scu_base = scu_base_addr();
- unsigned int i, ncores;
-
- ncores = scu_base ? scu_get_core_count(scu_base) : 1;
-
- /* sanity check */
- if (ncores > NR_CPUS) {
- printk(KERN_WARNING
- "Realview: no. of cores (%d) greater than configured "
- "maximum of %d - clipping\n",
- ncores, NR_CPUS);
- ncores = NR_CPUS;
- }
-
- for (i = 0; i < ncores; i++)
- set_cpu_possible(i, true);
+ scu_init_cpus(scu_base_addr());
}
void __init platform_smp_prepare_cpus(unsigned int max_cpus)
--
1.7.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 07/10] ARM: vexpress: use common scu_init_cpus
2011-04-30 2:08 Resend [PATCH 00/10] ARM: SMP initialization consolidation Rob Herring
` (5 preceding siblings ...)
2011-04-30 2:08 ` [PATCH 06/10] ARM: realview: " Rob Herring
@ 2011-04-30 2:08 ` Rob Herring
2011-04-30 2:08 ` [PATCH 08/10] ARM: ux500: " Rob Herring
` (3 subsequent siblings)
10 siblings, 0 replies; 16+ messages in thread
From: Rob Herring @ 2011-04-30 2:08 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
Convert Versatile Express to use common scu_init_cpus function.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
arch/arm/mach-vexpress/ct-ca9x4.c | 5 +----
1 files changed, 1 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
index a96772d..4d1476f 100644
--- a/arch/arm/mach-vexpress/ct-ca9x4.c
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -206,10 +206,7 @@ static void __init ct_ca9x4_init(void)
#ifdef CONFIG_SMP
static void ct_ca9x4_init_cpu_map(void)
{
- int i, ncores = scu_get_core_count(MMIO_P2V(A9_MPCORE_SCU));
-
- for (i = 0; i < ncores; ++i)
- set_cpu_possible(i, true);
+ scu_init_cpus(MMIO_P2V(A9_MPCORE_SCU));
}
static void ct_ca9x4_smp_enable(unsigned int max_cpus)
--
1.7.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 08/10] ARM: ux500: use common scu_init_cpus
2011-04-30 2:08 Resend [PATCH 00/10] ARM: SMP initialization consolidation Rob Herring
` (6 preceding siblings ...)
2011-04-30 2:08 ` [PATCH 07/10] ARM: vexpress: " Rob Herring
@ 2011-04-30 2:08 ` Rob Herring
2011-04-30 2:08 ` [PATCH 09/10] ARM: shmobile: " Rob Herring
` (2 subsequent siblings)
10 siblings, 0 replies; 16+ messages in thread
From: Rob Herring @ 2011-04-30 2:08 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
Convert ux500 to use common scu_init_cpus function.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
arch/arm/mach-ux500/platsmp.c | 17 +----------------
1 files changed, 1 insertions(+), 16 deletions(-)
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index 88f30b8..7b19f9d 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -69,22 +69,7 @@ static void __init wakeup_secondary(void)
*/
void __init smp_init_cpus(void)
{
- void __iomem *scu_base = scu_base_addr();
- unsigned int i, ncores;
-
- ncores = scu_base ? scu_get_core_count(scu_base) : 1;
-
- /* sanity check */
- if (ncores > NR_CPUS) {
- printk(KERN_WARNING
- "U8500: no. of cores (%d) greater than configured "
- "maximum of %d - clipping\n",
- ncores, NR_CPUS);
- ncores = NR_CPUS;
- }
-
- for (i = 0; i < ncores; i++)
- set_cpu_possible(i, true);
+ scu_init_cpus(scu_base_addr());
}
void __init platform_smp_prepare_cpus(unsigned int max_cpus)
--
1.7.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 09/10] ARM: shmobile: use common scu_init_cpus
2011-04-30 2:08 Resend [PATCH 00/10] ARM: SMP initialization consolidation Rob Herring
` (7 preceding siblings ...)
2011-04-30 2:08 ` [PATCH 08/10] ARM: ux500: " Rob Herring
@ 2011-04-30 2:08 ` Rob Herring
2011-04-30 2:08 ` [PATCH 10/10] ARM: move set_cpu_present calls to common smp code Rob Herring
2011-04-30 5:58 ` Resend [PATCH 00/10] ARM: SMP initialization consolidation Stephen Boyd
10 siblings, 0 replies; 16+ messages in thread
From: Rob Herring @ 2011-04-30 2:08 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
Convert shmobile to use common scu_init_cpus function.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
arch/arm/mach-shmobile/include/mach/common.h | 2 +-
arch/arm/mach-shmobile/platsmp.c | 15 ++-------------
arch/arm/mach-shmobile/smp-sh73a0.c | 6 ++----
3 files changed, 5 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index 013ac0e..6401490 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -41,7 +41,7 @@ extern void sh73a0_pinmux_init(void);
extern struct clk sh73a0_extal1_clk;
extern struct clk sh73a0_extal2_clk;
-extern unsigned int sh73a0_get_core_count(void);
+extern void sh73a0_smp_init_cpus(void);
extern void sh73a0_secondary_init(unsigned int cpu);
extern int sh73a0_boot_secondary(unsigned int cpu);
extern void sh73a0_smp_prepare_cpus(void);
diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c
index 65e879b..c681333 100644
--- a/arch/arm/mach-shmobile/platsmp.c
+++ b/arch/arm/mach-shmobile/platsmp.c
@@ -20,14 +20,6 @@
#include <asm/mach-types.h>
#include <mach/common.h>
-static unsigned int __init shmobile_smp_get_core_count(void)
-{
- if (machine_is_ag5evm())
- return sh73a0_get_core_count();
-
- return 1;
-}
-
static void __init shmobile_smp_prepare_cpus(void)
{
if (machine_is_ag5evm())
@@ -52,11 +44,8 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
void __init smp_init_cpus(void)
{
- unsigned int ncores = shmobile_smp_get_core_count();
- unsigned int i;
-
- for (i = 0; i < ncores; i++)
- set_cpu_possible(i, true);
+ if (machine_is_ag5evm())
+ sh73a0_smp_init_cpus();
}
void __init platform_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index a156d21..018a24f 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -55,11 +55,9 @@ static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
__raw_writel(tmp, scu_base + 8);
}
-unsigned int __init sh73a0_get_core_count(void)
+void __init sh73a0_smp_init_cpus(void)
{
- void __iomem *scu_base = scu_base_addr();
-
- return scu_get_core_count(scu_base);
+ scu_init_cpus(scu_base_addr());
}
void __cpuinit sh73a0_secondary_init(unsigned int cpu)
--
1.7.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 10/10] ARM: move set_cpu_present calls to common smp code
2011-04-30 2:08 Resend [PATCH 00/10] ARM: SMP initialization consolidation Rob Herring
` (8 preceding siblings ...)
2011-04-30 2:08 ` [PATCH 09/10] ARM: shmobile: " Rob Herring
@ 2011-04-30 2:08 ` Rob Herring
2011-04-30 5:58 ` Resend [PATCH 00/10] ARM: SMP initialization consolidation Stephen Boyd
10 siblings, 0 replies; 16+ messages in thread
From: Rob Herring @ 2011-04-30 2:08 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
All platforms do the same thing and mark all cores present, so move this to
common smp init code. A platform can still override this and mark a core not
present if that is ever desired.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
arch/arm/kernel/smp.c | 4 ++++
arch/arm/mach-msm/platsmp.c | 11 +----------
arch/arm/mach-omap2/omap-smp.c | 9 ---------
arch/arm/mach-realview/platsmp.c | 9 ---------
arch/arm/mach-shmobile/platsmp.c | 5 -----
arch/arm/mach-ux500/platsmp.c | 9 ---------
arch/arm/mach-vexpress/ct-ca9x4.c | 4 ----
arch/arm/mach-vexpress/platsmp.c | 5 +----
8 files changed, 6 insertions(+), 50 deletions(-)
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 8fe05ad..ccb912d 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -351,6 +351,7 @@ void __init smp_prepare_boot_cpu(void)
void __init smp_prepare_cpus(unsigned int max_cpus)
{
+ int i;
unsigned int ncores = num_possible_cpus();
smp_store_cpu_info(smp_processor_id());
@@ -361,6 +362,9 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
if (max_cpus > ncores)
max_cpus = ncores;
+ for (i = 0; i < max_cpus; i++)
+ set_cpu_present(i, true);
+
if (max_cpus > 1) {
/*
* Enable the local timer or broadcast device for the
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index 4315bb5..3ee7151 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -87,13 +87,4 @@ void __init smp_init_cpus(void)
}
void __init platform_smp_prepare_cpus(unsigned int max_cpus)
-{
- int i;
-
- /*
- * Initialise the present map, which describes the set of CPUs
- * actually populated at the present time.
- */
- for (i = 0; i < max_cpus; i++)
- set_cpu_present(i, true);
-}
+{}
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 831c8a0..dfcc9ac 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -108,15 +108,6 @@ void __init smp_init_cpus(void)
void __init platform_smp_prepare_cpus(unsigned int max_cpus)
{
- int i;
-
- /*
- * Initialise the present map, which describes the set of CPUs
- * actually populated at the present time.
- */
- for (i = 0; i < max_cpus; i++)
- set_cpu_present(i, true);
-
/*
* Initialise the SCU and wake up the secondary core using
* wakeup_secondary().
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index 655a93b..dc57494 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -48,15 +48,6 @@ void __init smp_init_cpus(void)
void __init platform_smp_prepare_cpus(unsigned int max_cpus)
{
- int i;
-
- /*
- * Initialise the present map, which describes the set of CPUs
- * actually populated at the present time.
- */
- for (i = 0; i < max_cpus; i++)
- set_cpu_present(i, true);
-
scu_enable(scu_base_addr());
/*
diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c
index c681333..a9bdcda 100644
--- a/arch/arm/mach-shmobile/platsmp.c
+++ b/arch/arm/mach-shmobile/platsmp.c
@@ -50,10 +50,5 @@ void __init smp_init_cpus(void)
void __init platform_smp_prepare_cpus(unsigned int max_cpus)
{
- int i;
-
- for (i = 0; i < max_cpus; i++)
- set_cpu_present(i, true);
-
shmobile_smp_prepare_cpus();
}
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index 7b19f9d..f8dd320 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -74,15 +74,6 @@ void __init smp_init_cpus(void)
void __init platform_smp_prepare_cpus(unsigned int max_cpus)
{
- int i;
-
- /*
- * Initialise the present map, which describes the set of CPUs
- * actually populated at the present time.
- */
- for (i = 0; i < max_cpus; i++)
- set_cpu_present(i, true);
-
scu_enable(scu_base_addr());
wakeup_secondary();
}
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
index 4d1476f..aa366f1 100644
--- a/arch/arm/mach-vexpress/ct-ca9x4.c
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -211,10 +211,6 @@ static void ct_ca9x4_init_cpu_map(void)
static void ct_ca9x4_smp_enable(unsigned int max_cpus)
{
- int i;
- for (i = 0; i < max_cpus; i++)
- set_cpu_present(i, true);
-
scu_enable(MMIO_P2V(A9_MPCORE_SCU));
}
#endif
diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c
index 7fa0b68..0c301ed 100644
--- a/arch/arm/mach-vexpress/platsmp.c
+++ b/arch/arm/mach-vexpress/platsmp.c
@@ -31,10 +31,7 @@ void __init smp_init_cpus(void)
void __init platform_smp_prepare_cpus(unsigned int max_cpus)
{
- /*
- * Initialise the present map, which describes the set of CPUs
- * actually populated@the present time.
- */
+ /* Enable the SCU */
ct_desc->smp_enable(max_cpus);
/*
--
1.7.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* Resend [PATCH 00/10] ARM: SMP initialization consolidation
2011-04-30 2:08 Resend [PATCH 00/10] ARM: SMP initialization consolidation Rob Herring
` (9 preceding siblings ...)
2011-04-30 2:08 ` [PATCH 10/10] ARM: move set_cpu_present calls to common smp code Rob Herring
@ 2011-04-30 5:58 ` Stephen Boyd
2011-05-02 23:40 ` Russell King - ARM Linux
10 siblings, 1 reply; 16+ messages in thread
From: Stephen Boyd @ 2011-04-30 5:58 UTC (permalink / raw)
To: linux-arm-kernel
On 04/29/2011 07:08 PM, Rob Herring wrote:
> From: Rob Herring <rob.herring@calxeda.com>
>
> Resending since the patches didn't make it thru the 1st time.
>
> In order to avoid duplicating the same platform code yet again for a new
> platform, this series consolidates platforms using similar SMP startup code to
> a common implementation. A new kconfig entry SMP_COMMON_PEN is added for
> platforms using the common pen functions.
>
> OMAP uses a h/w mechansism for its pen, but it seems like it could use the same
> mechansism.
Have you seen Russell's response to similar attempts posted a few months
back?
https://lkml.org/lkml/2010/11/30/243
and
http://lists.linaro.org/pipermail/linaro-dev/2010-November/001663.html
Just something to look over and consider.
--
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
^ permalink raw reply [flat|nested] 16+ messages in thread* Resend [PATCH 00/10] ARM: SMP initialization consolidation
2011-04-30 5:58 ` Resend [PATCH 00/10] ARM: SMP initialization consolidation Stephen Boyd
@ 2011-05-02 23:40 ` Russell King - ARM Linux
2011-05-03 13:57 ` Arnd Bergmann
0 siblings, 1 reply; 16+ messages in thread
From: Russell King - ARM Linux @ 2011-05-02 23:40 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Apr 29, 2011 at 10:58:33PM -0700, Stephen Boyd wrote:
> Have you seen Russell's response to similar attempts posted a few months
> back?
>
> https://lkml.org/lkml/2010/11/30/243
>
> and
>
> http://lists.linaro.org/pipermail/linaro-dev/2010-November/001663.html
>
> Just something to look over and consider.
I know of one SoC which has three cores on it, where two are optimized
for performance and one for low power. They're all connected to the
SCU, and so are visible as three symetric CPUs.
Such a SoC may wish to do things differently from the current approach
(which is basically bring up all cores at boot) particularly as the
performance gained from each CPU is far from identical. So I've been
nervous about moving the CPU map initialization into core code.
Note that the low power CPU may not be the last in the set, so merely
limiting the system to two CPUs is not the answer.
^ permalink raw reply [flat|nested] 16+ messages in thread
* Resend [PATCH 00/10] ARM: SMP initialization consolidation
2011-05-02 23:40 ` Russell King - ARM Linux
@ 2011-05-03 13:57 ` Arnd Bergmann
2011-05-08 9:42 ` Russell King - ARM Linux
0 siblings, 1 reply; 16+ messages in thread
From: Arnd Bergmann @ 2011-05-03 13:57 UTC (permalink / raw)
To: linux-arm-kernel
On Tuesday 03 May 2011, Russell King - ARM Linux wrote:
> Such a SoC may wish to do things differently from the current approach
> (which is basically bring up all cores at boot) particularly as the
> performance gained from each CPU is far from identical. So I've been
> nervous about moving the CPU map initialization into core code.
>
> Note that the low power CPU may not be the last in the set, so merely
> limiting the system to two CPUs is not the answer.
If I read the patches correctly, it's still strictly opt-in per platform.
When a platform wants to support the setup you mentioned or something
even stranger, all it would have to do is provide its own versions of
the SMP pen and scu init function, right?
Arnd
^ permalink raw reply [flat|nested] 16+ messages in thread
* Resend [PATCH 00/10] ARM: SMP initialization consolidation
2011-05-03 13:57 ` Arnd Bergmann
@ 2011-05-08 9:42 ` Russell King - ARM Linux
2011-05-08 19:38 ` Rob Herring
0 siblings, 1 reply; 16+ messages in thread
From: Russell King - ARM Linux @ 2011-05-08 9:42 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, May 03, 2011 at 03:57:42PM +0200, Arnd Bergmann wrote:
> On Tuesday 03 May 2011, Russell King - ARM Linux wrote:
> > Such a SoC may wish to do things differently from the current approach
> > (which is basically bring up all cores at boot) particularly as the
> > performance gained from each CPU is far from identical. So I've been
> > nervous about moving the CPU map initialization into core code.
> >
> > Note that the low power CPU may not be the last in the set, so merely
> > limiting the system to two CPUs is not the answer.
>
> If I read the patches correctly, it's still strictly opt-in per platform.
Except where things are moved into the generic code, such as the setting
of present CPUs.
> When a platform wants to support the setup you mentioned or something
> even stranger, all it would have to do is provide its own versions of
> the SMP pen and scu init function, right?
No.
As I've already said in the past, I doubt that very many platforms actually
need the SMP pen stuff. There are two situations where you need that:
1. If you have more than two CPUs, _and_ you have no way to control which
of those CPUs are triggered to jump into the kernel.
2. If you have hotplug and you have no way to power down or reset the
CPUs.
There seems to be few platforms which fall into (1) - most SMP
implementations are based around two CPUs today so if you only have one
secondary CPU, there's no point triggering it via a soft irq to enter the
kernel, then hold it in a pen, then release it from the pen, etc.
Those which seem to fall into (2) do so because they've cut'n'pasted the
code from the Realview platforms, along with its bugs with the auxillary
control register, which subseqently get tweaked.
My feeling is that most of the hotplug implementations are just basic "this
seems to approximately work" kind of things rather than someone taking a
look at what the hardware supports and doing something more useful (such
as powering down the CPU, placing it in reset, etc.)
However, (2) is dependent on (1) as both share pen_release. (2) needs to
be sorted by platforms before the (1) can be eliminated from platform code.
I'd much rather see the pen_release stuff being eliminated from platforms
where it's not necessary, rather than being turned into a generic thing
which everyone uses because its there. Not only should this simplify the
code, but also reduce the size of the platform SMP support code.
^ permalink raw reply [flat|nested] 16+ messages in thread
* Resend [PATCH 00/10] ARM: SMP initialization consolidation
2011-05-08 9:42 ` Russell King - ARM Linux
@ 2011-05-08 19:38 ` Rob Herring
0 siblings, 0 replies; 16+ messages in thread
From: Rob Herring @ 2011-05-08 19:38 UTC (permalink / raw)
To: linux-arm-kernel
On 05/08/2011 04:42 AM, Russell King - ARM Linux wrote:
> On Tue, May 03, 2011 at 03:57:42PM +0200, Arnd Bergmann wrote:
>> On Tuesday 03 May 2011, Russell King - ARM Linux wrote:
>>> Such a SoC may wish to do things differently from the current approach
>>> (which is basically bring up all cores at boot) particularly as the
>>> performance gained from each CPU is far from identical. So I've been
>>> nervous about moving the CPU map initialization into core code.
>>>
>>> Note that the low power CPU may not be the last in the set, so merely
>>> limiting the system to two CPUs is not the answer.
>>
>> If I read the patches correctly, it's still strictly opt-in per platform.
>
> Except where things are moved into the generic code, such as the setting
> of present CPUs.
Is there any harm in making the default be mark all cores present then
let the platform code clear the present state if so desired? This was my
intention.
>
>> When a platform wants to support the setup you mentioned or something
>> even stranger, all it would have to do is provide its own versions of
>> the SMP pen and scu init function, right?
>
> No.
>
> As I've already said in the past, I doubt that very many platforms actually
> need the SMP pen stuff. There are two situations where you need that:
>
> 1. If you have more than two CPUs, _and_ you have no way to control which
> of those CPUs are triggered to jump into the kernel.
> 2. If you have hotplug and you have no way to power down or reset the
> CPUs.
>
> There seems to be few platforms which fall into (1) - most SMP
> implementations are based around two CPUs today so if you only have one
> secondary CPU, there's no point triggering it via a soft irq to enter the
> kernel, then hold it in a pen, then release it from the pen, etc.
>
> Those which seem to fall into (2) do so because they've cut'n'pasted the
> code from the Realview platforms, along with its bugs with the auxillary
> control register, which subseqently get tweaked.
>
> My feeling is that most of the hotplug implementations are just basic "this
> seems to approximately work" kind of things rather than someone taking a
> look at what the hardware supports and doing something more useful (such
> as powering down the CPU, placing it in reset, etc.)
>
> However, (2) is dependent on (1) as both share pen_release. (2) needs to
> be sorted by platforms before the (1) can be eliminated from platform code.
>
> I'd much rather see the pen_release stuff being eliminated from platforms
> where it's not necessary, rather than being turned into a generic thing
> which everyone uses because its there. Not only should this simplify the
> code, but also reduce the size of the platform SMP support code.
>
Thanks for the explanation. I now see that for my case I won't need the
pen code at all.
What about the scu_init_cpus patch? You posted something similar as
Stephen pointed out that I had missed. Do you plan to merge that?
Rob
^ permalink raw reply [flat|nested] 16+ messages in thread