From: catalin.marinas@arm.com (Catalin Marinas)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 00/19] ARM: Add support for the Large Physical Address Extensions
Date: Sun, 8 May 2011 13:51:19 +0100 [thread overview]
Message-ID: <1304859098-10760-1-git-send-email-catalin.marinas@arm.com> (raw)
Hi,
This set of patches adds support for the Large Physical Extensions on
the ARM architecture (available with the Cortex-A15 processor). LPAE
comes with a 3-level page table format (compared to 2-level for the
classic one), allowing up to 40-bit physical address space.
The ARM LPAE documentation is available from (free registration needed):
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0406b_virtualization_extns/index.html
The full set of patches on top of linux-next (LPAE, support for an
emulated Versatile Express with Cortex-A15 tile and generic timers) is
available on this branch:
git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-2.6-cm.git arm-lpae-next
Changelog:
- Rebased on top of linux-next 20110503.
- Using pgtable-nopud.h (following Russell's patch for the classic page
table format).
- Other fixes related to the nopud and v2p changes (mainly idmap).
- The SMP support patch was dropped and a more generic variant added that
makes TTBR1 always point to swapper_pg_dir on ARMv7.
- Some of the previous patches already merged into mainline.
Catalin Marinas (15):
ARM: LPAE: Use long long printk format for displaying the pud
ARM: LPAE: Use unsigned long for __phys_to_virt and __virt_to_phys
ARM: LPAE: Make TTBR1 always point to swapper_pg_dir on ARMv7
ARM: LPAE: Use PMD_(SHIFT|SIZE|MASK) instead of PGDIR_*
ARM: LPAE: Factor out 2-level page table definitions into separate
files
ARM: LPAE: Add (pte|pmd|pgd|pgprot)val_t type definitions as u32
ARM: LPAE: Use a mask for physical addresses in page table entries
ARM: LPAE: Introduce the 3-level page table format definitions
ARM: LPAE: Page table maintenance for the 3-level format
ARM: LPAE: MMU setup for the 3-level page table format
ARM: LPAE: Add fault handling support
ARM: LPAE: Add context switching support
ARM: LPAE: Add identity mapping support for the 3-level page table
format
ARM: LPAE: Add support for cpu_v7_do_(suspend|resume)
ARM: LPAE: Add the Kconfig entries
Will Deacon (4):
ARM: LPAE: add ISBs around MMU enabling code
ARM: LPAE: Use generic dma_addr_t type definition
ARM: LPAE: mark memory banks with start > ULONG_MAX as highmem
ARM: LPAE: add support for ATAG_MEM64
arch/arm/Kconfig | 2 +-
arch/arm/include/asm/assembler.h | 11 ++
arch/arm/include/asm/memory.h | 4 +-
arch/arm/include/asm/page.h | 44 +-----
arch/arm/include/asm/pgalloc.h | 28 ++++-
arch/arm/include/asm/pgtable-2level-hwdef.h | 93 ++++++++++++
arch/arm/include/asm/pgtable-2level-types.h | 67 +++++++++
arch/arm/include/asm/pgtable-2level.h | 143 ++++++++++++++++++
arch/arm/include/asm/pgtable-3level-hwdef.h | 81 ++++++++++
arch/arm/include/asm/pgtable-3level-types.h | 68 +++++++++
arch/arm/include/asm/pgtable-3level.h | 106 ++++++++++++++
arch/arm/include/asm/pgtable-hwdef.h | 81 +----------
arch/arm/include/asm/pgtable.h | 211 +++++++++------------------
arch/arm/include/asm/proc-fns.h | 25 +++
arch/arm/include/asm/setup.h | 10 +-
arch/arm/include/asm/smp.h | 1 +
arch/arm/include/asm/tlbflush.h | 4 +-
arch/arm/include/asm/types.h | 11 +--
arch/arm/kernel/compat.c | 4 +-
arch/arm/kernel/head.S | 126 +++++++++++-----
arch/arm/kernel/module.c | 2 +-
arch/arm/kernel/setup.c | 12 ++-
arch/arm/kernel/smp.c | 1 +
arch/arm/mm/Kconfig | 13 ++
arch/arm/mm/alignment.c | 8 +-
arch/arm/mm/context.c | 19 ++-
arch/arm/mm/dma-mapping.c | 6 +-
arch/arm/mm/fault.c | 82 ++++++++++-
arch/arm/mm/idmap.c | 36 +++++-
arch/arm/mm/ioremap.c | 8 +-
arch/arm/mm/mm.h | 4 +-
arch/arm/mm/mmu.c | 51 +++++--
arch/arm/mm/pgd.c | 51 ++++++-
arch/arm/mm/proc-macros.S | 5 +-
arch/arm/mm/proc-v7.S | 152 +++++++++++++++++--
35 files changed, 1207 insertions(+), 363 deletions(-)
create mode 100644 arch/arm/include/asm/pgtable-2level-hwdef.h
create mode 100644 arch/arm/include/asm/pgtable-2level-types.h
create mode 100644 arch/arm/include/asm/pgtable-2level.h
create mode 100644 arch/arm/include/asm/pgtable-3level-hwdef.h
create mode 100644 arch/arm/include/asm/pgtable-3level-types.h
create mode 100644 arch/arm/include/asm/pgtable-3level.h
next reply other threads:[~2011-05-08 12:51 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-05-08 12:51 Catalin Marinas [this message]
2011-05-08 12:51 ` [PATCH v5 01/19] ARM: LPAE: Use long long printk format for displaying the pud Catalin Marinas
2011-05-08 12:51 ` [PATCH v5 02/19] ARM: LPAE: add ISBs around MMU enabling code Catalin Marinas
2011-05-08 21:41 ` Russell King - ARM Linux
2011-05-09 10:22 ` Catalin Marinas
2011-05-09 10:32 ` Russell King - ARM Linux
2011-05-09 10:59 ` Catalin Marinas
2011-05-09 12:05 ` Russell King - ARM Linux
2011-05-09 13:36 ` Catalin Marinas
2011-05-09 15:01 ` Catalin Marinas
2011-05-09 15:34 ` Russell King - ARM Linux
2011-05-09 15:38 ` Catalin Marinas
2011-05-09 15:48 ` Russell King - ARM Linux
2011-05-09 16:02 ` Catalin Marinas
2011-05-08 12:51 ` [PATCH v5 03/19] ARM: LPAE: Use unsigned long for __phys_to_virt and __virt_to_phys Catalin Marinas
2011-05-08 21:44 ` Russell King - ARM Linux
2011-05-16 17:28 ` Catalin Marinas
2011-05-08 12:51 ` [PATCH v5 04/19] ARM: LPAE: Make TTBR1 always point to swapper_pg_dir on ARMv7 Catalin Marinas
2011-05-08 12:51 ` [PATCH v5 05/19] ARM: LPAE: Use PMD_(SHIFT|SIZE|MASK) instead of PGDIR_* Catalin Marinas
2011-05-08 12:51 ` [PATCH v5 06/19] ARM: LPAE: Factor out 2-level page table definitions into separate files Catalin Marinas
2011-05-08 12:51 ` [PATCH v5 07/19] ARM: LPAE: Add (pte|pmd|pgd|pgprot)val_t type definitions as u32 Catalin Marinas
2011-05-08 12:51 ` [PATCH v5 08/19] ARM: LPAE: Use a mask for physical addresses in page table entries Catalin Marinas
2011-05-08 12:51 ` [PATCH v5 09/19] ARM: LPAE: Introduce the 3-level page table format definitions Catalin Marinas
2011-05-08 12:51 ` [PATCH v5 10/19] ARM: LPAE: Page table maintenance for the 3-level format Catalin Marinas
2011-05-08 12:51 ` [PATCH v5 11/19] ARM: LPAE: MMU setup for the 3-level page table format Catalin Marinas
2011-05-08 12:51 ` [PATCH v5 12/19] ARM: LPAE: Add fault handling support Catalin Marinas
2011-05-08 12:51 ` [PATCH v5 13/19] ARM: LPAE: Add context switching support Catalin Marinas
2011-05-08 12:51 ` [PATCH v5 14/19] ARM: LPAE: Add identity mapping support for the 3-level page table format Catalin Marinas
2011-05-08 12:51 ` [PATCH v5 15/19] ARM: LPAE: Add support for cpu_v7_do_(suspend|resume) Catalin Marinas
2011-05-18 7:27 ` Tony Lindgren
2011-05-20 13:21 ` Catalin Marinas
2011-05-20 15:17 ` Jean-Christophe PLAGNIOL-VILLARD
2011-05-20 18:09 ` Nicolas Pitre
2011-05-22 21:09 ` Catalin Marinas
2011-05-24 6:26 ` Tony Lindgren
2011-05-08 12:51 ` [PATCH v5 16/19] ARM: LPAE: Use generic dma_addr_t type definition Catalin Marinas
2011-05-08 12:51 ` [PATCH v5 17/19] ARM: LPAE: mark memory banks with start > ULONG_MAX as highmem Catalin Marinas
2011-05-08 12:51 ` [PATCH v5 18/19] ARM: LPAE: add support for ATAG_MEM64 Catalin Marinas
2011-05-08 12:51 ` [PATCH v5 19/19] ARM: LPAE: Add the Kconfig entries Catalin Marinas
2011-05-11 10:23 ` [PATCH 20/19] ARM: LPAE: Invalidate the TLB before freeing the PMD Catalin Marinas
2011-05-11 10:31 ` Sergei Shtylyov
2011-05-11 10:40 ` Catalin Marinas
2011-05-11 10:54 ` Russell King - ARM Linux
2011-05-11 13:40 ` Catalin Marinas
2011-05-11 14:00 ` Russell King - ARM Linux
2011-05-11 15:58 ` Catalin Marinas
2011-05-23 16:54 ` [PATCH v5 00/19] ARM: Add support for the Large Physical Address Extensions Russell King - ARM Linux
2011-05-23 17:22 ` Catalin Marinas
2011-05-24 10:04 ` Catalin Marinas
2011-05-26 21:15 ` Catalin Marinas
2011-05-26 21:44 ` Russell King - ARM Linux
2011-05-27 9:09 ` Catalin Marinas
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