[PATCH RFC 0/3] AT91: SPI: Add peripheral chip select decoding

[PATCH RFC 0/3] AT91: SPI: Add peripheral chip select decoding

[Christian Gagneraud]

This is a RFC on adding support for CS decode on AT91 platforms.
CS decode allow to control many SPI devices with few CS lines by simply coding
the CS# on the lines, that is with 4 CS lines you can adress up to 15 SPI 
devices. Of course this require a decoder on the slave side.

First of all, an atmel_spi_data structure have been added to describe which 
GPIO they use as CS line and as well to enable or not the use of the CS decode 
feature.
Then the at91_add_device_spi() has been revamped, it is now used to add a SPI 
*controller* device only. The boards need to register their SPI devices with 
spi_register_board_info().

All of this has been tested on a PortuxG20 board, as an example the last patch 
show how to use it.

As it is only an RFC for now, I didn't bother with other AT91 SoC than the 9G20.

Christian Gagneraud (3):
  AT91: SPI: Add CS decode support
  AT91: SPI: Split SPI controller device and SPI device
  AT91: SPI: Add example of platform specific CS/GPIO usage

 arch/arm/mach-at91/at91sam9260_devices.c |   60 ++++++-------
 arch/arm/mach-at91/board-stamp9g20.c     |   62 +++++++++++++-
 arch/arm/mach-at91/include/mach/board.h  |   11 ++-
 drivers/spi/atmel_spi.c                  |  137 ++++++++++++++++++++----------
 4 files changed, 189 insertions(+), 81 deletions(-)

-- 
1.7.4.1

[PATCH RFC 1/3] AT91: SPI: Add CS decode support

[Christian Gagneraud]

With CS decode, up to 15 Chip Select signals can be generated with the
four lines using an external 4- to 16-bit decoder.

Signed-off-by: Christian Gagneraud <chris@techworks.ie>
---
 drivers/spi/atmel_spi.c |  137 +++++++++++++++++++++++++++++++---------------
 1 files changed, 92 insertions(+), 45 deletions(-)

diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index 08711e9..df0dec9 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -50,12 +50,8 @@ struct atmel_spi {
 
 	void			*buffer;
 	dma_addr_t		buffer_dma;
-};
 
-/* Controller-specific per-slave state */
-struct atmel_spi_device {
-	unsigned int		npcs_pin;
-	u32			csr;
+	struct atmel_spi_data	*board_data;
 };
 
 #define BUFFER_SIZE		PAGE_SIZE
@@ -105,25 +101,34 @@ static bool atmel_spi_is_v2(void)
 
 static void cs_activate(struct atmel_spi *as, struct spi_device *spi)
 {
-	struct atmel_spi_device *asd = spi->controller_state;
+	u32 csr;
 	unsigned active = spi->mode & SPI_CS_HIGH;
 	u32 mr;
+	int i;
+	unsigned cs_decoding = as->board_data->flags & ATMEL_SPI_CS_DEC;
 
 	if (atmel_spi_is_v2()) {
+		csr = (u32)spi->controller_state;
 		/*
 		 * Always use CSR0. This ensures that the clock
 		 * switches to the correct idle polarity before we
 		 * toggle the CS.
 		 */
-		spi_writel(as, CSR0, asd->csr);
+		spi_writel(as, CSR0, csr);
 		spi_writel(as, MR, SPI_BF(PCS, 0x0e) | SPI_BIT(MODFDIS)
 				| SPI_BIT(MSTR));
 		mr = spi_readl(as, MR);
-		gpio_set_value(asd->npcs_pin, active);
+		if (cs_decoding) {
+			for (i = 0; i < as->board_data->num_cs_pin; i++) {
+				unsigned gpio = as->board_data->cs_pins[i].gpio;
+				unsigned val = 1  & (spi->chip_select>>i);
+				gpio_set_value(gpio, val);
+			}
+		} else
+			gpio_set_value(as->board_data->cs_pins[spi->chip_select].gpio,
+				       active);
 	} else {
 		u32 cpol = (spi->mode & SPI_CPOL) ? SPI_BIT(CPOL) : 0;
-		int i;
-		u32 csr;
 
 		/* Make sure clock polarity is correct */
 		for (i = 0; i < spi->master->num_chipselect; i++) {
@@ -136,36 +141,43 @@ static void cs_activate(struct atmel_spi *as, struct spi_device *spi)
 		mr = spi_readl(as, MR);
 		mr = SPI_BFINS(PCS, ~(1 << spi->chip_select), mr);
 		if (spi->chip_select != 0)
-			gpio_set_value(asd->npcs_pin, active);
+			gpio_set_value(as->board_data->cs_pins[spi->chip_select].gpio, active);
 		spi_writel(as, MR, mr);
 	}
 
 	dev_dbg(&spi->dev, "activate %u%s, mr %08x\n",
-			asd->npcs_pin, active ? " (high)" : "",
+			spi->chip_select, active ? " (high)" : "",
 			mr);
 }
 
 static void cs_deactivate(struct atmel_spi *as, struct spi_device *spi)
 {
-	struct atmel_spi_device *asd = spi->controller_state;
 	unsigned active = spi->mode & SPI_CS_HIGH;
 	u32 mr;
+	unsigned cs_decoding = as->board_data->flags & ATMEL_SPI_CS_DEC;
+	int i;
 
 	/* only deactivate *this* device; sometimes transfers to
 	 * another device may be active when this routine is called.
 	 */
 	mr = spi_readl(as, MR);
-	if (~SPI_BFEXT(PCS, mr) & (1 << spi->chip_select)) {
+	if ((!cs_decoding && (~SPI_BFEXT(PCS, mr) & (1 << spi->chip_select))) ||
+	    (cs_decoding && (~SPI_BFEXT(PCS, mr) & spi->chip_select))) {
 		mr = SPI_BFINS(PCS, 0xf, mr);
 		spi_writel(as, MR, mr);
 	}
 
 	dev_dbg(&spi->dev, "DEactivate %u%s, mr %08x\n",
-			asd->npcs_pin, active ? " (low)" : "",
+			spi->chip_select, active ? " (low)" : "",
 			mr);
 
-	if (atmel_spi_is_v2() || spi->chip_select != 0)
-		gpio_set_value(asd->npcs_pin, !active);
+	if (atmel_spi_is_v2() || spi->chip_select != 0) {
+		if (cs_decoding) {
+			for (i = 0; i < as->board_data->num_cs_pin; i++)
+				gpio_set_value(as->board_data->cs_pins[i].gpio, 1);
+		} else
+			gpio_set_value(as->board_data->cs_pins[spi->chip_select].gpio, !active);
+	}
 }
 
 static inline int atmel_spi_xfer_is_last(struct spi_message *msg,
@@ -538,14 +550,14 @@ atmel_spi_interrupt(int irq, void *dev_id)
 static int atmel_spi_setup(struct spi_device *spi)
 {
 	struct atmel_spi	*as;
-	struct atmel_spi_device	*asd;
 	u32			scbr, csr;
 	unsigned int		bits = spi->bits_per_word;
 	unsigned long		bus_hz;
-	unsigned int		npcs_pin;
 	int			ret;
+	unsigned		cs_decoding;
 
 	as = spi_master_get_devdata(spi->master);
+	cs_decoding = as->board_data->flags & ATMEL_SPI_CS_DEC;
 
 	if (as->stopping)
 		return -ESHUTDOWN;
@@ -571,6 +583,15 @@ static int atmel_spi_setup(struct spi_device *spi)
 		dev_dbg(&spi->dev, "setup: can't be active-high\n");
 		return -EINVAL;
 	}
+	if (cs_decoding && (spi->mode & SPI_CS_HIGH)) {
+		dev_dbg(&spi->dev, "setup: can't be active-high while using CS decoding\n");
+		return -EINVAL;
+	}
+	if (cs_decoding && !atmel_spi_is_v2()) {
+		dev_dbg(&spi->dev, "setup: CS decoding not supported on this controller\n");
+		return -EINVAL;
+	}
+
 
 	/* v1 chips start out at half the peripheral bus speed. */
 	bus_hz = clk_get_rate(as->clk);
@@ -614,22 +635,15 @@ static int atmel_spi_setup(struct spi_device *spi)
 	csr |= SPI_BF(DLYBCT, 0);
 
 	/* chipselect must have been muxed as GPIO (e.g. in board setup) */
-	npcs_pin = (unsigned int)spi->controller_data;
-	asd = spi->controller_state;
-	if (!asd) {
-		asd = kzalloc(sizeof(struct atmel_spi_device), GFP_KERNEL);
-		if (!asd)
-			return -ENOMEM;
-
-		ret = gpio_request(npcs_pin, dev_name(&spi->dev));
-		if (ret) {
-			kfree(asd);
-			return ret;
+	if (!spi->controller_state) {
+		/* Request the GPIO only if not using CS decoding */
+		if (!cs_decoding) {
+			u32 gpio = as->board_data->cs_pins[spi->chip_select].gpio;
+			ret = gpio_request(gpio, dev_name(&spi->dev));
+			if (ret)
+				return ret;
+			gpio_direction_output(gpio, !(spi->mode & SPI_CS_HIGH));
 		}
-
-		asd->npcs_pin = npcs_pin;
-		spi->controller_state = asd;
-		gpio_direction_output(npcs_pin, !(spi->mode & SPI_CS_HIGH));
 	} else {
 		unsigned long		flags;
 
@@ -640,7 +654,7 @@ static int atmel_spi_setup(struct spi_device *spi)
 		spin_unlock_irqrestore(&as->lock, flags);
 	}
 
-	asd->csr = csr;
+	spi->controller_state = (void *)csr;
 
 	dev_dbg(&spi->dev,
 		"setup: %lu Hz bpw %u mode 0x%x -> csr%d %08x\n",
@@ -659,7 +673,7 @@ static int atmel_spi_transfer(struct spi_device *spi, struct spi_message *msg)
 	unsigned long		flags;
 	struct device		*controller = spi->master->dev.parent;
 	u8			bits;
-	struct atmel_spi_device	*asd;
+	u32			csr = (u32)spi->controller_state;
 
 	as = spi_master_get_devdata(spi->master);
 
@@ -679,8 +693,7 @@ static int atmel_spi_transfer(struct spi_device *spi, struct spi_message *msg)
 		}
 
 		if (xfer->bits_per_word) {
-			asd = spi->controller_state;
-			bits = (asd->csr >> 4) & 0xf;
+			bits = (csr >> 4) & 0xf;
 			if (bits != xfer->bits_per_word - 8) {
 				dev_dbg(&spi->dev, "you can't yet change "
 					 "bits_per_word in transfers\n");
@@ -733,11 +746,9 @@ static int atmel_spi_transfer(struct spi_device *spi, struct spi_message *msg)
 static void atmel_spi_cleanup(struct spi_device *spi)
 {
 	struct atmel_spi	*as = spi_master_get_devdata(spi->master);
-	struct atmel_spi_device	*asd = spi->controller_state;
-	unsigned		gpio = (unsigned) spi->controller_data;
 	unsigned long		flags;
 
-	if (!asd)
+	if (!spi->controller_state)
 		return;
 
 	spin_lock_irqsave(&as->lock, flags);
@@ -748,8 +759,6 @@ static void atmel_spi_cleanup(struct spi_device *spi)
 	spin_unlock_irqrestore(&as->lock, flags);
 
 	spi->controller_state = NULL;
-	gpio_free(gpio);
-	kfree(asd);
 }
 
 /*-------------------------------------------------------------------------*/
@@ -762,6 +771,8 @@ static int __init atmel_spi_probe(struct platform_device *pdev)
 	int			ret;
 	struct spi_master	*master;
 	struct atmel_spi	*as;
+	struct atmel_spi_data	*board_data;
+	int			i;
 
 	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	if (!regs)
@@ -784,8 +795,19 @@ static int __init atmel_spi_probe(struct platform_device *pdev)
 	/* the spi->mode bits understood by this driver: */
 	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
 
+	/* Get board specific data */
+	ret = -EINVAL;
+	board_data = platform_get_drvdata(pdev);
+	if (!board_data)
+		goto out_free;
+
 	master->bus_num = pdev->id;
-	master->num_chipselect = 4;
+	if (board_data->flags & ATMEL_SPI_CS_DEC) {
+		master->num_chipselect = (0x01 << board_data->num_cs_pin) - 1;
+		dev_dbg(&pdev->dev, "Chip select decoding enabled (%d:%d)\n",
+			board_data->num_cs_pin, 0x01 << board_data->num_cs_pin);
+	} else
+		master->num_chipselect = board_data->num_cs_pin;
 	master->setup = atmel_spi_setup;
 	master->transfer = atmel_spi_transfer;
 	master->cleanup = atmel_spi_cleanup;
@@ -793,6 +815,23 @@ static int __init atmel_spi_probe(struct platform_device *pdev)
 
 	as = spi_master_get_devdata(master);
 
+	/* Keep revelant board info in our structure */
+	as->board_data = board_data;
+
+	/* Request and init the CS pins here only when using CS
+	 * decoding. When not using CS decoding this is done on a per
+	 * SPI device basis (see atmel_spi_setup()).
+	*/
+	if (board_data->flags & ATMEL_SPI_CS_DEC) {
+		ret = gpio_request_array(board_data->cs_pins,
+					 board_data->num_cs_pin);
+		if (ret != 0)
+			goto out_free;
+		/* CS decoding is always active low */
+		for (i = 0; i < board_data->num_cs_pin; i++)
+			gpio_direction_output(board_data->cs_pins[i].gpio, 1);
+	}
+
 	/*
 	 * Scratch buffer is used for throwaway rx and tx data.
 	 * It's coherent to minimize dcache pollution.
@@ -800,7 +839,7 @@ static int __init atmel_spi_probe(struct platform_device *pdev)
 	as->buffer = dma_alloc_coherent(&pdev->dev, BUFFER_SIZE,
 					&as->buffer_dma, GFP_KERNEL);
 	if (!as->buffer)
-		goto out_free;
+		goto out_free_pins;
 
 	spin_lock_init(&as->lock);
 	INIT_LIST_HEAD(&as->queue);
@@ -823,6 +862,8 @@ static int __init atmel_spi_probe(struct platform_device *pdev)
 	spi_writel(as, MR, SPI_BIT(MSTR) | SPI_BIT(MODFDIS));
 	spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
 	spi_writel(as, CR, SPI_BIT(SPIEN));
+	if (as->board_data->flags & ATMEL_SPI_CS_DEC)
+		spi_writel(as, MR, SPI_BIT(PCSDEC));
 
 	/* go! */
 	dev_info(&pdev->dev, "Atmel SPI Controller at 0x%08lx (irq %d)\n",
@@ -844,6 +885,9 @@ out_unmap_regs:
 out_free_buffer:
 	dma_free_coherent(&pdev->dev, BUFFER_SIZE, as->buffer,
 			as->buffer_dma);
+out_free_pins:
+	if (board_data->flags & ATMEL_SPI_CS_DEC)
+		gpio_free_array(board_data->cs_pins, board_data->num_cs_pin);
 out_free:
 	clk_put(clk);
 	spi_master_put(master);
@@ -876,6 +920,9 @@ static int __exit atmel_spi_remove(struct platform_device *pdev)
 	dma_free_coherent(&pdev->dev, BUFFER_SIZE, as->buffer,
 			as->buffer_dma);
 
+	if (as->board_data->flags & ATMEL_SPI_CS_DEC)
+		gpio_free_array(as->board_data->cs_pins,
+				as->board_data->num_cs_pin);
 	clk_disable(as->clk);
 	clk_put(as->clk);
 	free_irq(as->irq, master);
-- 
1.7.4.1

[PATCH RFC 2/3] AT91: SPI: Split SPI controller device and SPI device

[Christian Gagneraud]

Add a new atmel_spi_data structure to allow platform specific GPIO handling.
Make at91_add_device_spi(), a function to add a SPI controller device.
Plaform's SPI devices are now simply added by calling
spi_register_board_info() from the board file.

Signed-off-by: Christian Gagneraud <chris@techworks.ie>
---
 arch/arm/mach-at91/at91sam9260_devices.c |   60 ++++++++++++++----------------
 arch/arm/mach-at91/include/mach/board.h  |   11 +++++-
 2 files changed, 38 insertions(+), 33 deletions(-)

diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 07eb7b0..e34225f 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -545,7 +545,12 @@ static struct platform_device at91sam9260_spi0_device = {
 	.num_resources	= ARRAY_SIZE(spi0_resources),
 };
 
-static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
+static struct gpio spi0_standard_cs_pins[] = {
+	{ .gpio = AT91_PIN_PA3,  },
+	{ .gpio = AT91_PIN_PC11, },
+	{ .gpio = AT91_PIN_PC16, },
+	{ .gpio = AT91_PIN_PC17, },
+};
 
 static struct resource spi1_resources[] = {
 	[0] = {
@@ -571,53 +576,44 @@ static struct platform_device at91sam9260_spi1_device = {
 	.num_resources	= ARRAY_SIZE(spi1_resources),
 };
 
-static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
+static struct gpio spi1_standard_cs_pins[] = {
+	{ .gpio = AT91_PIN_PB3, },
+	{ .gpio = AT91_PIN_PC5, },
+	{ .gpio = AT91_PIN_PC4, },
+	{ .gpio = AT91_PIN_PC3, },
+};
 
-void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
+void __init at91_add_device_spi(struct atmel_spi_data *data)
 {
 	int i;
-	unsigned long cs_pin;
-	short enable_spi0 = 0;
-	short enable_spi1 = 0;
-
-	/* Choose SPI chip-selects */
-	for (i = 0; i < nr_devices; i++) {
-		if (devices[i].controller_data)
-			cs_pin = (unsigned long) devices[i].controller_data;
-		else if (devices[i].bus_num == 0)
-			cs_pin = spi0_standard_cs[devices[i].chip_select];
-		else
-			cs_pin = spi1_standard_cs[devices[i].chip_select];
-
-		if (devices[i].bus_num == 0)
-			enable_spi0 = 1;
-		else
-			enable_spi1 = 1;
-
-		/* enable chip-select pin */
-		at91_set_gpio_output(cs_pin, 1);
-
-		/* pass chip-select pin to driver */
-		devices[i].controller_data = (void *) cs_pin;
-	}
 
-	spi_register_board_info(devices, nr_devices);
+	if (data->bus_num == 0) {
+		/* enable chip-select pins */
+		if (!data->cs_pins)
+			data->cs_pins = spi0_standard_cs_pins;
+		for (i = 0; i < data->num_cs_pin; i++)
+			at91_set_gpio_output(data->cs_pins[i].gpio, 1);
 
-	/* Configure SPI bus(es) */
-	if (enable_spi0) {
 		at91_set_A_periph(AT91_PIN_PA0, 0);	/* SPI0_MISO */
 		at91_set_A_periph(AT91_PIN_PA1, 0);	/* SPI0_MOSI */
 		at91_set_A_periph(AT91_PIN_PA2, 0);	/* SPI1_SPCK */
 
 		at91_clock_associate("spi0_clk", &at91sam9260_spi0_device.dev, "spi_clk");
+		platform_set_drvdata(&at91sam9260_spi0_device, data);
 		platform_device_register(&at91sam9260_spi0_device);
-	}
-	if (enable_spi1) {
+	} else if (data->bus_num == 1) {
+		/* enable chip-select pins */
+		if (!data->cs_pins)
+			data->cs_pins = spi1_standard_cs_pins;
+		for (i = 0; i < data->num_cs_pin; i++)
+			at91_set_gpio_output(data->cs_pins[i].gpio, 1);
+
 		at91_set_A_periph(AT91_PIN_PB0, 0);	/* SPI1_MISO */
 		at91_set_A_periph(AT91_PIN_PB1, 0);	/* SPI1_MOSI */
 		at91_set_A_periph(AT91_PIN_PB2, 0);	/* SPI1_SPCK */
 
 		at91_clock_associate("spi1_clk", &at91sam9260_spi1_device.dev, "spi_clk");
+		platform_set_drvdata(&at91sam9260_spi1_device, data);
 		platform_device_register(&at91sam9260_spi1_device);
 	}
 }
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index 2b499eb..d7cc95f 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -124,7 +124,16 @@ extern void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_de
 #endif
 
  /* SPI */
-extern void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices);
+struct atmel_spi_data {
+	unsigned	bus_num;
+	unsigned	num_cs_pin;
+	struct gpio	*cs_pins;
+	unsigned	flags;
+#define ATMEL_SPI_CS_DEC	0x01	/* The CS pins are decoded to
+					   (2^num_cs_pin)-1 logical CS
+					   lines */
+};
+extern void __init at91_add_device_spi(struct atmel_spi_data *data);
 
  /* Serial */
 #define ATMEL_UART_CTS	0x01
-- 
1.7.4.1

[PATCH RFC 3/3] AT91: SPI: Add example of platform specific CS/GPIO usage

[Christian Gagneraud]

As an example, I used this board to show how to use the CS decode feature.

Signed-off-by: Christian Gagneraud <chris@techworks.ie>
---
 arch/arm/mach-at91/board-stamp9g20.c |   62 ++++++++++++++++++++++++++++++++--
 1 files changed, 59 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c
index f8902b1..8278927 100644
--- a/arch/arm/mach-at91/board-stamp9g20.c
+++ b/arch/arm/mach-at91/board-stamp9g20.c
@@ -211,6 +211,25 @@ static struct gpio_led stamp9g20evb_leds[] = {
 /*
  * SPI devices
  */
+static struct atmel_spi_data portuxg20_spi0_data = {
+	.bus_num	= 0,
+	.num_cs_pin	= 2
+};
+
+/* Use LEDs for demo purpose */
+static struct gpio portuxg20_spi1_cs_pins[] = {
+	{ .gpio = AT91_PIN_PC5  },
+	{ .gpio = AT91_PIN_PC4  },
+	{ .gpio = AT91_PIN_PC10 },
+};
+
+static struct atmel_spi_data portuxg20_spi1_data = {
+	.bus_num	= 1,
+	.num_cs_pin	= 3,
+	.cs_pins	= &portuxg20_spi1_cs_pins[0],
+	.flags		= ATMEL_SPI_CS_DEC
+};
+
 static struct spi_board_info portuxg20_spi_devices[] = {
 	{
 		.modalias	= "spidev",
@@ -219,7 +238,42 @@ static struct spi_board_info portuxg20_spi_devices[] = {
 		.bus_num	= 0,
 	}, {
 		.modalias	= "spidev",
-		.chip_select	= 0,
+		.chip_select	= 1,
+		.max_speed_hz	= 1 * 1000 * 1000,
+		.bus_num	= 0,
+	}, {
+		.modalias	= "spidev",
+		.chip_select	= 0x0,
+		.max_speed_hz	= 1 * 1000 * 1000,
+		.bus_num	= 1,
+	}, {
+		.modalias	= "spidev",
+		.chip_select	= 0x1,
+		.max_speed_hz	= 1 * 1000 * 1000,
+		.bus_num	= 1,
+	}, {
+		.modalias	= "spidev",
+		.chip_select	= 0x2,
+		.max_speed_hz	= 1 * 1000 * 1000,
+		.bus_num	= 1,
+	}, {
+		.modalias	= "spidev",
+		.chip_select	= 0x3,
+		.max_speed_hz	= 1 * 1000 * 1000,
+		.bus_num	= 1,
+	}, {
+		.modalias	= "spidev",
+		.chip_select	= 0x4,
+		.max_speed_hz	= 1 * 1000 * 1000,
+		.bus_num	= 1,
+	}, {
+		.modalias	= "spidev",
+		.chip_select	= 0x5,
+		.max_speed_hz	= 1 * 1000 * 1000,
+		.bus_num	= 1,
+	}, {
+		.modalias	= "spidev",
+		.chip_select	= 0x6,
 		.max_speed_hz	= 1 * 1000 * 1000,
 		.bus_num	= 1,
 	},
@@ -276,9 +330,11 @@ static void __init portuxg20_board_init(void)
 	/* I2C */
 	at91_add_device_i2c(NULL, 0);
 	/* SPI */
-	at91_add_device_spi(portuxg20_spi_devices, ARRAY_SIZE(portuxg20_spi_devices));
+	at91_add_device_spi(&portuxg20_spi0_data);
+	at91_add_device_spi(&portuxg20_spi1_data);
+	spi_register_board_info(portuxg20_spi_devices, ARRAY_SIZE(portuxg20_spi_devices));
 	/* LEDs */
-	at91_gpio_leds(portuxg20_leds, ARRAY_SIZE(portuxg20_leds));
+	/* at91_gpio_leds(portuxg20_leds, ARRAY_SIZE(portuxg20_leds)); */
 }
 
 static void __init stamp9g20evb_board_init(void)
-- 
1.7.4.1