* [PATCH] [CPUFREQ] S3C6410: Add some lower frequencies for 800MHz base clock operation
@ 2011-06-29 3:26 Mark Brown
2011-06-29 14:00 ` Kukjin Kim
0 siblings, 1 reply; 2+ messages in thread
From: Mark Brown @ 2011-06-29 3:26 UTC (permalink / raw)
To: linux-arm-kernel
By extension from the 667MHz based clocks currently supported add 100MHz
and 200MHz operating points. Due to a lack of documentation these have not
been confirmed as supported but by extension from the existing frequencies
they should be OK, and I've given them quite a bit of runtime testing.
The major risk is synchronization with the non-ARM clocks but as we
can't currently scale the ARM PLL the risk should be relatively low.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
---
drivers/cpufreq/s3c64xx-cpufreq.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/drivers/cpufreq/s3c64xx-cpufreq.c b/drivers/cpufreq/s3c64xx-cpufreq.c
index e818248..b8d1d20 100644
--- a/drivers/cpufreq/s3c64xx-cpufreq.c
+++ b/drivers/cpufreq/s3c64xx-cpufreq.c
@@ -36,7 +36,9 @@ static struct s3c64xx_dvfs s3c64xx_dvfs_table[] = {
static struct cpufreq_frequency_table s3c64xx_freq_table[] = {
{ 0, 66000 },
+ { 0, 100000 },
{ 0, 133000 },
+ { 1, 200000 },
{ 1, 222000 },
{ 1, 266000 },
{ 2, 333000 },
--
1.7.5.4
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [PATCH] [CPUFREQ] S3C6410: Add some lower frequencies for 800MHz base clock operation
2011-06-29 3:26 [PATCH] [CPUFREQ] S3C6410: Add some lower frequencies for 800MHz base clock operation Mark Brown
@ 2011-06-29 14:00 ` Kukjin Kim
0 siblings, 0 replies; 2+ messages in thread
From: Kukjin Kim @ 2011-06-29 14:00 UTC (permalink / raw)
To: linux-arm-kernel
Mark Brown wrote:
>
> By extension from the 667MHz based clocks currently supported add 100MHz
> and 200MHz operating points. Due to a lack of documentation these have not
> been confirmed as supported but by extension from the existing frequencies
> they should be OK, and I've given them quite a bit of runtime testing.
>
> The major risk is synchronization with the non-ARM clocks but as we
> can't currently scale the ARM PLL the risk should be relatively low.
>
> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
> ---
> drivers/cpufreq/s3c64xx-cpufreq.c | 2 ++
> 1 files changed, 2 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/cpufreq/s3c64xx-cpufreq.c
b/drivers/cpufreq/s3c64xx-cpufreq.c
> index e818248..b8d1d20 100644
> --- a/drivers/cpufreq/s3c64xx-cpufreq.c
> +++ b/drivers/cpufreq/s3c64xx-cpufreq.c
> @@ -36,7 +36,9 @@ static struct s3c64xx_dvfs s3c64xx_dvfs_table[] = {
>
> static struct cpufreq_frequency_table s3c64xx_freq_table[] = {
> { 0, 66000 },
> + { 0, 100000 },
> { 0, 133000 },
> + { 1, 200000 },
> { 1, 222000 },
> { 1, 266000 },
> { 2, 333000 },
> --
> 1.7.5.4
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2011-06-29 14:00 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2011-06-29 3:26 [PATCH] [CPUFREQ] S3C6410: Add some lower frequencies for 800MHz base clock operation Mark Brown
2011-06-29 14:00 ` Kukjin Kim
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).