[PATCH v2 0/2] Add device tree probe for imx/mxc gpio

[PATCH v2 0/2] Add device tree probe for imx/mxc gpio

[Shawn Guo]

The first patch removes the uses of cpu_is_mx(), and the second one
adds device tree probe support.

Changes since v1:
 * Address review comments given by Grant and Sascha
 * Add patch #1 to get gpio range/base from gpio core

Shawn Guo (3):
      gpio/mxc: get gpio range/base from gpio core
      gpio/mxc: get rid of the uses of cpu_is_mx()
      gpio/mxc: add device tree probe support

 .../devicetree/bindings/gpio/fsl-imx-gpio.txt      |   22 +++
 arch/arm/mach-imx/mm-imx1.c                        |    8 +-
 arch/arm/mach-imx/mm-imx21.c                       |   12 +-
 arch/arm/mach-imx/mm-imx25.c                       |    8 +-
 arch/arm/mach-imx/mm-imx27.c                       |   12 +-
 arch/arm/mach-imx/mm-imx31.c                       |    6 +-
 arch/arm/mach-imx/mm-imx35.c                       |    6 +-
 arch/arm/mach-mx5/mm-mx50.c                        |   12 +-
 arch/arm/mach-mx5/mm.c                             |   22 ++--
 arch/arm/plat-mxc/devices/platform-gpio-mxc.c      |    4 +-
 arch/arm/plat-mxc/include/mach/common.h            |    2 +-
 arch/arm/plat-mxc/include/mach/gpio.h              |   13 +-
 arch/arm/plat-mxc/include/mach/irqs.h              |   21 +--
 drivers/gpio/gpio-mxc.c                            |  165 ++++++++++++++++---
 14 files changed, 219 insertions(+), 94 deletions(-)

[PATCH v2 1/3] gpio/mxc: get gpio range/base from gpio core

[Shawn Guo]

Instead of assigning the gpio range based on pdev->id, the patch
makes changes to get the range from gpio core that is dynamically
allocated.

As a result, the uses of pdev->id can be removed from the driver.
This will make dt migration of the driver easier.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/plat-mxc/include/mach/gpio.h |   13 +++++++++----
 arch/arm/plat-mxc/include/mach/irqs.h |   21 +++------------------
 drivers/gpio/gpio-mxc.c               |   18 ++++++++++--------
 3 files changed, 22 insertions(+), 30 deletions(-)

diff --git a/arch/arm/plat-mxc/include/mach/gpio.h b/arch/arm/plat-mxc/include/mach/gpio.h
index 31c820c..abdf5d7 100644
--- a/arch/arm/plat-mxc/include/mach/gpio.h
+++ b/arch/arm/plat-mxc/include/mach/gpio.h
@@ -23,10 +23,15 @@
 #include <mach/hardware.h>
 #include <asm-generic/gpio.h>
 
-
-/* There's a off-by-one betweem the gpio bank number and the gpiochip */
-/* range e.g. GPIO_1_5 is gpio 5 under linux */
-#define IMX_GPIO_NR(bank, nr)		(((bank) - 1) * 32 + (nr))
+/*
+ * There's a off-by-one betweem the gpio bank number and the gpiochip
+ * range e.g. GPIO_1_5 is gpio 5 under linux.
+ *
+ * When gpio core allocates gpio range for a bank, it starts from the
+ * end of the total range.  That is to say, bank 0 will get a higher
+ * gpio range than bank 1.
+ */
+#define IMX_GPIO_NR(bank, nr)	(ARCH_NR_GPIOS - (bank) * 32 + (nr))
 
 /* use gpiolib dispatchers */
 #define gpio_get_value		__gpio_get_value
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h
index 35c89bc..00e812b 100644
--- a/arch/arm/plat-mxc/include/mach/irqs.h
+++ b/arch/arm/plat-mxc/include/mach/irqs.h
@@ -11,6 +11,8 @@
 #ifndef __ASM_ARCH_MXC_IRQS_H__
 #define __ASM_ARCH_MXC_IRQS_H__
 
+#include <asm-generic/gpio.h>
+
 /*
  * SoCs with TZIC interrupt controller have 128 IRQs, those with AVIC have 64
  */
@@ -22,30 +24,13 @@
 
 #define MXC_GPIO_IRQ_START	MXC_INTERNAL_IRQS
 
-/* these are ordered by size to support multi-SoC kernels */
-#if defined CONFIG_SOC_IMX53
-#define MXC_GPIO_IRQS		(32 * 7)
-#elif defined CONFIG_ARCH_MX2
-#define MXC_GPIO_IRQS		(32 * 6)
-#elif defined CONFIG_SOC_IMX50
-#define MXC_GPIO_IRQS		(32 * 6)
-#elif defined CONFIG_ARCH_MX1
-#define MXC_GPIO_IRQS		(32 * 4)
-#elif defined CONFIG_ARCH_MX25
-#define MXC_GPIO_IRQS		(32 * 4)
-#elif defined CONFIG_SOC_IMX51
-#define MXC_GPIO_IRQS		(32 * 4)
-#elif defined CONFIG_ARCH_MX3
-#define MXC_GPIO_IRQS		(32 * 3)
-#endif
-
 /*
  * The next 16 interrupts are for board specific purposes.  Since
  * the kernel can only run on one machine at a time, we can re-use
  * these.  If you need more, increase MXC_BOARD_IRQS, but keep it
  * within sensible limits.
  */
-#define MXC_BOARD_IRQ_START	(MXC_INTERNAL_IRQS + MXC_GPIO_IRQS)
+#define MXC_BOARD_IRQ_START	(MXC_INTERNAL_IRQS + ARCH_NR_GPIOS)
 
 #ifdef CONFIG_MACH_MX31ADS_WM1133_EV1
 #define MXC_BOARD_IRQS  80
diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c
index 2f6a81b..8241680 100644
--- a/drivers/gpio/gpio-mxc.c
+++ b/drivers/gpio/gpio-mxc.c
@@ -240,14 +240,13 @@ static int __devinit mxc_gpio_probe(struct platform_device *pdev)
 {
 	struct mxc_gpio_port *port;
 	struct resource *iores;
+	static int once = 0;
 	int err;
 
 	port = kzalloc(sizeof(struct mxc_gpio_port), GFP_KERNEL);
 	if (!port)
 		return -ENOMEM;
 
-	port->virtual_irq_start = MXC_GPIO_IRQ_START + pdev->id * 32;
-
 	iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	if (!iores) {
 		err = -ENODEV;
@@ -277,14 +276,13 @@ static int __devinit mxc_gpio_probe(struct platform_device *pdev)
 	writel(0, port->base + GPIO_IMR);
 	writel(~0, port->base + GPIO_ISR);
 
-	/* gpio-mxc can be a generic irq chip */
-	mxc_gpio_init_gc(port);
-
 	if (cpu_is_mx2()) {
 		/* setup one handler for all GPIO interrupts */
-		if (pdev->id == 0)
+		if (!once) {
 			irq_set_chained_handler(port->irq,
 						mx2_gpio_irq_handler);
+			once = 1;
+		}
 	} else {
 		/* setup one handler for each entry */
 		irq_set_chained_handler(port->irq, mx3_gpio_irq_handler);
@@ -304,12 +302,16 @@ static int __devinit mxc_gpio_probe(struct platform_device *pdev)
 	if (err)
 		goto out_iounmap;
 
-	port->bgc.gc.base = pdev->id * 32;
-
 	err = gpiochip_add(&port->bgc.gc);
 	if (err)
 		goto out_bgpio_remove;
 
+	/* Here, we get a gpio number range/base assigned by gpio core */
+	port->virtual_irq_start = MXC_GPIO_IRQ_START + port->bgc.gc.base;
+
+	/* gpio-mxc can be a generic irq chip */
+	mxc_gpio_init_gc(port);
+
 	list_add_tail(&port->node, &mxc_gpio_ports);
 
 	return 0;
-- 
1.7.4.1

[PATCH v2 2/3] gpio/mxc: get rid of the uses of cpu_is_mx()

[Shawn Guo]

The patch removes all the uses of cpu_is_mx().  Instead, it utilizes
platform_device_id to distinguish the gpio differences among SoCs.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/mach-imx/mm-imx1.c                   |    8 +-
 arch/arm/mach-imx/mm-imx21.c                  |   12 +-
 arch/arm/mach-imx/mm-imx25.c                  |    8 +-
 arch/arm/mach-imx/mm-imx27.c                  |   12 +-
 arch/arm/mach-imx/mm-imx31.c                  |    6 +-
 arch/arm/mach-imx/mm-imx35.c                  |    6 +-
 arch/arm/mach-mx5/mm-mx50.c                   |   12 +-
 arch/arm/mach-mx5/mm.c                        |   22 ++--
 arch/arm/plat-mxc/devices/platform-gpio-mxc.c |    4 +-
 arch/arm/plat-mxc/include/mach/common.h       |    2 +-
 drivers/gpio/gpio-mxc.c                       |  131 +++++++++++++++++++++----
 11 files changed, 159 insertions(+), 64 deletions(-)

diff --git a/arch/arm/mach-imx/mm-imx1.c b/arch/arm/mach-imx/mm-imx1.c
index f2a6566..2bded59 100644
--- a/arch/arm/mach-imx/mm-imx1.c
+++ b/arch/arm/mach-imx/mm-imx1.c
@@ -50,12 +50,12 @@ void __init mx1_init_irq(void)
 
 void __init imx1_soc_init(void)
 {
-	mxc_register_gpio(0, MX1_GPIO1_BASE_ADDR, SZ_256,
+	mxc_register_gpio("imx1-gpio", 0, MX1_GPIO1_BASE_ADDR, SZ_256,
 						MX1_GPIO_INT_PORTA, 0);
-	mxc_register_gpio(1, MX1_GPIO2_BASE_ADDR, SZ_256,
+	mxc_register_gpio("imx1-gpio", 1, MX1_GPIO2_BASE_ADDR, SZ_256,
 						MX1_GPIO_INT_PORTB, 0);
-	mxc_register_gpio(2, MX1_GPIO3_BASE_ADDR, SZ_256,
+	mxc_register_gpio("imx1-gpio", 2, MX1_GPIO3_BASE_ADDR, SZ_256,
 						MX1_GPIO_INT_PORTC, 0);
-	mxc_register_gpio(3, MX1_GPIO4_BASE_ADDR, SZ_256,
+	mxc_register_gpio("imx1-gpio", 3, MX1_GPIO4_BASE_ADDR, SZ_256,
 						MX1_GPIO_INT_PORTD, 0);
 }
diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c
index 4f32a8a..d02e20d 100644
--- a/arch/arm/mach-imx/mm-imx21.c
+++ b/arch/arm/mach-imx/mm-imx21.c
@@ -77,12 +77,12 @@ void __init mx21_init_irq(void)
 
 void __init imx21_soc_init(void)
 {
-	mxc_register_gpio(0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
-	mxc_register_gpio(1, MX21_GPIO2_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
-	mxc_register_gpio(2, MX21_GPIO3_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
-	mxc_register_gpio(3, MX21_GPIO4_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
-	mxc_register_gpio(4, MX21_GPIO5_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
-	mxc_register_gpio(5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
+	mxc_register_gpio("imx2-gpio", 0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
+	mxc_register_gpio("imx2-gpio", 1, MX21_GPIO2_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
+	mxc_register_gpio("imx2-gpio", 2, MX21_GPIO3_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
+	mxc_register_gpio("imx2-gpio", 3, MX21_GPIO4_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
+	mxc_register_gpio("imx2-gpio", 4, MX21_GPIO5_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
+	mxc_register_gpio("imx2-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
 
 	imx_add_imx_dma();
 }
diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c
index 1e0c956..65099e6 100644
--- a/arch/arm/mach-imx/mm-imx25.c
+++ b/arch/arm/mach-imx/mm-imx25.c
@@ -86,10 +86,10 @@ static struct sdma_platform_data imx25_sdma_pdata __initdata = {
 
 void __init imx25_soc_init(void)
 {
-	mxc_register_gpio(0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0);
-	mxc_register_gpio(1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0);
-	mxc_register_gpio(2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0);
-	mxc_register_gpio(3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0);
+	mxc_register_gpio("imx25-gpio", 0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0);
+	mxc_register_gpio("imx25-gpio", 1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0);
+	mxc_register_gpio("imx25-gpio", 2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0);
+	mxc_register_gpio("imx25-gpio", 3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0);
 
 	imx_add_imx_sdma(MX25_SDMA_BASE_ADDR, MX25_INT_SDMA, &imx25_sdma_pdata);
 }
diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c
index 944e02d..5a62969 100644
--- a/arch/arm/mach-imx/mm-imx27.c
+++ b/arch/arm/mach-imx/mm-imx27.c
@@ -77,12 +77,12 @@ void __init mx27_init_irq(void)
 
 void __init imx27_soc_init(void)
 {
-	mxc_register_gpio(0, MX27_GPIO1_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
-	mxc_register_gpio(1, MX27_GPIO2_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
-	mxc_register_gpio(2, MX27_GPIO3_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
-	mxc_register_gpio(3, MX27_GPIO4_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
-	mxc_register_gpio(4, MX27_GPIO5_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
-	mxc_register_gpio(5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
+	mxc_register_gpio("imx2-gpio", 0, MX27_GPIO1_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
+	mxc_register_gpio("imx2-gpio", 1, MX27_GPIO2_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
+	mxc_register_gpio("imx2-gpio", 2, MX27_GPIO3_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
+	mxc_register_gpio("imx2-gpio", 3, MX27_GPIO4_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
+	mxc_register_gpio("imx2-gpio", 4, MX27_GPIO5_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
+	mxc_register_gpio("imx2-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
 
 	imx_add_imx_dma();
 }
diff --git a/arch/arm/mach-imx/mm-imx31.c b/arch/arm/mach-imx/mm-imx31.c
index a1ff96f..7017c4a 100644
--- a/arch/arm/mach-imx/mm-imx31.c
+++ b/arch/arm/mach-imx/mm-imx31.c
@@ -78,9 +78,9 @@ void __init imx31_soc_init(void)
 {
 	int to_version = mx31_revision() >> 4;
 
-	mxc_register_gpio(0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0);
-	mxc_register_gpio(1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0);
-	mxc_register_gpio(2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0);
+	mxc_register_gpio("imx-gpio", 0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0);
+	mxc_register_gpio("imx-gpio", 1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0);
+	mxc_register_gpio("imx-gpio", 2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0);
 
 	if (to_version == 1) {
 		strncpy(imx31_sdma_pdata.fw_name, "sdma-imx31-to1.bin",
diff --git a/arch/arm/mach-imx/mm-imx35.c b/arch/arm/mach-imx/mm-imx35.c
index da530ca..568a5c6 100644
--- a/arch/arm/mach-imx/mm-imx35.c
+++ b/arch/arm/mach-imx/mm-imx35.c
@@ -95,9 +95,9 @@ void __init imx35_soc_init(void)
 {
 	int to_version = mx35_revision() >> 4;
 
-	mxc_register_gpio(0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0);
-	mxc_register_gpio(1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0);
-	mxc_register_gpio(2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0);
+	mxc_register_gpio("imx-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0);
+	mxc_register_gpio("imx-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0);
+	mxc_register_gpio("imx-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0);
 
 	if (to_version == 1) {
 		strncpy(imx35_sdma_pdata.fw_name, "sdma-imx35-to1.bin",
diff --git a/arch/arm/mach-mx5/mm-mx50.c b/arch/arm/mach-mx5/mm-mx50.c
index 28c3f60..39e4a17 100644
--- a/arch/arm/mach-mx5/mm-mx50.c
+++ b/arch/arm/mach-mx5/mm-mx50.c
@@ -62,10 +62,10 @@ void __init mx50_init_irq(void)
 
 void __init imx50_soc_init(void)
 {
-	mxc_register_gpio(0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH);
-	mxc_register_gpio(1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH);
-	mxc_register_gpio(2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH);
-	mxc_register_gpio(3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH);
-	mxc_register_gpio(4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH);
-	mxc_register_gpio(5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH);
+	mxc_register_gpio("imx-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH);
+	mxc_register_gpio("imx-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH);
+	mxc_register_gpio("imx-gpio", 2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH);
+	mxc_register_gpio("imx-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH);
+	mxc_register_gpio("imx-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH);
+	mxc_register_gpio("imx-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH);
 }
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index 1b7059f..1444140 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -142,23 +142,23 @@ static struct sdma_platform_data imx53_sdma_pdata __initdata = {
 
 void __init imx51_soc_init(void)
 {
-	mxc_register_gpio(0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO1_LOW, MX51_MXC_INT_GPIO1_HIGH);
-	mxc_register_gpio(1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO2_LOW, MX51_MXC_INT_GPIO2_HIGH);
-	mxc_register_gpio(2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO3_LOW, MX51_MXC_INT_GPIO3_HIGH);
-	mxc_register_gpio(3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO4_LOW, MX51_MXC_INT_GPIO4_HIGH);
+	mxc_register_gpio("imx-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO1_LOW, MX51_MXC_INT_GPIO1_HIGH);
+	mxc_register_gpio("imx-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO2_LOW, MX51_MXC_INT_GPIO2_HIGH);
+	mxc_register_gpio("imx-gpio", 2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO3_LOW, MX51_MXC_INT_GPIO3_HIGH);
+	mxc_register_gpio("imx-gpio", 3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO4_LOW, MX51_MXC_INT_GPIO4_HIGH);
 
 	imx_add_imx_sdma(MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata);
 }
 
 void __init imx53_soc_init(void)
 {
-	mxc_register_gpio(0, MX53_GPIO1_BASE_ADDR, SZ_16K, MX53_INT_GPIO1_LOW, MX53_INT_GPIO1_HIGH);
-	mxc_register_gpio(1, MX53_GPIO2_BASE_ADDR, SZ_16K, MX53_INT_GPIO2_LOW, MX53_INT_GPIO2_HIGH);
-	mxc_register_gpio(2, MX53_GPIO3_BASE_ADDR, SZ_16K, MX53_INT_GPIO3_LOW, MX53_INT_GPIO3_HIGH);
-	mxc_register_gpio(3, MX53_GPIO4_BASE_ADDR, SZ_16K, MX53_INT_GPIO4_LOW, MX53_INT_GPIO4_HIGH);
-	mxc_register_gpio(4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH);
-	mxc_register_gpio(5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH);
-	mxc_register_gpio(6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH);
+	mxc_register_gpio("imx-gpio", 0, MX53_GPIO1_BASE_ADDR, SZ_16K, MX53_INT_GPIO1_LOW, MX53_INT_GPIO1_HIGH);
+	mxc_register_gpio("imx-gpio", 1, MX53_GPIO2_BASE_ADDR, SZ_16K, MX53_INT_GPIO2_LOW, MX53_INT_GPIO2_HIGH);
+	mxc_register_gpio("imx-gpio", 2, MX53_GPIO3_BASE_ADDR, SZ_16K, MX53_INT_GPIO3_LOW, MX53_INT_GPIO3_HIGH);
+	mxc_register_gpio("imx-gpio", 3, MX53_GPIO4_BASE_ADDR, SZ_16K, MX53_INT_GPIO4_LOW, MX53_INT_GPIO4_HIGH);
+	mxc_register_gpio("imx-gpio", 4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH);
+	mxc_register_gpio("imx-gpio", 5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH);
+	mxc_register_gpio("imx-gpio", 6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH);
 
 	imx_add_imx_sdma(MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &imx53_sdma_pdata);
 }
diff --git a/arch/arm/plat-mxc/devices/platform-gpio-mxc.c b/arch/arm/plat-mxc/devices/platform-gpio-mxc.c
index cf1b7fd..a7919a2 100644
--- a/arch/arm/plat-mxc/devices/platform-gpio-mxc.c
+++ b/arch/arm/plat-mxc/devices/platform-gpio-mxc.c
@@ -8,7 +8,7 @@
  */
 #include <mach/devices-common.h>
 
-struct platform_device *__init mxc_register_gpio(int id,
+struct platform_device *__init mxc_register_gpio(char *name, int id,
 	resource_size_t iobase, resource_size_t iosize, int irq, int irq_high)
 {
 	struct resource res[] = {
@@ -28,5 +28,5 @@ struct platform_device *__init mxc_register_gpio(int id,
 	};
 
 	return platform_device_register_resndata(&mxc_aips_bus,
-			"gpio-mxc", id, res, ARRAY_SIZE(res), NULL, 0);
+			name, id, res, ARRAY_SIZE(res), NULL, 0);
 }
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 91fa263..4e3d978 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -64,7 +64,7 @@ extern int mx51_clocks_init(unsigned long ckil, unsigned long osc,
 			unsigned long ckih1, unsigned long ckih2);
 extern int mx53_clocks_init(unsigned long ckil, unsigned long osc,
 			unsigned long ckih1, unsigned long ckih2);
-extern struct platform_device *mxc_register_gpio(int id,
+extern struct platform_device *mxc_register_gpio(char *name, int id,
 	resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
 extern int mxc_register_device(struct platform_device *pdev, void *data);
 extern void mxc_set_cpu_type(unsigned int type);
diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c
index 8241680..4875690 100644
--- a/drivers/gpio/gpio-mxc.c
+++ b/drivers/gpio/gpio-mxc.c
@@ -27,9 +27,29 @@
 #include <linux/platform_device.h>
 #include <linux/slab.h>
 #include <linux/basic_mmio_gpio.h>
-#include <mach/hardware.h>
 #include <asm-generic/bug.h>
 
+enum mxc_gpio_hwtype {
+	IMX1_GPIO = 1,
+	IMX2_GPIO,
+	IMX_GPIO,
+};
+
+/* device type dependent stuff */
+struct mxc_gpio_hwdata {
+	unsigned dr_reg;
+	unsigned gdir_reg;
+	unsigned psr_reg;
+	unsigned icr1_reg;
+	unsigned icr2_reg;
+	unsigned imr_reg;
+	unsigned isr_reg;
+	unsigned low_level;
+	unsigned high_level;
+	unsigned rise_edge;
+	unsigned fall_edge;
+};
+
 struct mxc_gpio_port {
 	struct list_head node;
 	void __iomem *base;
@@ -40,6 +60,72 @@ struct mxc_gpio_port {
 	u32 both_edges;
 };
 
+static struct mxc_gpio_hwdata imx1_imx2_gpio_hwdata = {
+	.dr_reg		= 0x1c,
+	.gdir_reg	= 0x00,
+	.psr_reg	= 0x24,
+	.icr1_reg	= 0x28,
+	.icr2_reg	= 0x2c,
+	.imr_reg	= 0x30,
+	.isr_reg	= 0x34,
+	.low_level	= 0x03,
+	.high_level	= 0x02,
+	.rise_edge	= 0x00,
+	.fall_edge	= 0x01,
+};
+
+static struct mxc_gpio_hwdata imx_gpio_hwdata = {
+	.dr_reg		= 0x00,
+	.gdir_reg	= 0x04,
+	.psr_reg	= 0x08,
+	.icr1_reg	= 0x0c,
+	.icr2_reg	= 0x10,
+	.imr_reg	= 0x14,
+	.isr_reg	= 0x18,
+	.low_level	= 0x00,
+	.high_level	= 0x01,
+	.rise_edge	= 0x02,
+	.fall_edge	= 0x03,
+};
+
+static enum mxc_gpio_hwtype mxc_gpio_hwtype;
+static struct mxc_gpio_hwdata *mxc_gpio_hwdata;
+
+#define GPIO_DR			(mxc_gpio_hwdata->dr_reg)
+#define GPIO_GDIR		(mxc_gpio_hwdata->gdir_reg)
+#define GPIO_PSR		(mxc_gpio_hwdata->psr_reg)
+#define GPIO_ICR1		(mxc_gpio_hwdata->icr1_reg)
+#define GPIO_ICR2		(mxc_gpio_hwdata->icr2_reg)
+#define GPIO_IMR		(mxc_gpio_hwdata->imr_reg)
+#define GPIO_ISR		(mxc_gpio_hwdata->isr_reg)
+
+#define GPIO_INT_LOW_LEV	(mxc_gpio_hwdata->low_level)
+#define GPIO_INT_HIGH_LEV	(mxc_gpio_hwdata->high_level)
+#define GPIO_INT_RISE_EDGE	(mxc_gpio_hwdata->rise_edge)
+#define GPIO_INT_FALL_EDGE	(mxc_gpio_hwdata->fall_edge)
+#define GPIO_INT_NONE		0x4
+
+static struct platform_device_id mxc_gpio_devtype[] = {
+	{
+		.name = "imx1-gpio",
+		.driver_data = IMX1_GPIO,
+	}, {
+		.name = "imx21-gpio",
+		.driver_data = IMX2_GPIO,
+	}, {
+		.name = "imx25-gpio",
+		.driver_data = IMX_GPIO,
+	}, {
+		.name = "imx27-gpio",
+		.driver_data = IMX2_GPIO,
+	}, {
+		.name = "imx-gpio",
+		.driver_data = IMX_GPIO,
+	}, {
+		/* sentinel */
+	}
+};
+
 /*
  * MX2 has one interrupt *for all* gpio ports. The list is used
  * to save the references to all ports, so that mx2_gpio_irq_handler
@@ -47,22 +133,6 @@ struct mxc_gpio_port {
  */
 static LIST_HEAD(mxc_gpio_ports);
 
-#define cpu_is_mx1_mx2()	(cpu_is_mx1() || cpu_is_mx2())
-
-#define GPIO_DR		(cpu_is_mx1_mx2() ? 0x1c : 0x00)
-#define GPIO_GDIR	(cpu_is_mx1_mx2() ? 0x00 : 0x04)
-#define GPIO_PSR	(cpu_is_mx1_mx2() ? 0x24 : 0x08)
-#define GPIO_ICR1	(cpu_is_mx1_mx2() ? 0x28 : 0x0C)
-#define GPIO_ICR2	(cpu_is_mx1_mx2() ? 0x2C : 0x10)
-#define GPIO_IMR	(cpu_is_mx1_mx2() ? 0x30 : 0x14)
-#define GPIO_ISR	(cpu_is_mx1_mx2() ? 0x34 : 0x18)
-
-#define GPIO_INT_LOW_LEV	(cpu_is_mx1_mx2() ? 0x3 : 0x0)
-#define GPIO_INT_HIGH_LEV	(cpu_is_mx1_mx2() ? 0x2 : 0x1)
-#define GPIO_INT_RISE_EDGE	(cpu_is_mx1_mx2() ? 0x0 : 0x2)
-#define GPIO_INT_FALL_EDGE	(cpu_is_mx1_mx2() ? 0x1 : 0x3)
-#define GPIO_INT_NONE		0x4
-
 /* Note: This driver assumes 32 GPIOs are handled in one register */
 
 static int gpio_set_irq_type(struct irq_data *d, u32 type)
@@ -236,6 +306,28 @@ static void __init mxc_gpio_init_gc(struct mxc_gpio_port *port)
 			       IRQ_NOREQUEST, 0);
 }
 
+static void __devinit mxc_gpio_get_hw(struct platform_device *pdev)
+{
+	enum mxc_gpio_hwtype hwtype = pdev->id_entry->driver_data;
+
+	if (mxc_gpio_hwtype) {
+		/*
+		 * The driver works with a reasonable presupposition,
+		 * that is all gpio ports must be the same type when
+		 * running on one soc.
+		 */
+		BUG_ON(mxc_gpio_hwtype != hwtype);
+		return;
+	}
+
+	if (hwtype == IMX1_GPIO || hwtype == IMX2_GPIO)
+		mxc_gpio_hwdata = &imx1_imx2_gpio_hwdata;
+	else
+		mxc_gpio_hwdata = &imx_gpio_hwdata;
+
+	mxc_gpio_hwtype = hwtype;
+}
+
 static int __devinit mxc_gpio_probe(struct platform_device *pdev)
 {
 	struct mxc_gpio_port *port;
@@ -243,6 +335,8 @@ static int __devinit mxc_gpio_probe(struct platform_device *pdev)
 	static int once = 0;
 	int err;
 
+	mxc_gpio_get_hw(pdev);
+
 	port = kzalloc(sizeof(struct mxc_gpio_port), GFP_KERNEL);
 	if (!port)
 		return -ENOMEM;
@@ -276,7 +370,7 @@ static int __devinit mxc_gpio_probe(struct platform_device *pdev)
 	writel(0, port->base + GPIO_IMR);
 	writel(~0, port->base + GPIO_ISR);
 
-	if (cpu_is_mx2()) {
+	if (mxc_gpio_hwtype == IMX2_GPIO) {
 		/* setup one handler for all GPIO interrupts */
 		if (!once) {
 			irq_set_chained_handler(port->irq,
@@ -334,6 +428,7 @@ static struct platform_driver mxc_gpio_driver = {
 		.owner	= THIS_MODULE,
 	},
 	.probe		= mxc_gpio_probe,
+	.id_table	= mxc_gpio_devtype,
 };
 
 static int __init gpio_mxc_init(void)
-- 
1.7.4.1

[PATCH v2 3/3] gpio/mxc: add device tree probe support

[Shawn Guo]

The patch adds device tree probe support for gpio-mxc driver.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
---
 .../devicetree/bindings/gpio/fsl-imx-gpio.txt      |   22 ++++++++++++++++++++
 drivers/gpio/gpio-mxc.c                            |   18 +++++++++++++++-
 2 files changed, 39 insertions(+), 1 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/gpio/fsl-imx-gpio.txt

diff --git a/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.txt b/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.txt
new file mode 100644
index 0000000..4363ae4
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.txt
@@ -0,0 +1,22 @@
+* Freescale i.MX/MXC GPIO controller
+
+Required properties:
+- compatible : Should be "fsl,<soc>-gpio"
+- reg : Address and length of the register set for the device
+- interrupts : Should be the port interrupt shared by all 32 pins, if
+  one number.  If two numbers, the first one is the interrupt shared
+  by low 16 pins and the second one is for high 16 pins.
+- gpio-controller : Marks the device node as a gpio controller.
+- #gpio-cells : Should be two.  The first cell is the pin number and
+  the second cell is used to specify optional parameters (currently
+  unused).
+
+Example:
+
+gpio0: gpio at 73f84000 {
+	compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
+	reg = <0x73f84000 0x4000>;
+	interrupts = <50 51>;
+	gpio-controller;
+	#gpio-cells = <2>;
+};
diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c
index 4875690..059d44a 100644
--- a/drivers/gpio/gpio-mxc.c
+++ b/drivers/gpio/gpio-mxc.c
@@ -27,6 +27,8 @@
 #include <linux/platform_device.h>
 #include <linux/slab.h>
 #include <linux/basic_mmio_gpio.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
 #include <asm-generic/bug.h>
 
 enum mxc_gpio_hwtype {
@@ -126,6 +128,13 @@ static struct platform_device_id mxc_gpio_devtype[] = {
 	}
 };
 
+static const struct of_device_id mxc_gpio_dt_ids[] = {
+	{ .compatible = "fsl,imx1-gpio", .data = &mxc_gpio_devtype[IMX1_GPIO], },
+	{ .compatible = "fsl,imx21-gpio", .data = &mxc_gpio_devtype[IMX2_GPIO], },
+	{ .compatible = "fsl,imx31-gpio", .data = &mxc_gpio_devtype[IMX_GPIO], },
+	{ /* sentinel */ }
+};
+
 /*
  * MX2 has one interrupt *for all* gpio ports. The list is used
  * to save the references to all ports, so that mx2_gpio_irq_handler
@@ -308,7 +317,13 @@ static void __init mxc_gpio_init_gc(struct mxc_gpio_port *port)
 
 static void __devinit mxc_gpio_get_hw(struct platform_device *pdev)
 {
-	enum mxc_gpio_hwtype hwtype = pdev->id_entry->driver_data;
+	const struct of_device_id *of_id =
+			of_match_device(mxc_gpio_dt_ids, &pdev->dev);
+	enum mxc_gpio_hwtype hwtype;
+
+	if (of_id)
+		pdev->id_entry = of_id->data;
+	hwtype = pdev->id_entry->driver_data;
 
 	if (mxc_gpio_hwtype) {
 		/*
@@ -426,6 +441,7 @@ static struct platform_driver mxc_gpio_driver = {
 	.driver		= {
 		.name	= "gpio-mxc",
 		.owner	= THIS_MODULE,
+		.of_match_table = mxc_gpio_dt_ids,
 	},
 	.probe		= mxc_gpio_probe,
 	.id_table	= mxc_gpio_devtype,
-- 
1.7.4.1

[PATCH v2 1/3] gpio/mxc: get gpio range/base from gpio core

[Sascha Hauer]

On Tue, Jul 05, 2011 at 11:19:24PM +0800, Shawn Guo wrote:
> Instead of assigning the gpio range based on pdev->id, the patch
> makes changes to get the range from gpio core that is dynamically
> allocated.
> 
> As a result, the uses of pdev->id can be removed from the driver.
> This will make dt migration of the driver easier.
> 
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> Cc: Grant Likely <grant.likely@secretlab.ca>
> Cc: Sascha Hauer <s.hauer@pengutronix.de>
> ---
>  arch/arm/plat-mxc/include/mach/gpio.h |   13 +++++++++----
>  arch/arm/plat-mxc/include/mach/irqs.h |   21 +++------------------
>  drivers/gpio/gpio-mxc.c               |   18 ++++++++++--------
>  3 files changed, 22 insertions(+), 30 deletions(-)
> 
> diff --git a/arch/arm/plat-mxc/include/mach/gpio.h b/arch/arm/plat-mxc/include/mach/gpio.h
> index 31c820c..abdf5d7 100644
> --- a/arch/arm/plat-mxc/include/mach/gpio.h
> +++ b/arch/arm/plat-mxc/include/mach/gpio.h
> @@ -23,10 +23,15 @@
>  #include <mach/hardware.h>
>  #include <asm-generic/gpio.h>
>  
> -
> -/* There's a off-by-one betweem the gpio bank number and the gpiochip */
> -/* range e.g. GPIO_1_5 is gpio 5 under linux */
> -#define IMX_GPIO_NR(bank, nr)		(((bank) - 1) * 32 + (nr))
> +/*
> + * There's a off-by-one betweem the gpio bank number and the gpiochip
> + * range e.g. GPIO_1_5 is gpio 5 under linux.
> + *
> + * When gpio core allocates gpio range for a bank, it starts from the
> + * end of the total range.  That is to say, bank 0 will get a higher
> + * gpio range than bank 1.
> + */
> +#define IMX_GPIO_NR(bank, nr)	(ARCH_NR_GPIOS - (bank) * 32 + (nr))

That is not a good idea. First of all not all boards use this macro.
This could be fixed, but it is a no go to allocate the gpios dynamically
and add a macro which makes assumptions on the range which gets
allocated.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

[PATCH v2 1/3] gpio/mxc: get gpio range/base from gpio core

[Grant Likely]

On Tue, Jul 5, 2011 at 10:56 AM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> On Tue, Jul 05, 2011 at 11:19:24PM +0800, Shawn Guo wrote:
>> Instead of assigning the gpio range based on pdev->id, the patch
>> makes changes to get the range from gpio core that is dynamically
>> allocated.
>>
>> As a result, the uses of pdev->id can be removed from the driver.
>> This will make dt migration of the driver easier.
>>
>> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
>> Cc: Grant Likely <grant.likely@secretlab.ca>
>> Cc: Sascha Hauer <s.hauer@pengutronix.de>
>> ---
>> ?arch/arm/plat-mxc/include/mach/gpio.h | ? 13 +++++++++----
>> ?arch/arm/plat-mxc/include/mach/irqs.h | ? 21 +++------------------
>> ?drivers/gpio/gpio-mxc.c ? ? ? ? ? ? ? | ? 18 ++++++++++--------
>> ?3 files changed, 22 insertions(+), 30 deletions(-)
>>
>> diff --git a/arch/arm/plat-mxc/include/mach/gpio.h b/arch/arm/plat-mxc/include/mach/gpio.h
>> index 31c820c..abdf5d7 100644
>> --- a/arch/arm/plat-mxc/include/mach/gpio.h
>> +++ b/arch/arm/plat-mxc/include/mach/gpio.h
>> @@ -23,10 +23,15 @@
>> ?#include <mach/hardware.h>
>> ?#include <asm-generic/gpio.h>
>>
>> -
>> -/* There's a off-by-one betweem the gpio bank number and the gpiochip */
>> -/* range e.g. GPIO_1_5 is gpio 5 under linux */
>> -#define IMX_GPIO_NR(bank, nr) ? ? ? ? ? ? ? ?(((bank) - 1) * 32 + (nr))
>> +/*
>> + * There's a off-by-one betweem the gpio bank number and the gpiochip
>> + * range e.g. GPIO_1_5 is gpio 5 under linux.
>> + *
>> + * When gpio core allocates gpio range for a bank, it starts from the
>> + * end of the total range. ?That is to say, bank 0 will get a higher
>> + * gpio range than bank 1.
>> + */
>> +#define IMX_GPIO_NR(bank, nr) ? ? ? ?(ARCH_NR_GPIOS - (bank) * 32 + (nr))
>
> That is not a good idea. First of all not all boards use this macro.
> This could be fixed, but it is a no go to allocate the gpios dynamically
> and add a macro which makes assumptions on the range which gets
> allocated.

Plus it makes the assumption that the imx gpio controllers will be the
first ones registered, and that the allocation scheme will not change
some time in the future.  You don't actually need to change this
anyway since existing static platform_device registrations can still
use the pdev->id value.  It is only the DT use case that should
dynamically assign the gpio number because all uses in that case can
use a DT gpio specifier instead of a hard coded number.

g.

>
> Sascha
>
> --
> Pengutronix e.K. ? ? ? ? ? ? ? ? ? ? ? ? ? | ? ? ? ? ? ? ? ? ? ? ? ? ? ? |
> Industrial Linux Solutions ? ? ? ? ? ? ? ? | http://www.pengutronix.de/ ?|
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 ? ?|
> Amtsgericht Hildesheim, HRA 2686 ? ? ? ? ? | Fax: ? +49-5121-206917-5555 |
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>



-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

[PATCH v2 2/3] gpio/mxc: get rid of the uses of cpu_is_mx()

[Grant Likely]

On Tue, Jul 5, 2011 at 9:19 AM, Shawn Guo <shawn.guo@linaro.org> wrote:
> The patch removes all the uses of cpu_is_mx(). ?Instead, it utilizes
> platform_device_id to distinguish the gpio differences among SoCs.
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> Cc: Grant Likely <grant.likely@secretlab.ca>
> Cc: Sascha Hauer <s.hauer@pengutronix.de>

Don't forget to cc linux-kernel on GPIO patches.

Acked-by: Grant Likely <grant.likely@secretlab.ca>

> ---
> ?arch/arm/mach-imx/mm-imx1.c ? ? ? ? ? ? ? ? ? | ? ?8 +-
> ?arch/arm/mach-imx/mm-imx21.c ? ? ? ? ? ? ? ? ?| ? 12 +-
> ?arch/arm/mach-imx/mm-imx25.c ? ? ? ? ? ? ? ? ?| ? ?8 +-
> ?arch/arm/mach-imx/mm-imx27.c ? ? ? ? ? ? ? ? ?| ? 12 +-
> ?arch/arm/mach-imx/mm-imx31.c ? ? ? ? ? ? ? ? ?| ? ?6 +-
> ?arch/arm/mach-imx/mm-imx35.c ? ? ? ? ? ? ? ? ?| ? ?6 +-
> ?arch/arm/mach-mx5/mm-mx50.c ? ? ? ? ? ? ? ? ? | ? 12 +-
> ?arch/arm/mach-mx5/mm.c ? ? ? ? ? ? ? ? ? ? ? ?| ? 22 ++--
> ?arch/arm/plat-mxc/devices/platform-gpio-mxc.c | ? ?4 +-
> ?arch/arm/plat-mxc/include/mach/common.h ? ? ? | ? ?2 +-
> ?drivers/gpio/gpio-mxc.c ? ? ? ? ? ? ? ? ? ? ? | ?131 +++++++++++++++++++++----
> ?11 files changed, 159 insertions(+), 64 deletions(-)
>
> diff --git a/arch/arm/mach-imx/mm-imx1.c b/arch/arm/mach-imx/mm-imx1.c
> index f2a6566..2bded59 100644
> --- a/arch/arm/mach-imx/mm-imx1.c
> +++ b/arch/arm/mach-imx/mm-imx1.c
> @@ -50,12 +50,12 @@ void __init mx1_init_irq(void)
>
> ?void __init imx1_soc_init(void)
> ?{
> - ? ? ? mxc_register_gpio(0, MX1_GPIO1_BASE_ADDR, SZ_256,
> + ? ? ? mxc_register_gpio("imx1-gpio", 0, MX1_GPIO1_BASE_ADDR, SZ_256,
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?MX1_GPIO_INT_PORTA, 0);
> - ? ? ? mxc_register_gpio(1, MX1_GPIO2_BASE_ADDR, SZ_256,
> + ? ? ? mxc_register_gpio("imx1-gpio", 1, MX1_GPIO2_BASE_ADDR, SZ_256,
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?MX1_GPIO_INT_PORTB, 0);
> - ? ? ? mxc_register_gpio(2, MX1_GPIO3_BASE_ADDR, SZ_256,
> + ? ? ? mxc_register_gpio("imx1-gpio", 2, MX1_GPIO3_BASE_ADDR, SZ_256,
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?MX1_GPIO_INT_PORTC, 0);
> - ? ? ? mxc_register_gpio(3, MX1_GPIO4_BASE_ADDR, SZ_256,
> + ? ? ? mxc_register_gpio("imx1-gpio", 3, MX1_GPIO4_BASE_ADDR, SZ_256,
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?MX1_GPIO_INT_PORTD, 0);
> ?}
> diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c
> index 4f32a8a..d02e20d 100644
> --- a/arch/arm/mach-imx/mm-imx21.c
> +++ b/arch/arm/mach-imx/mm-imx21.c
> @@ -77,12 +77,12 @@ void __init mx21_init_irq(void)
>
> ?void __init imx21_soc_init(void)
> ?{
> - ? ? ? mxc_register_gpio(0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
> - ? ? ? mxc_register_gpio(1, MX21_GPIO2_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
> - ? ? ? mxc_register_gpio(2, MX21_GPIO3_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
> - ? ? ? mxc_register_gpio(3, MX21_GPIO4_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
> - ? ? ? mxc_register_gpio(4, MX21_GPIO5_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
> - ? ? ? mxc_register_gpio(5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
> + ? ? ? mxc_register_gpio("imx2-gpio", 0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
> + ? ? ? mxc_register_gpio("imx2-gpio", 1, MX21_GPIO2_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
> + ? ? ? mxc_register_gpio("imx2-gpio", 2, MX21_GPIO3_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
> + ? ? ? mxc_register_gpio("imx2-gpio", 3, MX21_GPIO4_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
> + ? ? ? mxc_register_gpio("imx2-gpio", 4, MX21_GPIO5_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
> + ? ? ? mxc_register_gpio("imx2-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
>
> ? ? ? ?imx_add_imx_dma();
> ?}
> diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c
> index 1e0c956..65099e6 100644
> --- a/arch/arm/mach-imx/mm-imx25.c
> +++ b/arch/arm/mach-imx/mm-imx25.c
> @@ -86,10 +86,10 @@ static struct sdma_platform_data imx25_sdma_pdata __initdata = {
>
> ?void __init imx25_soc_init(void)
> ?{
> - ? ? ? mxc_register_gpio(0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0);
> - ? ? ? mxc_register_gpio(1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0);
> - ? ? ? mxc_register_gpio(2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0);
> - ? ? ? mxc_register_gpio(3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0);
> + ? ? ? mxc_register_gpio("imx25-gpio", 0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0);
> + ? ? ? mxc_register_gpio("imx25-gpio", 1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0);
> + ? ? ? mxc_register_gpio("imx25-gpio", 2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0);
> + ? ? ? mxc_register_gpio("imx25-gpio", 3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0);
>
> ? ? ? ?imx_add_imx_sdma(MX25_SDMA_BASE_ADDR, MX25_INT_SDMA, &imx25_sdma_pdata);
> ?}
> diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c
> index 944e02d..5a62969 100644
> --- a/arch/arm/mach-imx/mm-imx27.c
> +++ b/arch/arm/mach-imx/mm-imx27.c
> @@ -77,12 +77,12 @@ void __init mx27_init_irq(void)
>
> ?void __init imx27_soc_init(void)
> ?{
> - ? ? ? mxc_register_gpio(0, MX27_GPIO1_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
> - ? ? ? mxc_register_gpio(1, MX27_GPIO2_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
> - ? ? ? mxc_register_gpio(2, MX27_GPIO3_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
> - ? ? ? mxc_register_gpio(3, MX27_GPIO4_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
> - ? ? ? mxc_register_gpio(4, MX27_GPIO5_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
> - ? ? ? mxc_register_gpio(5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
> + ? ? ? mxc_register_gpio("imx2-gpio", 0, MX27_GPIO1_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
> + ? ? ? mxc_register_gpio("imx2-gpio", 1, MX27_GPIO2_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
> + ? ? ? mxc_register_gpio("imx2-gpio", 2, MX27_GPIO3_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
> + ? ? ? mxc_register_gpio("imx2-gpio", 3, MX27_GPIO4_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
> + ? ? ? mxc_register_gpio("imx2-gpio", 4, MX27_GPIO5_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
> + ? ? ? mxc_register_gpio("imx2-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
>
> ? ? ? ?imx_add_imx_dma();
> ?}
> diff --git a/arch/arm/mach-imx/mm-imx31.c b/arch/arm/mach-imx/mm-imx31.c
> index a1ff96f..7017c4a 100644
> --- a/arch/arm/mach-imx/mm-imx31.c
> +++ b/arch/arm/mach-imx/mm-imx31.c
> @@ -78,9 +78,9 @@ void __init imx31_soc_init(void)
> ?{
> ? ? ? ?int to_version = mx31_revision() >> 4;
>
> - ? ? ? mxc_register_gpio(0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0);
> - ? ? ? mxc_register_gpio(1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0);
> - ? ? ? mxc_register_gpio(2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0);
> + ? ? ? mxc_register_gpio("imx-gpio", 0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0);
> + ? ? ? mxc_register_gpio("imx-gpio", 1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0);
> + ? ? ? mxc_register_gpio("imx-gpio", 2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0);
>
> ? ? ? ?if (to_version == 1) {
> ? ? ? ? ? ? ? ?strncpy(imx31_sdma_pdata.fw_name, "sdma-imx31-to1.bin",
> diff --git a/arch/arm/mach-imx/mm-imx35.c b/arch/arm/mach-imx/mm-imx35.c
> index da530ca..568a5c6 100644
> --- a/arch/arm/mach-imx/mm-imx35.c
> +++ b/arch/arm/mach-imx/mm-imx35.c
> @@ -95,9 +95,9 @@ void __init imx35_soc_init(void)
> ?{
> ? ? ? ?int to_version = mx35_revision() >> 4;
>
> - ? ? ? mxc_register_gpio(0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0);
> - ? ? ? mxc_register_gpio(1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0);
> - ? ? ? mxc_register_gpio(2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0);
> + ? ? ? mxc_register_gpio("imx-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0);
> + ? ? ? mxc_register_gpio("imx-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0);
> + ? ? ? mxc_register_gpio("imx-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0);
>
> ? ? ? ?if (to_version == 1) {
> ? ? ? ? ? ? ? ?strncpy(imx35_sdma_pdata.fw_name, "sdma-imx35-to1.bin",
> diff --git a/arch/arm/mach-mx5/mm-mx50.c b/arch/arm/mach-mx5/mm-mx50.c
> index 28c3f60..39e4a17 100644
> --- a/arch/arm/mach-mx5/mm-mx50.c
> +++ b/arch/arm/mach-mx5/mm-mx50.c
> @@ -62,10 +62,10 @@ void __init mx50_init_irq(void)
>
> ?void __init imx50_soc_init(void)
> ?{
> - ? ? ? mxc_register_gpio(0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH);
> - ? ? ? mxc_register_gpio(1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH);
> - ? ? ? mxc_register_gpio(2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH);
> - ? ? ? mxc_register_gpio(3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH);
> - ? ? ? mxc_register_gpio(4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH);
> - ? ? ? mxc_register_gpio(5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH);
> + ? ? ? mxc_register_gpio("imx-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH);
> + ? ? ? mxc_register_gpio("imx-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH);
> + ? ? ? mxc_register_gpio("imx-gpio", 2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH);
> + ? ? ? mxc_register_gpio("imx-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH);
> + ? ? ? mxc_register_gpio("imx-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH);
> + ? ? ? mxc_register_gpio("imx-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH);
> ?}
> diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
> index 1b7059f..1444140 100644
> --- a/arch/arm/mach-mx5/mm.c
> +++ b/arch/arm/mach-mx5/mm.c
> @@ -142,23 +142,23 @@ static struct sdma_platform_data imx53_sdma_pdata __initdata = {
>
> ?void __init imx51_soc_init(void)
> ?{
> - ? ? ? mxc_register_gpio(0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO1_LOW, MX51_MXC_INT_GPIO1_HIGH);
> - ? ? ? mxc_register_gpio(1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO2_LOW, MX51_MXC_INT_GPIO2_HIGH);
> - ? ? ? mxc_register_gpio(2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO3_LOW, MX51_MXC_INT_GPIO3_HIGH);
> - ? ? ? mxc_register_gpio(3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO4_LOW, MX51_MXC_INT_GPIO4_HIGH);
> + ? ? ? mxc_register_gpio("imx-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO1_LOW, MX51_MXC_INT_GPIO1_HIGH);
> + ? ? ? mxc_register_gpio("imx-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO2_LOW, MX51_MXC_INT_GPIO2_HIGH);
> + ? ? ? mxc_register_gpio("imx-gpio", 2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO3_LOW, MX51_MXC_INT_GPIO3_HIGH);
> + ? ? ? mxc_register_gpio("imx-gpio", 3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO4_LOW, MX51_MXC_INT_GPIO4_HIGH);
>
> ? ? ? ?imx_add_imx_sdma(MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata);
> ?}
>
> ?void __init imx53_soc_init(void)
> ?{
> - ? ? ? mxc_register_gpio(0, MX53_GPIO1_BASE_ADDR, SZ_16K, MX53_INT_GPIO1_LOW, MX53_INT_GPIO1_HIGH);
> - ? ? ? mxc_register_gpio(1, MX53_GPIO2_BASE_ADDR, SZ_16K, MX53_INT_GPIO2_LOW, MX53_INT_GPIO2_HIGH);
> - ? ? ? mxc_register_gpio(2, MX53_GPIO3_BASE_ADDR, SZ_16K, MX53_INT_GPIO3_LOW, MX53_INT_GPIO3_HIGH);
> - ? ? ? mxc_register_gpio(3, MX53_GPIO4_BASE_ADDR, SZ_16K, MX53_INT_GPIO4_LOW, MX53_INT_GPIO4_HIGH);
> - ? ? ? mxc_register_gpio(4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH);
> - ? ? ? mxc_register_gpio(5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH);
> - ? ? ? mxc_register_gpio(6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH);
> + ? ? ? mxc_register_gpio("imx-gpio", 0, MX53_GPIO1_BASE_ADDR, SZ_16K, MX53_INT_GPIO1_LOW, MX53_INT_GPIO1_HIGH);
> + ? ? ? mxc_register_gpio("imx-gpio", 1, MX53_GPIO2_BASE_ADDR, SZ_16K, MX53_INT_GPIO2_LOW, MX53_INT_GPIO2_HIGH);
> + ? ? ? mxc_register_gpio("imx-gpio", 2, MX53_GPIO3_BASE_ADDR, SZ_16K, MX53_INT_GPIO3_LOW, MX53_INT_GPIO3_HIGH);
> + ? ? ? mxc_register_gpio("imx-gpio", 3, MX53_GPIO4_BASE_ADDR, SZ_16K, MX53_INT_GPIO4_LOW, MX53_INT_GPIO4_HIGH);
> + ? ? ? mxc_register_gpio("imx-gpio", 4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH);
> + ? ? ? mxc_register_gpio("imx-gpio", 5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH);
> + ? ? ? mxc_register_gpio("imx-gpio", 6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH);
>
> ? ? ? ?imx_add_imx_sdma(MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &imx53_sdma_pdata);
> ?}
> diff --git a/arch/arm/plat-mxc/devices/platform-gpio-mxc.c b/arch/arm/plat-mxc/devices/platform-gpio-mxc.c
> index cf1b7fd..a7919a2 100644
> --- a/arch/arm/plat-mxc/devices/platform-gpio-mxc.c
> +++ b/arch/arm/plat-mxc/devices/platform-gpio-mxc.c
> @@ -8,7 +8,7 @@
> ?*/
> ?#include <mach/devices-common.h>
>
> -struct platform_device *__init mxc_register_gpio(int id,
> +struct platform_device *__init mxc_register_gpio(char *name, int id,
> ? ? ? ?resource_size_t iobase, resource_size_t iosize, int irq, int irq_high)
> ?{
> ? ? ? ?struct resource res[] = {
> @@ -28,5 +28,5 @@ struct platform_device *__init mxc_register_gpio(int id,
> ? ? ? ?};
>
> ? ? ? ?return platform_device_register_resndata(&mxc_aips_bus,
> - ? ? ? ? ? ? ? ? ? ? ? "gpio-mxc", id, res, ARRAY_SIZE(res), NULL, 0);
> + ? ? ? ? ? ? ? ? ? ? ? name, id, res, ARRAY_SIZE(res), NULL, 0);
> ?}
> diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
> index 91fa263..4e3d978 100644
> --- a/arch/arm/plat-mxc/include/mach/common.h
> +++ b/arch/arm/plat-mxc/include/mach/common.h
> @@ -64,7 +64,7 @@ extern int mx51_clocks_init(unsigned long ckil, unsigned long osc,
> ? ? ? ? ? ? ? ? ? ? ? ?unsigned long ckih1, unsigned long ckih2);
> ?extern int mx53_clocks_init(unsigned long ckil, unsigned long osc,
> ? ? ? ? ? ? ? ? ? ? ? ?unsigned long ckih1, unsigned long ckih2);
> -extern struct platform_device *mxc_register_gpio(int id,
> +extern struct platform_device *mxc_register_gpio(char *name, int id,
> ? ? ? ?resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
> ?extern int mxc_register_device(struct platform_device *pdev, void *data);
> ?extern void mxc_set_cpu_type(unsigned int type);
> diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c
> index 8241680..4875690 100644
> --- a/drivers/gpio/gpio-mxc.c
> +++ b/drivers/gpio/gpio-mxc.c
> @@ -27,9 +27,29 @@
> ?#include <linux/platform_device.h>
> ?#include <linux/slab.h>
> ?#include <linux/basic_mmio_gpio.h>
> -#include <mach/hardware.h>
> ?#include <asm-generic/bug.h>
>
> +enum mxc_gpio_hwtype {
> + ? ? ? IMX1_GPIO = 1,
> + ? ? ? IMX2_GPIO,
> + ? ? ? IMX_GPIO,
> +};
> +
> +/* device type dependent stuff */
> +struct mxc_gpio_hwdata {
> + ? ? ? unsigned dr_reg;
> + ? ? ? unsigned gdir_reg;
> + ? ? ? unsigned psr_reg;
> + ? ? ? unsigned icr1_reg;
> + ? ? ? unsigned icr2_reg;
> + ? ? ? unsigned imr_reg;
> + ? ? ? unsigned isr_reg;
> + ? ? ? unsigned low_level;
> + ? ? ? unsigned high_level;
> + ? ? ? unsigned rise_edge;
> + ? ? ? unsigned fall_edge;
> +};
> +
> ?struct mxc_gpio_port {
> ? ? ? ?struct list_head node;
> ? ? ? ?void __iomem *base;
> @@ -40,6 +60,72 @@ struct mxc_gpio_port {
> ? ? ? ?u32 both_edges;
> ?};
>
> +static struct mxc_gpio_hwdata imx1_imx2_gpio_hwdata = {
> + ? ? ? .dr_reg ? ? ? ? = 0x1c,
> + ? ? ? .gdir_reg ? ? ? = 0x00,
> + ? ? ? .psr_reg ? ? ? ?= 0x24,
> + ? ? ? .icr1_reg ? ? ? = 0x28,
> + ? ? ? .icr2_reg ? ? ? = 0x2c,
> + ? ? ? .imr_reg ? ? ? ?= 0x30,
> + ? ? ? .isr_reg ? ? ? ?= 0x34,
> + ? ? ? .low_level ? ? ?= 0x03,
> + ? ? ? .high_level ? ? = 0x02,
> + ? ? ? .rise_edge ? ? ?= 0x00,
> + ? ? ? .fall_edge ? ? ?= 0x01,
> +};
> +
> +static struct mxc_gpio_hwdata imx_gpio_hwdata = {
> + ? ? ? .dr_reg ? ? ? ? = 0x00,
> + ? ? ? .gdir_reg ? ? ? = 0x04,
> + ? ? ? .psr_reg ? ? ? ?= 0x08,
> + ? ? ? .icr1_reg ? ? ? = 0x0c,
> + ? ? ? .icr2_reg ? ? ? = 0x10,
> + ? ? ? .imr_reg ? ? ? ?= 0x14,
> + ? ? ? .isr_reg ? ? ? ?= 0x18,
> + ? ? ? .low_level ? ? ?= 0x00,
> + ? ? ? .high_level ? ? = 0x01,
> + ? ? ? .rise_edge ? ? ?= 0x02,
> + ? ? ? .fall_edge ? ? ?= 0x03,
> +};
> +
> +static enum mxc_gpio_hwtype mxc_gpio_hwtype;
> +static struct mxc_gpio_hwdata *mxc_gpio_hwdata;
> +
> +#define GPIO_DR ? ? ? ? ? ? ? ? ? ? ? ?(mxc_gpio_hwdata->dr_reg)
> +#define GPIO_GDIR ? ? ? ? ? ? ?(mxc_gpio_hwdata->gdir_reg)
> +#define GPIO_PSR ? ? ? ? ? ? ? (mxc_gpio_hwdata->psr_reg)
> +#define GPIO_ICR1 ? ? ? ? ? ? ?(mxc_gpio_hwdata->icr1_reg)
> +#define GPIO_ICR2 ? ? ? ? ? ? ?(mxc_gpio_hwdata->icr2_reg)
> +#define GPIO_IMR ? ? ? ? ? ? ? (mxc_gpio_hwdata->imr_reg)
> +#define GPIO_ISR ? ? ? ? ? ? ? (mxc_gpio_hwdata->isr_reg)
> +
> +#define GPIO_INT_LOW_LEV ? ? ? (mxc_gpio_hwdata->low_level)
> +#define GPIO_INT_HIGH_LEV ? ? ?(mxc_gpio_hwdata->high_level)
> +#define GPIO_INT_RISE_EDGE ? ? (mxc_gpio_hwdata->rise_edge)
> +#define GPIO_INT_FALL_EDGE ? ? (mxc_gpio_hwdata->fall_edge)
> +#define GPIO_INT_NONE ? ? ? ? ?0x4
> +
> +static struct platform_device_id mxc_gpio_devtype[] = {
> + ? ? ? {
> + ? ? ? ? ? ? ? .name = "imx1-gpio",
> + ? ? ? ? ? ? ? .driver_data = IMX1_GPIO,
> + ? ? ? }, {
> + ? ? ? ? ? ? ? .name = "imx21-gpio",
> + ? ? ? ? ? ? ? .driver_data = IMX2_GPIO,
> + ? ? ? }, {
> + ? ? ? ? ? ? ? .name = "imx25-gpio",
> + ? ? ? ? ? ? ? .driver_data = IMX_GPIO,
> + ? ? ? }, {
> + ? ? ? ? ? ? ? .name = "imx27-gpio",
> + ? ? ? ? ? ? ? .driver_data = IMX2_GPIO,
> + ? ? ? }, {
> + ? ? ? ? ? ? ? .name = "imx-gpio",
> + ? ? ? ? ? ? ? .driver_data = IMX_GPIO,
> + ? ? ? }, {
> + ? ? ? ? ? ? ? /* sentinel */
> + ? ? ? }
> +};
> +
> ?/*
> ?* MX2 has one interrupt *for all* gpio ports. The list is used
> ?* to save the references to all ports, so that mx2_gpio_irq_handler
> @@ -47,22 +133,6 @@ struct mxc_gpio_port {
> ?*/
> ?static LIST_HEAD(mxc_gpio_ports);
>
> -#define cpu_is_mx1_mx2() ? ? ? (cpu_is_mx1() || cpu_is_mx2())
> -
> -#define GPIO_DR ? ? ? ? ? ? ? ?(cpu_is_mx1_mx2() ? 0x1c : 0x00)
> -#define GPIO_GDIR ? ? ?(cpu_is_mx1_mx2() ? 0x00 : 0x04)
> -#define GPIO_PSR ? ? ? (cpu_is_mx1_mx2() ? 0x24 : 0x08)
> -#define GPIO_ICR1 ? ? ?(cpu_is_mx1_mx2() ? 0x28 : 0x0C)
> -#define GPIO_ICR2 ? ? ?(cpu_is_mx1_mx2() ? 0x2C : 0x10)
> -#define GPIO_IMR ? ? ? (cpu_is_mx1_mx2() ? 0x30 : 0x14)
> -#define GPIO_ISR ? ? ? (cpu_is_mx1_mx2() ? 0x34 : 0x18)
> -
> -#define GPIO_INT_LOW_LEV ? ? ? (cpu_is_mx1_mx2() ? 0x3 : 0x0)
> -#define GPIO_INT_HIGH_LEV ? ? ?(cpu_is_mx1_mx2() ? 0x2 : 0x1)
> -#define GPIO_INT_RISE_EDGE ? ? (cpu_is_mx1_mx2() ? 0x0 : 0x2)
> -#define GPIO_INT_FALL_EDGE ? ? (cpu_is_mx1_mx2() ? 0x1 : 0x3)
> -#define GPIO_INT_NONE ? ? ? ? ?0x4
> -
> ?/* Note: This driver assumes 32 GPIOs are handled in one register */
>
> ?static int gpio_set_irq_type(struct irq_data *d, u32 type)
> @@ -236,6 +306,28 @@ static void __init mxc_gpio_init_gc(struct mxc_gpio_port *port)
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? IRQ_NOREQUEST, 0);
> ?}
>
> +static void __devinit mxc_gpio_get_hw(struct platform_device *pdev)
> +{
> + ? ? ? enum mxc_gpio_hwtype hwtype = pdev->id_entry->driver_data;
> +
> + ? ? ? if (mxc_gpio_hwtype) {
> + ? ? ? ? ? ? ? /*
> + ? ? ? ? ? ? ? ?* The driver works with a reasonable presupposition,
> + ? ? ? ? ? ? ? ?* that is all gpio ports must be the same type when
> + ? ? ? ? ? ? ? ?* running on one soc.
> + ? ? ? ? ? ? ? ?*/
> + ? ? ? ? ? ? ? BUG_ON(mxc_gpio_hwtype != hwtype);
> + ? ? ? ? ? ? ? return;
> + ? ? ? }
> +
> + ? ? ? if (hwtype == IMX1_GPIO || hwtype == IMX2_GPIO)
> + ? ? ? ? ? ? ? mxc_gpio_hwdata = &imx1_imx2_gpio_hwdata;
> + ? ? ? else
> + ? ? ? ? ? ? ? mxc_gpio_hwdata = &imx_gpio_hwdata;
> +
> + ? ? ? mxc_gpio_hwtype = hwtype;
> +}
> +
> ?static int __devinit mxc_gpio_probe(struct platform_device *pdev)
> ?{
> ? ? ? ?struct mxc_gpio_port *port;
> @@ -243,6 +335,8 @@ static int __devinit mxc_gpio_probe(struct platform_device *pdev)
> ? ? ? ?static int once = 0;
> ? ? ? ?int err;
>
> + ? ? ? mxc_gpio_get_hw(pdev);
> +
> ? ? ? ?port = kzalloc(sizeof(struct mxc_gpio_port), GFP_KERNEL);
> ? ? ? ?if (!port)
> ? ? ? ? ? ? ? ?return -ENOMEM;
> @@ -276,7 +370,7 @@ static int __devinit mxc_gpio_probe(struct platform_device *pdev)
> ? ? ? ?writel(0, port->base + GPIO_IMR);
> ? ? ? ?writel(~0, port->base + GPIO_ISR);
>
> - ? ? ? if (cpu_is_mx2()) {
> + ? ? ? if (mxc_gpio_hwtype == IMX2_GPIO) {
> ? ? ? ? ? ? ? ?/* setup one handler for all GPIO interrupts */
> ? ? ? ? ? ? ? ?if (!once) {
> ? ? ? ? ? ? ? ? ? ? ? ?irq_set_chained_handler(port->irq,
> @@ -334,6 +428,7 @@ static struct platform_driver mxc_gpio_driver = {
> ? ? ? ? ? ? ? ?.owner ?= THIS_MODULE,
> ? ? ? ?},
> ? ? ? ?.probe ? ? ? ? ?= mxc_gpio_probe,
> + ? ? ? .id_table ? ? ? = mxc_gpio_devtype,
> ?};
>
> ?static int __init gpio_mxc_init(void)
> --
> 1.7.4.1
>
>
>



-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

[PATCH v2 3/3] gpio/mxc: add device tree probe support

[Grant Likely]

On Tue, Jul 5, 2011 at 9:19 AM, Shawn Guo <shawn.guo@linaro.org> wrote:
> The patch adds device tree probe support for gpio-mxc driver.
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> Cc: Grant Likely <grant.likely@secretlab.ca>

Looks right to me.

Acked-by: Grant Likely <grant.likely@secretlab.ca>

> ---
> ?.../devicetree/bindings/gpio/fsl-imx-gpio.txt ? ? ?| ? 22 ++++++++++++++++++++
> ?drivers/gpio/gpio-mxc.c ? ? ? ? ? ? ? ? ? ? ? ? ? ?| ? 18 +++++++++++++++-
> ?2 files changed, 39 insertions(+), 1 deletions(-)
> ?create mode 100644 Documentation/devicetree/bindings/gpio/fsl-imx-gpio.txt
>
> diff --git a/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.txt b/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.txt
> new file mode 100644
> index 0000000..4363ae4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.txt
> @@ -0,0 +1,22 @@
> +* Freescale i.MX/MXC GPIO controller
> +
> +Required properties:
> +- compatible : Should be "fsl,<soc>-gpio"
> +- reg : Address and length of the register set for the device
> +- interrupts : Should be the port interrupt shared by all 32 pins, if
> + ?one number. ?If two numbers, the first one is the interrupt shared
> + ?by low 16 pins and the second one is for high 16 pins.
> +- gpio-controller : Marks the device node as a gpio controller.
> +- #gpio-cells : Should be two. ?The first cell is the pin number and
> + ?the second cell is used to specify optional parameters (currently
> + ?unused).
> +
> +Example:
> +
> +gpio0: gpio at 73f84000 {
> + ? ? ? compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
> + ? ? ? reg = <0x73f84000 0x4000>;
> + ? ? ? interrupts = <50 51>;
> + ? ? ? gpio-controller;
> + ? ? ? #gpio-cells = <2>;
> +};
> diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c
> index 4875690..059d44a 100644
> --- a/drivers/gpio/gpio-mxc.c
> +++ b/drivers/gpio/gpio-mxc.c
> @@ -27,6 +27,8 @@
> ?#include <linux/platform_device.h>
> ?#include <linux/slab.h>
> ?#include <linux/basic_mmio_gpio.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> ?#include <asm-generic/bug.h>
>
> ?enum mxc_gpio_hwtype {
> @@ -126,6 +128,13 @@ static struct platform_device_id mxc_gpio_devtype[] = {
> ? ? ? ?}
> ?};
>
> +static const struct of_device_id mxc_gpio_dt_ids[] = {
> + ? ? ? { .compatible = "fsl,imx1-gpio", .data = &mxc_gpio_devtype[IMX1_GPIO], },
> + ? ? ? { .compatible = "fsl,imx21-gpio", .data = &mxc_gpio_devtype[IMX2_GPIO], },
> + ? ? ? { .compatible = "fsl,imx31-gpio", .data = &mxc_gpio_devtype[IMX_GPIO], },
> + ? ? ? { /* sentinel */ }
> +};
> +
> ?/*
> ?* MX2 has one interrupt *for all* gpio ports. The list is used
> ?* to save the references to all ports, so that mx2_gpio_irq_handler
> @@ -308,7 +317,13 @@ static void __init mxc_gpio_init_gc(struct mxc_gpio_port *port)
>
> ?static void __devinit mxc_gpio_get_hw(struct platform_device *pdev)
> ?{
> - ? ? ? enum mxc_gpio_hwtype hwtype = pdev->id_entry->driver_data;
> + ? ? ? const struct of_device_id *of_id =
> + ? ? ? ? ? ? ? ? ? ? ? of_match_device(mxc_gpio_dt_ids, &pdev->dev);
> + ? ? ? enum mxc_gpio_hwtype hwtype;
> +
> + ? ? ? if (of_id)
> + ? ? ? ? ? ? ? pdev->id_entry = of_id->data;
> + ? ? ? hwtype = pdev->id_entry->driver_data;
>
> ? ? ? ?if (mxc_gpio_hwtype) {
> ? ? ? ? ? ? ? ?/*
> @@ -426,6 +441,7 @@ static struct platform_driver mxc_gpio_driver = {
> ? ? ? ?.driver ? ? ? ? = {
> ? ? ? ? ? ? ? ?.name ? = "gpio-mxc",
> ? ? ? ? ? ? ? ?.owner ?= THIS_MODULE,
> + ? ? ? ? ? ? ? .of_match_table = mxc_gpio_dt_ids,
> ? ? ? ?},
> ? ? ? ?.probe ? ? ? ? ?= mxc_gpio_probe,
> ? ? ? ?.id_table ? ? ? = mxc_gpio_devtype,
> --
> 1.7.4.1
>
>
>



-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

[PATCH v2 1/3] gpio/mxc: get gpio range/base from gpio core

[Shawn Guo]

On Tue, Jul 05, 2011 at 11:24:13AM -0600, Grant Likely wrote:
> On Tue, Jul 5, 2011 at 10:56 AM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> > On Tue, Jul 05, 2011 at 11:19:24PM +0800, Shawn Guo wrote:
> >> Instead of assigning the gpio range based on pdev->id, the patch
> >> makes changes to get the range from gpio core that is dynamically
> >> allocated.
> >>
> >> As a result, the uses of pdev->id can be removed from the driver.
> >> This will make dt migration of the driver easier.
> >>
> >> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> >> Cc: Grant Likely <grant.likely@secretlab.ca>
> >> Cc: Sascha Hauer <s.hauer@pengutronix.de>
> >> ---
> >> ?arch/arm/plat-mxc/include/mach/gpio.h | ? 13 +++++++++----
> >> ?arch/arm/plat-mxc/include/mach/irqs.h | ? 21 +++------------------
> >> ?drivers/gpio/gpio-mxc.c ? ? ? ? ? ? ? | ? 18 ++++++++++--------
> >> ?3 files changed, 22 insertions(+), 30 deletions(-)
> >>
> >> diff --git a/arch/arm/plat-mxc/include/mach/gpio.h b/arch/arm/plat-mxc/include/mach/gpio.h
> >> index 31c820c..abdf5d7 100644
> >> --- a/arch/arm/plat-mxc/include/mach/gpio.h
> >> +++ b/arch/arm/plat-mxc/include/mach/gpio.h
> >> @@ -23,10 +23,15 @@
> >> ?#include <mach/hardware.h>
> >> ?#include <asm-generic/gpio.h>
> >>
> >> -
> >> -/* There's a off-by-one betweem the gpio bank number and the gpiochip */
> >> -/* range e.g. GPIO_1_5 is gpio 5 under linux */
> >> -#define IMX_GPIO_NR(bank, nr) ? ? ? ? ? ? ? ?(((bank) - 1) * 32 + (nr))
> >> +/*
> >> + * There's a off-by-one betweem the gpio bank number and the gpiochip
> >> + * range e.g. GPIO_1_5 is gpio 5 under linux.
> >> + *
> >> + * When gpio core allocates gpio range for a bank, it starts from the
> >> + * end of the total range. ?That is to say, bank 0 will get a higher
> >> + * gpio range than bank 1.
> >> + */
> >> +#define IMX_GPIO_NR(bank, nr) ? ? ? ?(ARCH_NR_GPIOS - (bank) * 32 + (nr))
> >
> > That is not a good idea. First of all not all boards use this macro.
> > This could be fixed, but it is a no go to allocate the gpios dynamically
> > and add a macro which makes assumptions on the range which gets
> > allocated.
> 
> Plus it makes the assumption that the imx gpio controllers will be the
> first ones registered, and that the allocation scheme will not change
> some time in the future.  You don't actually need to change this
> anyway since existing static platform_device registrations can still
> use the pdev->id value.  It is only the DT use case that should
> dynamically assign the gpio number because all uses in that case can
> use a DT gpio specifier instead of a hard coded number.
> 
Yeah, right.  Will drop all the changes in this patch but except the
following lines.

-----8<-------------
-/* these are ordered by size to support multi-SoC kernels */
-#if defined CONFIG_SOC_IMX53
-#define MXC_GPIO_IRQS          (32 * 7)
-#elif defined CONFIG_ARCH_MX2
-#define MXC_GPIO_IRQS          (32 * 6)
-#elif defined CONFIG_SOC_IMX50
-#define MXC_GPIO_IRQS          (32 * 6)
-#elif defined CONFIG_ARCH_MX1
-#define MXC_GPIO_IRQS          (32 * 4)
-#elif defined CONFIG_ARCH_MX25
-#define MXC_GPIO_IRQS          (32 * 4)
-#elif defined CONFIG_SOC_IMX51
-#define MXC_GPIO_IRQS          (32 * 4)
-#elif defined CONFIG_ARCH_MX3
-#define MXC_GPIO_IRQS          (32 * 3)
-#endif
-
 /*
  * The next 16 interrupts are for board specific purposes.  Since
  * the kernel can only run on one machine@a time, we can re-use
  * these.  If you need more, increase MXC_BOARD_IRQS, but keep it
  * within sensible limits.
  */
-#define MXC_BOARD_IRQ_START    (MXC_INTERNAL_IRQS + MXC_GPIO_IRQS)
+#define MXC_BOARD_IRQ_START    (MXC_INTERNAL_IRQS + ARCH_NR_GPIOS)
---------------------

I have to keep above changes not only because it makes code a little
bit cleaner, but also it's needed to get dt irq work, as dt code
gets gpio range from gpio core which dynamically allocates number
from ARCH_NR_GPIOS to 0.

-- 
Regards,
Shawn

[PATCH v2 0/2] Add device tree probe for imx/mxc gpio

[Sergei Shtylyov]

Hello.

On 05-07-2011 19:19, Shawn Guo wrote:

> The first patch removes the uses of cpu_is_mx(),

    There are 3 patches total. And this is the second patch...

> and the second one adds device tree probe support.

    ... and this is the third.

> Changes since v1:
>   * Address review comments given by Grant and Sascha
>   * Add patch #1 to get gpio range/base from gpio core

> Shawn Guo (3):
>        gpio/mxc: get gpio range/base from gpio core
>        gpio/mxc: get rid of the uses of cpu_is_mx()
>        gpio/mxc: add device tree probe support

WBR, Sergei