[PATCH 1/3] arm/dt: Tegra: Update SDHCI nodes to match bindings

[PATCH 1/3] arm/dt: Tegra: Update SDHCI nodes to match bindings

[Stephen Warren]

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
---
This is a repost of http://www.spinics.net/lists/linux-tegra/msg02117.html
I'm including it here since it's not in linux-next yet, and patch 3 depends
on it.

 arch/arm/boot/dts/tegra-harmony.dts  |   12 ++++++------
 arch/arm/boot/dts/tegra-seaboard.dts |    6 +++---
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts
index 4c05334..e581866 100644
--- a/arch/arm/boot/dts/tegra-harmony.dts
+++ b/arch/arm/boot/dts/tegra-harmony.dts
@@ -57,14 +57,14 @@
 	};
 
 	sdhci at c8000200 {
-		gpios = <&gpio 69 0>, /* cd, gpio PI5 */
-			<&gpio 57 0>, /* wp, gpio PH1 */
-			<&gpio 155 0>; /* power, gpio PT3 */
+		cd-gpios = <&gpio 69 0>; /* gpio PI5 */
+		wp-gpios = <&gpio 57 0>; /* gpio PH1 */
+		power-gpios = <&gpio 155 0>; /* gpio PT3 */
 	};
 
 	sdhci at c8000600 {
-		gpios = <&gpio 58 0>, /* cd, gpio PH2 */
-			<&gpio 59 0>, /* wp, gpio PH3 */
-			<&gpio 70 0>; /* power, gpio PI6 */
+		cd-gpios = <&gpio 58 0>; /* gpio PH2 */
+		wp-gpios = <&gpio 59 0>; /* gpio PH3 */
+		power-gpios = <&gpio 70 0>; /* gpio PI6 */
 	};
 };
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts
index 1940cae..64cedca 100644
--- a/arch/arm/boot/dts/tegra-seaboard.dts
+++ b/arch/arm/boot/dts/tegra-seaboard.dts
@@ -21,8 +21,8 @@
 	};
 
 	sdhci at c8000400 {
-		gpios = <&gpio 69 0>, /* cd, gpio PI5 */
-			<&gpio 57 0>, /* wp, gpio PH1 */
-			<&gpio 70 0>; /* power, gpio PI6 */
+		cd-gpios = <&gpio 69 0>; /* gpio PI5 */
+		wp-gpios = <&gpio 57 0>; /* gpio PH1 */
+		power-gpios = <&gpio 70 0>; /* gpio PI6 */
 	};
 };
-- 
1.7.0.4

[PATCH 2/3] mmc: sdhci-tegra: Add 8-bit support to device tree binding.

[Stephen Warren]

The previous patch which implemented a DT binding for sdhci-tegra did not
allow all platform data fields to be initialized from DT. The following
were missing:

is_8bit: Implemented by this patch.

pm_flags: Not implemented yet. There are no mainline users of this field.
  I'm not quite sure what it's for, and hence how to represent this
  in DT; the value ends up being assigned to host->mmc->pm_caps.

While we're at it, fix the binding documentation to refer to "SD/MMC"
instead of "eSDHC", since that's the correct name; "eSDHC" was cut/paste
from the Freescale binding docs.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
This should be able to go straight into the MMC -next branch

 .../devicetree/bindings/mmc/nvidia-sdhci.txt       |    6 ++++--
 drivers/mmc/host/sdhci-tegra.c                     |    3 +++
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt b/Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt
index c87f667..7e51154 100644
--- a/Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt
+++ b/Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt
@@ -5,13 +5,14 @@ and SDIO types of memory cards.
 
 Required properties:
 - compatible : Should be "nvidia,<chip>-sdhci"
-- reg : Should contain eSDHC registers location and length
-- interrupts : Should contain eSDHC interrupt
+- reg : Should contain SD/MMC registers location and length
+- interrupts : Should contain SD/MMC interrupt
 
 Optional properties:
 - cd-gpios : Specify GPIOs for card detection
 - wp-gpios : Specify GPIOs for write protection
 - power-gpios : Specify GPIOs for power control
+- support-8bit : Boolean, indicates if 8-bit mode should be used.
 
 Example:
 
@@ -22,4 +23,5 @@ sdhci at c8000200 {
 	cd-gpios = <&gpio 69 0>; /* gpio PI5 */
 	wp-gpios = <&gpio 57 0>; /* gpio PH1 */
 	power-gpios = <&gpio 155 0>; /* gpio PT3 */
+	support-8bit;
 };
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index 9ab18d6..67176af 100644
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -17,6 +17,7 @@
 #include <linux/platform_device.h>
 #include <linux/clk.h>
 #include <linux/io.h>
+#include <linux/of.h>
 #include <linux/of_gpio.h>
 #include <linux/gpio.h>
 #include <linux/mmc/card.h>
@@ -153,6 +154,8 @@ static struct tegra_sdhci_platform_data * __devinit sdhci_tegra_dt_parse_pdata(
 	plat->cd_gpio = of_get_named_gpio(np, "cd-gpios", 0);
 	plat->wp_gpio = of_get_named_gpio(np, "wp-gpios", 0);
 	plat->power_gpio = of_get_named_gpio(np, "power-gpios", 0);
+	if (of_find_property(np, "support-8bit", NULL))
+		plat->is_8bit = 1;
 
 	return plat;
 }
-- 
1.7.0.4

[PATCH 3/3] arm/dt: Tegra: Add support-bit to SDHCI nodes

[Stephen Warren]

For Seaboard's internal eMMC, this makes the difference between a
5.5MB/s and 10.2MB/s transfer rate. On Harmony, there wasn't any
measurable difference on my cheap/slow ~2MB/s card.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
This depends on patch 1 in this series. I assume Grant or Arnd will apply
them both to whatever branch usually takes .dts updates.

 arch/arm/boot/dts/tegra-harmony.dts  |    1 +
 arch/arm/boot/dts/tegra-seaboard.dts |    4 ++++
 2 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts
index e581866..0e225b8 100644
--- a/arch/arm/boot/dts/tegra-harmony.dts
+++ b/arch/arm/boot/dts/tegra-harmony.dts
@@ -66,5 +66,6 @@
 		cd-gpios = <&gpio 58 0>; /* gpio PH2 */
 		wp-gpios = <&gpio 59 0>; /* gpio PH3 */
 		power-gpios = <&gpio 70 0>; /* gpio PI6 */
+		support-8bit;
 	};
 };
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts
index 64cedca..a72299b 100644
--- a/arch/arm/boot/dts/tegra-seaboard.dts
+++ b/arch/arm/boot/dts/tegra-seaboard.dts
@@ -25,4 +25,8 @@
 		wp-gpios = <&gpio 57 0>; /* gpio PH1 */
 		power-gpios = <&gpio 70 0>; /* gpio PI6 */
 	};
+
+	sdhci at c8000600 {
+		support-8bit;
+	};
 };
-- 
1.7.0.4

[PATCH 1/3] arm/dt: Tegra: Update SDHCI nodes to match bindings

[Chris Ball]

Hi Stephen,

On Tue, Aug 30 2011, Stephen Warren wrote:
> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> Acked-by: Olof Johansson <olof@lixom.net>
> ---
> This is a repost of http://www.spinics.net/lists/linux-tegra/msg02117.html
> I'm including it here since it's not in linux-next yet, and patch 3 depends
> on it.

I assume I should wait for patches 1+3 to appear in -next via another tree
before I merge patch 2 -- let me know if that's incorrect.

Thanks,

- Chris.
-- 
Chris Ball   <cjb@laptop.org>   <http://printf.net/>
One Laptop Per Child

[PATCH 1/3] arm/dt: Tegra: Update SDHCI nodes to match bindings

[Stephen Warren]

Chris Ball wrote at Tuesday, August 30, 2011 1:20 PM:
> Hi Stephen,
> 
> On Tue, Aug 30 2011, Stephen Warren wrote:
> > Signed-off-by: Stephen Warren <swarren@nvidia.com>
> > Acked-by: Olof Johansson <olof@lixom.net>
> > ---
> > This is a repost of http://www.spinics.net/lists/linux-tegra/msg02117.html
> > I'm including it here since it's not in linux-next yet, and patch 3 depends
> > on it.
> 
> I assume I should wait for patches 1+3 to appear in -next via another tree
> before I merge patch 2 -- let me know if that's incorrect.

I don't think there's actually any need for that; initializing Tegra's
SDHCI from device-tree has never worked in mainline to date; it relies
on patch 1 being there. And if patch 2 was there without patch 3,
the worst that will happen is some port runs in 4-bit mode instead of
8-bit, which evidently works fine since I didn't even notice 8-bit
support was missing...

Thanks for checking though.

-- 
nvpublic

[PATCH 1/3] arm/dt: Tegra: Update SDHCI nodes to match bindings

[Chris Ball]

Hi,

On Tue, Aug 30 2011, Stephen Warren wrote:
> I don't think there's actually any need for that; initializing Tegra's
> SDHCI from device-tree has never worked in mainline to date; it relies
> on patch 1 being there. And if patch 2 was there without patch 3,
> the worst that will happen is some port runs in 4-bit mode instead of
> 8-bit, which evidently works fine since I didn't even notice 8-bit
> support was missing...

Ah, okay.  I've merged patch 2 to mmc-next for 3.2, then, and will keep
an eye on what happens with the arch patches.

Thanks,

- Chris.
-- 
Chris Ball   <cjb@laptop.org>   <http://printf.net/>
One Laptop Per Child

[PATCH 3/3] arm/dt: Tegra: Add support-bit to SDHCI nodes

[Stephen Warren]

Stephen Warren wrote at Tuesday, August 30, 2011 1:17 PM:
> For Seaboard's internal eMMC, this makes the difference between a
> 5.5MB/s and 10.2MB/s transfer rate. On Harmony, there wasn't any
> measurable difference on my cheap/slow ~2MB/s card.
> 
> Signed-off-by: Stephen Warren <swarren@nvidia.com>

Grant, when applying this patch, could you possibly fix the typo in the
patch subject; s/support-bit/support-8bit/. Thanks!

-- 
nvpublic