* [PATCH] gpio/mxc: add chained_irq_enter/exit() to mx3_gpio_irq_handler()
@ 2011-09-21 13:24 Shawn Guo
2011-09-21 16:25 ` Grant Likely
0 siblings, 1 reply; 2+ messages in thread
From: Shawn Guo @ 2011-09-21 13:24 UTC (permalink / raw)
To: linux-arm-kernel
The mx3_gpio_irq_handler() is also called on imx6q which has GIC as
the primary interrupt controller. As GIC implements the fasteoi flow
control, we need to add chained_irq_enter/exit() to
mx3_gpio_irq_handler() for signaling EOI, otherwise system will hang
whenever there is a gpio irq triggered.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
This is the second post of '[PATCH] gpio/mxc: make it work with imx6q'
to adopt the point given by Jamie.
drivers/gpio/gpio-mxc.c | 6 ++++++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c
index 4340aca..82f7b65 100644
--- a/drivers/gpio/gpio-mxc.c
+++ b/drivers/gpio/gpio-mxc.c
@@ -30,6 +30,7 @@
#include <linux/of.h>
#include <linux/of_device.h>
#include <asm-generic/bug.h>
+#include <asm/mach/irq.h>
enum mxc_gpio_hwtype {
IMX1_GPIO, /* runs on i.mx1 */
@@ -232,10 +233,15 @@ static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc)
{
u32 irq_stat;
struct mxc_gpio_port *port = irq_get_handler_data(irq);
+ struct irq_chip *chip = irq_get_chip(irq);
+
+ chained_irq_enter(chip, desc);
irq_stat = readl(port->base + GPIO_ISR) & readl(port->base + GPIO_IMR);
mxc_gpio_irq_handler(port, irq_stat);
+
+ chained_irq_exit(chip, desc);
}
/* MX2 has one interrupt *for all* gpio ports */
--
1.7.4.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [PATCH] gpio/mxc: add chained_irq_enter/exit() to mx3_gpio_irq_handler()
2011-09-21 13:24 [PATCH] gpio/mxc: add chained_irq_enter/exit() to mx3_gpio_irq_handler() Shawn Guo
@ 2011-09-21 16:25 ` Grant Likely
0 siblings, 0 replies; 2+ messages in thread
From: Grant Likely @ 2011-09-21 16:25 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Sep 21, 2011 at 09:24:04PM +0800, Shawn Guo wrote:
> The mx3_gpio_irq_handler() is also called on imx6q which has GIC as
> the primary interrupt controller. As GIC implements the fasteoi flow
> control, we need to add chained_irq_enter/exit() to
> mx3_gpio_irq_handler() for signaling EOI, otherwise system will hang
> whenever there is a gpio irq triggered.
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> ---
> This is the second post of '[PATCH] gpio/mxc: make it work with imx6q'
> to adopt the point given by Jamie.
Nit: don't forget to include the patch version in the subject line, and I like to see the revision history appear before the s-o-b lines so that it makes it into the final commit.
I'll merge this one, thanks.
g.
>
> drivers/gpio/gpio-mxc.c | 6 ++++++
> 1 files changed, 6 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c
> index 4340aca..82f7b65 100644
> --- a/drivers/gpio/gpio-mxc.c
> +++ b/drivers/gpio/gpio-mxc.c
> @@ -30,6 +30,7 @@
> #include <linux/of.h>
> #include <linux/of_device.h>
> #include <asm-generic/bug.h>
> +#include <asm/mach/irq.h>
>
> enum mxc_gpio_hwtype {
> IMX1_GPIO, /* runs on i.mx1 */
> @@ -232,10 +233,15 @@ static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc)
> {
> u32 irq_stat;
> struct mxc_gpio_port *port = irq_get_handler_data(irq);
> + struct irq_chip *chip = irq_get_chip(irq);
> +
> + chained_irq_enter(chip, desc);
>
> irq_stat = readl(port->base + GPIO_ISR) & readl(port->base + GPIO_IMR);
>
> mxc_gpio_irq_handler(port, irq_stat);
> +
> + chained_irq_exit(chip, desc);
> }
>
> /* MX2 has one interrupt *for all* gpio ports */
> --
> 1.7.4.1
>
>
^ permalink raw reply [flat|nested] 2+ messages in thread
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2011-09-21 16:25 ` Grant Likely
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