From: pawel.moll@arm.com (Pawel Moll)
To: linux-arm-kernel@lists.infradead.org
Subject: Identifying Primecells
Date: Fri, 23 Sep 2011 15:22:34 +0100 [thread overview]
Message-ID: <1316787754.4611.925.camel@hornet.cambridge.arm.com> (raw)
In-Reply-To: <CAKON4OxHwjrw-dhH2qvXopqUqmKSx2TCPgW4eVHF9dmQO4=Cvw@mail.gmail.com>
> My registers don't seem to match up with the pl011 documentation...
<...>
> INTCE W 0xFD8 Interrupt Clear Enable Register
> INTSE W 0xFDC Interrupt Set Enable Register
> INTS R 0xFE0 Interrupt Status Register
> INTE R 0xFE4 Interrupt Enable Register
... nor any other PrimeCell, actually :-)
"Compliant" PrimeCells must have the PCellID in the last 4 registers:
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0183g/I54776.html
* base + 0xff0 = 0x0d
* base + 0xff4 = 0xf0
* base + 0xff8 = 0x05
* base + 0xffc = 0xb1
Cheers!
Pawe?
next prev parent reply other threads:[~2011-09-23 14:22 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-09-22 18:19 Identifying Primecells jonsmirl at gmail.com
2011-09-23 12:46 ` Rob Herring
2011-09-23 13:11 ` jonsmirl at gmail.com
2011-09-23 13:30 ` Rob Herring
2011-09-23 13:35 ` jonsmirl at gmail.com
2011-09-23 14:10 ` Pawel Moll
2011-09-23 14:17 ` jonsmirl at gmail.com
2011-09-23 14:22 ` jonsmirl at gmail.com
2011-09-23 14:22 ` Pawel Moll [this message]
2011-09-23 19:11 ` jonsmirl at gmail.com
2011-09-24 13:27 ` Linus Walleij
2011-09-24 23:15 ` Vitaly Wool
2011-09-25 3:03 ` jonsmirl at gmail.com
2011-09-23 19:53 ` Russell King - ARM Linux
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