* [PATCH 0/5] Move mbus setup code out of drivers and into platform
@ 2011-11-12 20:00 Andrew Lunn
2011-11-12 20:00 ` [PATCH 1/5] [orion] Consolidate the address map setup on Orion based platforms Andrew Lunn
` (4 more replies)
0 siblings, 5 replies; 15+ messages in thread
From: Andrew Lunn @ 2011-11-12 20:00 UTC (permalink / raw)
To: linux-arm-kernel
The following patches move memory bus setup out of mach-* and drivers
and into the orion platform. The aim is to remove the *_mbus_dram_info
structure which is currently passed as platform_data, thus allowing
device tree to be used for these drivers. The change also allowed a
bit of consolidation of code scattered over the drivers.
Boot tested on kirkwood, compiled on dove, orion5x and mv78xx0.
Andrew Lunn (5):
[orion] Consolidate the address map setup on Orion based platforms.
[orion] Move the *_mbus_dram_info structure into the orion platform
and call it orion_mbus_dram_info everywhere.
[orion] Move address map setup out of the drivers and into platform.
[orion] Remove address map info from all platform data strucutures.
[orion] Consolidate the address map setup code.
arch/arm/mach-dove/addr-map.c | 121 ++++------
arch/arm/mach-dove/common.c | 16 +-
arch/arm/mach-dove/common.h | 1 -
arch/arm/mach-dove/pcie.c | 4 +-
arch/arm/mach-kirkwood/addr-map.c | 137 +++--------
arch/arm/mach-kirkwood/common.c | 17 +-
arch/arm/mach-kirkwood/common.h | 1 -
arch/arm/mach-kirkwood/mpp.c | 1 -
arch/arm/mach-kirkwood/pcie.c | 4 +-
arch/arm/mach-mv78xx0/addr-map.c | 102 ++------
arch/arm/mach-mv78xx0/common.c | 22 +-
arch/arm/mach-mv78xx0/common.h | 1 -
arch/arm/mach-mv78xx0/mpp.c | 1 -
arch/arm/mach-mv78xx0/pcie.c | 4 +-
arch/arm/mach-orion5x/addr-map.c | 146 ++++-------
arch/arm/mach-orion5x/common.c | 23 +--
arch/arm/mach-orion5x/common.h | 3 +-
arch/arm/mach-orion5x/include/mach/orion5x.h | 2 +-
arch/arm/mach-orion5x/mpp.c | 1 -
arch/arm/mach-orion5x/pci.c | 5 +-
arch/arm/plat-orion/Makefile | 2 +-
arch/arm/plat-orion/addr-map.c | 338 +++++++++++++++++++++++++
arch/arm/plat-orion/common.c | 43 +---
arch/arm/plat-orion/include/plat/addr-map.h | 61 +++++
arch/arm/plat-orion/include/plat/audio.h | 3 -
arch/arm/plat-orion/include/plat/common.h | 17 +-
arch/arm/plat-orion/include/plat/ehci-orion.h | 1 -
arch/arm/plat-orion/include/plat/mv_xor.h | 6 -
arch/arm/plat-orion/include/plat/mvsdio.h | 1 -
arch/arm/plat-orion/include/plat/pcie.h | 3 +-
arch/arm/plat-orion/pcie.c | 6 +-
drivers/ata/sata_mv.c | 38 +---
drivers/dma/mv_xor.c | 38 +---
drivers/dma/mv_xor.h | 5 -
drivers/mmc/host/mvsdio.c | 28 +--
drivers/mmc/host/mvsdio.h | 4 -
drivers/net/mv643xx_eth.c | 45 +---
drivers/usb/host/ehci-orion.c | 30 +--
include/linux/ata_platform.h | 3 -
sound/soc/kirkwood/kirkwood-dma.c | 30 +--
sound/soc/kirkwood/kirkwood.h | 4 -
41 files changed, 627 insertions(+), 691 deletions(-)
create mode 100644 arch/arm/plat-orion/addr-map.c
create mode 100644 arch/arm/plat-orion/include/plat/addr-map.h
--
1.7.7.1
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 1/5] [orion] Consolidate the address map setup on Orion based platforms.
2011-11-12 20:00 [PATCH 0/5] Move mbus setup code out of drivers and into platform Andrew Lunn
@ 2011-11-12 20:00 ` Andrew Lunn
2011-11-12 20:00 ` [PATCH 2/5] [orion] Move the *_mbus_dram_info structure into the orion platform and call it orion_mbus_dram_info everywhere Andrew Lunn
` (3 subsequent siblings)
4 siblings, 0 replies; 15+ messages in thread
From: Andrew Lunn @ 2011-11-12 20:00 UTC (permalink / raw)
To: linux-arm-kernel
Compile tested on Dove, orion5x, mv78xx0. Boot tested on Kirkwood.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/mach-dove/addr-map.c | 113 +++++++-----------
arch/arm/mach-kirkwood/addr-map.c | 138 ++++++---------------
arch/arm/mach-mv78xx0/addr-map.c | 102 ++++-------------
arch/arm/mach-orion5x/addr-map.c | 146 ++++++++---------------
arch/arm/mach-orion5x/common.c | 7 +-
arch/arm/mach-orion5x/common.h | 2 +-
arch/arm/mach-orion5x/include/mach/orion5x.h | 2 +-
arch/arm/plat-orion/Makefile | 2 +-
arch/arm/plat-orion/addr-map.c | 166 ++++++++++++++++++++++++++
arch/arm/plat-orion/include/plat/addr-map.h | 52 ++++++++
10 files changed, 375 insertions(+), 355 deletions(-)
create mode 100644 arch/arm/plat-orion/addr-map.c
create mode 100644 arch/arm/plat-orion/include/plat/addr-map.h
diff --git a/arch/arm/mach-dove/addr-map.c b/arch/arm/mach-dove/addr-map.c
index 00be4fc..0d8dee6 100644
--- a/arch/arm/mach-dove/addr-map.c
+++ b/arch/arm/mach-dove/addr-map.c
@@ -14,6 +14,7 @@
#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/setup.h>
+#include <plat/addr-map.h>
#include "common.h"
/*
@@ -34,14 +35,6 @@
#define ATTR_PCIE_MEM 0xe8
#define ATTR_SCRATCHPAD 0x0
-/*
- * CPU Address Decode Windows registers
- */
-#define WIN_CTRL(n) (BRIDGE_VIRT_BASE + ((n) << 4) + 0x0)
-#define WIN_BASE(n) (BRIDGE_VIRT_BASE + ((n) << 4) + 0x4)
-#define WIN_REMAP_LO(n) (BRIDGE_VIRT_BASE + ((n) << 4) + 0x8)
-#define WIN_REMAP_HI(n) (BRIDGE_VIRT_BASE + ((n) << 4) + 0xc)
-
struct mbus_dram_target_info dove_mbus_dram_info;
static inline void __iomem *ddr_map_sc(int i)
@@ -49,78 +42,62 @@ static inline void __iomem *ddr_map_sc(int i)
return (void __iomem *)(DOVE_MC_VIRT_BASE + 0x100 + ((i) << 4));
}
-static int cpu_win_can_remap(int win)
-{
- if (win < 4)
- return 1;
-
- return 0;
-}
-
-static void __init setup_cpu_win(int win, u32 base, u32 size,
- u8 target, u8 attr, int remap)
-{
- u32 ctrl;
-
- base &= 0xffff0000;
- ctrl = ((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1;
-
- writel(base, WIN_BASE(win));
- writel(ctrl, WIN_CTRL(win));
- if (cpu_win_can_remap(win)) {
- if (remap < 0)
- remap = base;
- writel(remap & 0xffff0000, WIN_REMAP_LO(win));
- writel(0, WIN_REMAP_HI(win));
- }
-}
-
-void __init dove_setup_cpu_mbus(void)
-{
- int i;
- int cs;
+/*
+ * Description of the windows needed by the platform code
+ */
+static struct orion_addr_map_cfg addr_map_cfg = {
+ .num_wins = 8,
+ .remappable_wins = 4,
+ .bridge_virt_base = BRIDGE_VIRT_BASE,
+};
+static const struct orion_addr_map_info addr_map_info[] = {
/*
- * First, disable and clear windows.
+ * Windows for PCIe IO+MEM space.
*/
- for (i = 0; i < 8; i++) {
- writel(0, WIN_BASE(i));
- writel(0, WIN_CTRL(i));
- if (cpu_win_can_remap(i)) {
- writel(0, WIN_REMAP_LO(i));
- writel(0, WIN_REMAP_HI(i));
- }
- }
-
+ { 0, DOVE_PCIE0_IO_PHYS_BASE, DOVE_PCIE0_IO_SIZE,
+ TARGET_PCIE0, ATTR_PCIE_IO, DOVE_PCIE0_IO_BUS_BASE
+ },
+ { 1, DOVE_PCIE1_IO_PHYS_BASE, DOVE_PCIE1_IO_SIZE,
+ TARGET_PCIE1, ATTR_PCIE_IO, DOVE_PCIE1_IO_BUS_BASE
+ },
+ { 2, DOVE_PCIE0_MEM_PHYS_BASE, DOVE_PCIE0_MEM_SIZE,
+ TARGET_PCIE0, ATTR_PCIE_MEM, -1
+ },
+ { 3, DOVE_PCIE1_MEM_PHYS_BASE, DOVE_PCIE1_MEM_SIZE,
+ TARGET_PCIE1, ATTR_PCIE_MEM, -1
+ },
/*
- * Setup windows for PCIe IO+MEM space.
+ * Window for CESA engine.
*/
- setup_cpu_win(0, DOVE_PCIE0_IO_PHYS_BASE, DOVE_PCIE0_IO_SIZE,
- TARGET_PCIE0, ATTR_PCIE_IO, DOVE_PCIE0_IO_BUS_BASE);
- setup_cpu_win(1, DOVE_PCIE1_IO_PHYS_BASE, DOVE_PCIE1_IO_SIZE,
- TARGET_PCIE1, ATTR_PCIE_IO, DOVE_PCIE1_IO_BUS_BASE);
- setup_cpu_win(2, DOVE_PCIE0_MEM_PHYS_BASE, DOVE_PCIE0_MEM_SIZE,
- TARGET_PCIE0, ATTR_PCIE_MEM, -1);
- setup_cpu_win(3, DOVE_PCIE1_MEM_PHYS_BASE, DOVE_PCIE1_MEM_SIZE,
- TARGET_PCIE1, ATTR_PCIE_MEM, -1);
-
+ { 4, DOVE_CESA_PHYS_BASE, DOVE_CESA_SIZE,
+ TARGET_CESA, ATTR_CESA, -1
+ },
/*
- * Setup window for CESA engine.
+ * Window to the BootROM for Standby and Sleep Resume
*/
- setup_cpu_win(4, DOVE_CESA_PHYS_BASE, DOVE_CESA_SIZE,
- TARGET_CESA, ATTR_CESA, -1);
-
+ { 5, DOVE_BOOTROM_PHYS_BASE, DOVE_BOOTROM_SIZE,
+ TARGET_BOOTROM, ATTR_BOOTROM, -1
+ },
/*
- * Setup the Window to the BootROM for Standby and Sleep Resume
+ * Window to the PMU Scratch Pad space
*/
- setup_cpu_win(5, DOVE_BOOTROM_PHYS_BASE, DOVE_BOOTROM_SIZE,
- TARGET_BOOTROM, ATTR_BOOTROM, -1);
+ { 6, DOVE_SCRATCHPAD_PHYS_BASE, DOVE_SCRATCHPAD_SIZE,
+ TARGET_SCRATCHPAD, ATTR_SCRATCHPAD, -1
+ },
+ /* End marker */
+ { -1, 0, 0, 0, 0, 0 }
+};
+
+void __init dove_setup_cpu_mbus(void)
+{
+ int i;
+ int cs;
/*
- * Setup the Window to the PMU Scratch Pad space
+ * Disable, clear and configure windows.
*/
- setup_cpu_win(6, DOVE_SCRATCHPAD_PHYS_BASE, DOVE_SCRATCHPAD_SIZE,
- TARGET_SCRATCHPAD, ATTR_SCRATCHPAD, -1);
+ orion_config_wins(&addr_map_cfg, addr_map_info);
/*
* Setup MBUS dram target info.
diff --git a/arch/arm/mach-kirkwood/addr-map.c b/arch/arm/mach-kirkwood/addr-map.c
index 8d03bce..ff8ac07 100644
--- a/arch/arm/mach-kirkwood/addr-map.c
+++ b/arch/arm/mach-kirkwood/addr-map.c
@@ -13,12 +13,12 @@
#include <linux/mbus.h>
#include <linux/io.h>
#include <mach/hardware.h>
+#include <plat/addr-map.h>
#include "common.h"
/*
* Generic Address Decode Windows bit settings
*/
-#define TARGET_DDR 0
#define TARGET_DEV_BUS 1
#define TARGET_SRAM 3
#define TARGET_PCIE 4
@@ -35,119 +35,59 @@
#define ATTR_PCIE1_MEM 0xd8
#define ATTR_SRAM 0x01
-/*
- * Helpers to get DDR bank info
- */
-#define DDR_BASE_CS_OFF(n) (0x0000 + ((n) << 3))
-#define DDR_SIZE_CS_OFF(n) (0x0004 + ((n) << 3))
+struct mbus_dram_target_info kirkwood_mbus_dram_info;
/*
- * CPU Address Decode Windows registers
+ * Description of the windows needed by the platform code
*/
-#define WIN_OFF(n) (BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4))
-#define WIN_CTRL_OFF 0x0000
-#define WIN_BASE_OFF 0x0004
-#define WIN_REMAP_LO_OFF 0x0008
-#define WIN_REMAP_HI_OFF 0x000c
-
-
-struct mbus_dram_target_info kirkwood_mbus_dram_info;
-
-static int __init cpu_win_can_remap(int win)
-{
- if (win < 4)
- return 1;
-
- return 0;
-}
-
-static void __init setup_cpu_win(int win, u32 base, u32 size,
- u8 target, u8 attr, int remap)
-{
- void __iomem *addr = (void __iomem *)WIN_OFF(win);
- u32 ctrl;
-
- base &= 0xffff0000;
- ctrl = ((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1;
-
- writel(base, addr + WIN_BASE_OFF);
- writel(ctrl, addr + WIN_CTRL_OFF);
- if (cpu_win_can_remap(win)) {
- if (remap < 0)
- remap = base;
-
- writel(remap & 0xffff0000, addr + WIN_REMAP_LO_OFF);
- writel(0, addr + WIN_REMAP_HI_OFF);
- }
-}
-
-void __init kirkwood_setup_cpu_mbus(void)
-{
- void __iomem *addr;
- int i;
- int cs;
+static struct orion_addr_map_cfg addr_map_cfg = {
+ .num_wins = 8,
+ .remappable_wins = 4,
+ .bridge_virt_base = BRIDGE_VIRT_BASE,
+};
+static const struct orion_addr_map_info addr_map_info[] = {
/*
- * First, disable and clear windows.
+ * Windows for PCIe IO+MEM space.
*/
- for (i = 0; i < 8; i++) {
- addr = (void __iomem *)WIN_OFF(i);
-
- writel(0, addr + WIN_BASE_OFF);
- writel(0, addr + WIN_CTRL_OFF);
- if (cpu_win_can_remap(i)) {
- writel(0, addr + WIN_REMAP_LO_OFF);
- writel(0, addr + WIN_REMAP_HI_OFF);
- }
- }
-
+ { 0, KIRKWOOD_PCIE_IO_PHYS_BASE, KIRKWOOD_PCIE_IO_SIZE,
+ TARGET_PCIE, ATTR_PCIE_IO, KIRKWOOD_PCIE_IO_BUS_BASE
+ },
+ { 1, KIRKWOOD_PCIE_MEM_PHYS_BASE, KIRKWOOD_PCIE_MEM_SIZE,
+ TARGET_PCIE, ATTR_PCIE_MEM, KIRKWOOD_PCIE_MEM_BUS_BASE
+ },
+ { 2, KIRKWOOD_PCIE1_IO_PHYS_BASE, KIRKWOOD_PCIE1_IO_SIZE,
+ TARGET_PCIE, ATTR_PCIE1_IO, KIRKWOOD_PCIE1_IO_BUS_BASE
+ },
+ { 3, KIRKWOOD_PCIE1_MEM_PHYS_BASE, KIRKWOOD_PCIE1_MEM_SIZE,
+ TARGET_PCIE, ATTR_PCIE1_MEM, KIRKWOOD_PCIE1_MEM_BUS_BASE
+ },
/*
- * Setup windows for PCIe IO+MEM space.
+ * Window for NAND controller.
*/
- setup_cpu_win(0, KIRKWOOD_PCIE_IO_PHYS_BASE, KIRKWOOD_PCIE_IO_SIZE,
- TARGET_PCIE, ATTR_PCIE_IO, KIRKWOOD_PCIE_IO_BUS_BASE);
- setup_cpu_win(1, KIRKWOOD_PCIE_MEM_PHYS_BASE, KIRKWOOD_PCIE_MEM_SIZE,
- TARGET_PCIE, ATTR_PCIE_MEM, KIRKWOOD_PCIE_MEM_BUS_BASE);
- setup_cpu_win(2, KIRKWOOD_PCIE1_IO_PHYS_BASE, KIRKWOOD_PCIE1_IO_SIZE,
- TARGET_PCIE, ATTR_PCIE1_IO, KIRKWOOD_PCIE1_IO_BUS_BASE);
- setup_cpu_win(3, KIRKWOOD_PCIE1_MEM_PHYS_BASE, KIRKWOOD_PCIE1_MEM_SIZE,
- TARGET_PCIE, ATTR_PCIE1_MEM, KIRKWOOD_PCIE1_MEM_BUS_BASE);
-
+ { 4, KIRKWOOD_NAND_MEM_PHYS_BASE, KIRKWOOD_NAND_MEM_SIZE,
+ TARGET_DEV_BUS, ATTR_DEV_NAND, -1
+ },
/*
- * Setup window for NAND controller.
+ * Window for SRAM.
*/
- setup_cpu_win(4, KIRKWOOD_NAND_MEM_PHYS_BASE, KIRKWOOD_NAND_MEM_SIZE,
- TARGET_DEV_BUS, ATTR_DEV_NAND, -1);
+ { 5, KIRKWOOD_SRAM_PHYS_BASE, KIRKWOOD_SRAM_SIZE,
+ TARGET_SRAM, ATTR_SRAM, -1
+ },
+ /* End marker */
+ { -1, 0, 0, 0, 0, 0 }
+};
+void __init kirkwood_setup_cpu_mbus(void)
+{
/*
- * Setup window for SRAM.
+ * Disable, clear and configure windows.
*/
- setup_cpu_win(5, KIRKWOOD_SRAM_PHYS_BASE, KIRKWOOD_SRAM_SIZE,
- TARGET_SRAM, ATTR_SRAM, -1);
+ orion_config_wins(&addr_map_cfg, addr_map_info);
/*
* Setup MBUS dram target info.
*/
- kirkwood_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
-
- addr = (void __iomem *)DDR_WINDOW_CPU_BASE;
-
- for (i = 0, cs = 0; i < 4; i++) {
- u32 base = readl(addr + DDR_BASE_CS_OFF(i));
- u32 size = readl(addr + DDR_SIZE_CS_OFF(i));
-
- /*
- * Chip select enabled?
- */
- if (size & 1) {
- struct mbus_dram_window *w;
-
- w = &kirkwood_mbus_dram_info.cs[cs++];
- w->cs_index = i;
- w->mbus_attr = 0xf & ~(1 << i);
- w->base = base & 0xffff0000;
- w->size = (size | 0x0000ffff) + 1;
- }
- }
- kirkwood_mbus_dram_info.num_cs = cs;
+ orion_setup_cpu_mbus_target(&addr_map_cfg, &kirkwood_mbus_dram_info,
+ DDR_WINDOW_CPU_BASE);
}
diff --git a/arch/arm/mach-mv78xx0/addr-map.c b/arch/arm/mach-mv78xx0/addr-map.c
index 311d5b0..e65aa82 100644
--- a/arch/arm/mach-mv78xx0/addr-map.c
+++ b/arch/arm/mach-mv78xx0/addr-map.c
@@ -12,12 +12,12 @@
#include <linux/init.h>
#include <linux/mbus.h>
#include <linux/io.h>
+#include <plat/addr-map.h>
#include "common.h"
/*
* Generic Address Decode Windows bit settings
*/
-#define TARGET_DDR 0
#define TARGET_DEV_BUS 1
#define TARGET_PCIE0 4
#define TARGET_PCIE1 8
@@ -32,21 +32,10 @@
#define ATTR_PCIE_MEM(l) (0xf8 & ~(0x10 << (l)))
/*
- * Helpers to get DDR bank info
- */
-#define DDR_BASE_CS_OFF(n) (0x0000 + ((n) << 3))
-#define DDR_SIZE_CS_OFF(n) (0x0004 + ((n) << 3))
-
-/*
* CPU Address Decode Windows registers
*/
#define WIN0_OFF(n) (BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4))
#define WIN8_OFF(n) (BRIDGE_VIRT_BASE + 0x0900 + (((n) - 8) << 4))
-#define WIN_CTRL_OFF 0x0000
-#define WIN_BASE_OFF 0x0004
-#define WIN_REMAP_LO_OFF 0x0008
-#define WIN_REMAP_HI_OFF 0x000c
-
struct mbus_dram_target_info mv78xx0_mbus_dram_info;
@@ -63,94 +52,45 @@ static void __init __iomem *win_cfg_base(int win)
return (void __iomem *)((win < 8) ? WIN0_OFF(win) : WIN8_OFF(win));
}
-static int __init cpu_win_can_remap(int win)
-{
- if (win < 8)
- return 1;
-
- return 0;
-}
-
-static void __init setup_cpu_win(int win, u32 base, u32 size,
- u8 target, u8 attr, int remap)
-{
- void __iomem *addr = win_cfg_base(win);
- u32 ctrl;
-
- base &= 0xffff0000;
- ctrl = ((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1;
-
- writel(base, addr + WIN_BASE_OFF);
- writel(ctrl, addr + WIN_CTRL_OFF);
- if (cpu_win_can_remap(win)) {
- if (remap < 0)
- remap = base;
-
- writel(remap & 0xffff0000, addr + WIN_REMAP_LO_OFF);
- writel(0, addr + WIN_REMAP_HI_OFF);
- }
-}
+/*
+ * Description of the windows needed by the platform code
+ */
+static struct orion_addr_map_cfg addr_map_cfg = {
+ .num_wins = 14,
+ .remappable_wins = 8,
+ .win_cfg_base = win_cfg_base,
+};
void __init mv78xx0_setup_cpu_mbus(void)
{
- void __iomem *addr;
- int i;
- int cs;
-
/*
- * First, disable and clear windows.
+ * Disable, clear and configure windows.
*/
- for (i = 0; i < 14; i++) {
- addr = win_cfg_base(i);
-
- writel(0, addr + WIN_BASE_OFF);
- writel(0, addr + WIN_CTRL_OFF);
- if (cpu_win_can_remap(i)) {
- writel(0, addr + WIN_REMAP_LO_OFF);
- writel(0, addr + WIN_REMAP_HI_OFF);
- }
- }
+ orion_config_wins(&addr_map_cfg, NULL);
/*
* Setup MBUS dram target info.
*/
- mv78xx0_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
-
if (mv78xx0_core_index() == 0)
- addr = (void __iomem *)DDR_WINDOW_CPU0_BASE;
+ orion_setup_cpu_mbus_target(&addr_map_cfg,
+ &mv78xx0_mbus_dram_info,
+ DDR_WINDOW_CPU0_BASE);
else
- addr = (void __iomem *)DDR_WINDOW_CPU1_BASE;
-
- for (i = 0, cs = 0; i < 4; i++) {
- u32 base = readl(addr + DDR_BASE_CS_OFF(i));
- u32 size = readl(addr + DDR_SIZE_CS_OFF(i));
-
- /*
- * Chip select enabled?
- */
- if (size & 1) {
- struct mbus_dram_window *w;
-
- w = &mv78xx0_mbus_dram_info.cs[cs++];
- w->cs_index = i;
- w->mbus_attr = 0xf & ~(1 << i);
- w->base = base & 0xffff0000;
- w->size = (size | 0x0000ffff) + 1;
- }
- }
- mv78xx0_mbus_dram_info.num_cs = cs;
+ orion_setup_cpu_mbus_target(&addr_map_cfg,
+ &mv78xx0_mbus_dram_info,
+ DDR_WINDOW_CPU1_BASE);
}
void __init mv78xx0_setup_pcie_io_win(int window, u32 base, u32 size,
int maj, int min)
{
- setup_cpu_win(window, base, size, TARGET_PCIE(maj),
- ATTR_PCIE_IO(min), -1);
+ orion_setup_cpu_win(&addr_map_cfg, window, base, size,
+ TARGET_PCIE(maj), ATTR_PCIE_IO(min), -1);
}
void __init mv78xx0_setup_pcie_mem_win(int window, u32 base, u32 size,
int maj, int min)
{
- setup_cpu_win(window, base, size, TARGET_PCIE(maj),
- ATTR_PCIE_MEM(min), -1);
+ orion_setup_cpu_win(&addr_map_cfg, window, base, size,
+ TARGET_PCIE(maj), ATTR_PCIE_MEM(min), -1);
}
diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c
index 5ceafdc..474268c 100644
--- a/arch/arm/mach-orion5x/addr-map.c
+++ b/arch/arm/mach-orion5x/addr-map.c
@@ -14,8 +14,8 @@
#include <linux/init.h>
#include <linux/mbus.h>
#include <linux/io.h>
-#include <linux/errno.h>
#include <mach/hardware.h>
+#include <plat/addr-map.h>
#include "common.h"
/*
@@ -41,7 +41,6 @@
/*
* Generic Address Decode Windows bit settings
*/
-#define TARGET_DDR 0
#define TARGET_DEV_BUS 1
#define TARGET_PCI 3
#define TARGET_PCIE 4
@@ -57,27 +56,11 @@
#define ATTR_DEV_BOOT 0xf
#define ATTR_SRAM 0x0
-/*
- * Helpers to get DDR bank info
- */
-#define ORION5X_DDR_REG(x) (ORION5X_DDR_VIRT_BASE | (x))
-#define DDR_BASE_CS(n) ORION5X_DDR_REG(0x1500 + ((n) << 3))
-#define DDR_SIZE_CS(n) ORION5X_DDR_REG(0x1504 + ((n) << 3))
-
-/*
- * CPU Address Decode Windows registers
- */
-#define ORION5X_BRIDGE_REG(x) (ORION5X_BRIDGE_VIRT_BASE | (x))
-#define CPU_WIN_CTRL(n) ORION5X_BRIDGE_REG(0x000 | ((n) << 4))
-#define CPU_WIN_BASE(n) ORION5X_BRIDGE_REG(0x004 | ((n) << 4))
-#define CPU_WIN_REMAP_LO(n) ORION5X_BRIDGE_REG(0x008 | ((n) << 4))
-#define CPU_WIN_REMAP_HI(n) ORION5X_BRIDGE_REG(0x00c | ((n) << 4))
-
-
struct mbus_dram_target_info orion5x_mbus_dram_info;
static int __initdata win_alloc_count;
-static int __init orion5x_cpu_win_can_remap(int win)
+static int __init cpu_win_can_remap(const struct orion_addr_map_cfg *cfg,
+ const int win)
{
u32 dev, rev;
@@ -91,116 +74,83 @@ static int __init orion5x_cpu_win_can_remap(int win)
return 0;
}
-static int __init setup_cpu_win(int win, u32 base, u32 size,
- u8 target, u8 attr, int remap)
-{
- if (win >= 8) {
- printk(KERN_ERR "setup_cpu_win: trying to allocate "
- "window %d\n", win);
- return -ENOSPC;
- }
-
- writel(base & 0xffff0000, CPU_WIN_BASE(win));
- writel(((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1,
- CPU_WIN_CTRL(win));
-
- if (orion5x_cpu_win_can_remap(win)) {
- if (remap < 0)
- remap = base;
-
- writel(remap & 0xffff0000, CPU_WIN_REMAP_LO(win));
- writel(0, CPU_WIN_REMAP_HI(win));
- }
- return 0;
-}
-
-void __init orion5x_setup_cpu_mbus_bridge(void)
-{
- int i;
- int cs;
+/*
+ * Description of the windows needed by the platform code
+ */
+static struct orion_addr_map_cfg addr_map_cfg = {
+ .num_wins = 8,
+ .cpu_win_can_remap = cpu_win_can_remap,
+ .bridge_virt_base = ORION5X_BRIDGE_VIRT_BASE,
+};
+static const struct orion_addr_map_info addr_map_info[] = {
/*
- * First, disable and clear windows.
+ * Setup windows for PCI+PCIe IO+MEM space.
*/
- for (i = 0; i < 8; i++) {
- writel(0, CPU_WIN_BASE(i));
- writel(0, CPU_WIN_CTRL(i));
- if (orion5x_cpu_win_can_remap(i)) {
- writel(0, CPU_WIN_REMAP_LO(i));
- writel(0, CPU_WIN_REMAP_HI(i));
- }
- }
+ { 0, ORION5X_PCIE_IO_PHYS_BASE, ORION5X_PCIE_IO_SIZE,
+ TARGET_PCIE, ATTR_PCIE_IO, ORION5X_PCIE_IO_BUS_BASE
+ },
+ { 1, ORION5X_PCI_IO_PHYS_BASE, ORION5X_PCI_IO_SIZE,
+ TARGET_PCI, ATTR_PCI_IO, ORION5X_PCI_IO_BUS_BASE
+ },
+ { 2, ORION5X_PCIE_MEM_PHYS_BASE, ORION5X_PCIE_MEM_SIZE,
+ TARGET_PCIE, ATTR_PCIE_MEM, -1
+ },
+ { 3, ORION5X_PCI_MEM_PHYS_BASE, ORION5X_PCI_MEM_SIZE,
+ TARGET_PCI, ATTR_PCI_MEM, -1
+ },
+ /* End marker */
+ { -1, 0, 0, 0, 0, 0 }
+};
+void __init orion5x_setup_cpu_mbus_bridge(void)
+{
/*
- * Setup windows for PCI+PCIe IO+MEM space.
+ * Disable, clear and configure windows.
*/
- setup_cpu_win(0, ORION5X_PCIE_IO_PHYS_BASE, ORION5X_PCIE_IO_SIZE,
- TARGET_PCIE, ATTR_PCIE_IO, ORION5X_PCIE_IO_BUS_BASE);
- setup_cpu_win(1, ORION5X_PCI_IO_PHYS_BASE, ORION5X_PCI_IO_SIZE,
- TARGET_PCI, ATTR_PCI_IO, ORION5X_PCI_IO_BUS_BASE);
- setup_cpu_win(2, ORION5X_PCIE_MEM_PHYS_BASE, ORION5X_PCIE_MEM_SIZE,
- TARGET_PCIE, ATTR_PCIE_MEM, -1);
- setup_cpu_win(3, ORION5X_PCI_MEM_PHYS_BASE, ORION5X_PCI_MEM_SIZE,
- TARGET_PCI, ATTR_PCI_MEM, -1);
+ orion_config_wins(&addr_map_cfg, addr_map_info);
win_alloc_count = 4;
/*
* Setup MBUS dram target info.
*/
- orion5x_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
-
- for (i = 0, cs = 0; i < 4; i++) {
- u32 base = readl(DDR_BASE_CS(i));
- u32 size = readl(DDR_SIZE_CS(i));
-
- /*
- * Chip select enabled?
- */
- if (size & 1) {
- struct mbus_dram_window *w;
-
- w = &orion5x_mbus_dram_info.cs[cs++];
- w->cs_index = i;
- w->mbus_attr = 0xf & ~(1 << i);
- w->base = base & 0xffff0000;
- w->size = (size | 0x0000ffff) + 1;
- }
- }
- orion5x_mbus_dram_info.num_cs = cs;
+ orion_setup_cpu_mbus_target(&addr_map_cfg, &orion5x_mbus_dram_info,
+ ORION5X_DDR_WINDOW_CPU_BASE);
}
void __init orion5x_setup_dev_boot_win(u32 base, u32 size)
{
- setup_cpu_win(win_alloc_count++, base, size,
- TARGET_DEV_BUS, ATTR_DEV_BOOT, -1);
+ orion_setup_cpu_win(&addr_map_cfg, win_alloc_count++, base, size,
+ TARGET_DEV_BUS, ATTR_DEV_BOOT, -1);
}
void __init orion5x_setup_dev0_win(u32 base, u32 size)
{
- setup_cpu_win(win_alloc_count++, base, size,
- TARGET_DEV_BUS, ATTR_DEV_CS0, -1);
+ orion_setup_cpu_win(&addr_map_cfg, win_alloc_count++, base, size,
+ TARGET_DEV_BUS, ATTR_DEV_CS0, -1);
}
void __init orion5x_setup_dev1_win(u32 base, u32 size)
{
- setup_cpu_win(win_alloc_count++, base, size,
- TARGET_DEV_BUS, ATTR_DEV_CS1, -1);
+ orion_setup_cpu_win(&addr_map_cfg, win_alloc_count++, base, size,
+ TARGET_DEV_BUS, ATTR_DEV_CS1, -1);
}
void __init orion5x_setup_dev2_win(u32 base, u32 size)
{
- setup_cpu_win(win_alloc_count++, base, size,
- TARGET_DEV_BUS, ATTR_DEV_CS2, -1);
+ orion_setup_cpu_win(&addr_map_cfg, win_alloc_count++, base, size,
+ TARGET_DEV_BUS, ATTR_DEV_CS2, -1);
}
void __init orion5x_setup_pcie_wa_win(u32 base, u32 size)
{
- setup_cpu_win(win_alloc_count++, base, size,
- TARGET_PCIE, ATTR_PCIE_WA, -1);
+ orion_setup_cpu_win(&addr_map_cfg, win_alloc_count++, base, size,
+ TARGET_PCIE, ATTR_PCIE_WA, -1);
}
-int __init orion5x_setup_sram_win(void)
+void __init orion5x_setup_sram_win(void)
{
- return setup_cpu_win(win_alloc_count++, ORION5X_SRAM_PHYS_BASE,
- ORION5X_SRAM_SIZE, TARGET_SRAM, ATTR_SRAM, -1);
+ orion_setup_cpu_win(&addr_map_cfg, win_alloc_count++,
+ ORION5X_SRAM_PHYS_BASE, ORION5X_SRAM_SIZE,
+ TARGET_SRAM, ATTR_SRAM, -1);
}
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 0ab531d..ecca1e0 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -169,12 +169,7 @@ void __init orion5x_xor_init(void)
****************************************************************************/
static void __init orion5x_crypto_init(void)
{
- int ret;
-
- ret = orion5x_setup_sram_win();
- if (ret)
- return;
-
+ orion5x_setup_sram_win();
orion_crypto_init(ORION5X_CRYPTO_PHYS_BASE, ORION5X_SRAM_PHYS_BASE,
SZ_8K, IRQ_ORION5X_CESA);
}
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index 3e5499d..6276ca1 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -27,7 +27,7 @@ void orion5x_setup_dev0_win(u32 base, u32 size);
void orion5x_setup_dev1_win(u32 base, u32 size);
void orion5x_setup_dev2_win(u32 base, u32 size);
void orion5x_setup_pcie_wa_win(u32 base, u32 size);
-int orion5x_setup_sram_win(void);
+void orion5x_setup_sram_win(void);
void orion5x_ehci0_init(void);
void orion5x_ehci1_init(void);
diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h
index 0a28bbc..2745f5d 100644
--- a/arch/arm/mach-orion5x/include/mach/orion5x.h
+++ b/arch/arm/mach-orion5x/include/mach/orion5x.h
@@ -69,7 +69,7 @@
******************************************************************************/
#define ORION5X_DDR_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x00000)
-
+#define ORION5X_DDR_WINDOW_CPU_BASE (ORION5X_DDR_VIRT_BASE | 0x1500)
#define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x10000)
#define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x10000)
#define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE | (x))
diff --git a/arch/arm/plat-orion/Makefile b/arch/arm/plat-orion/Makefile
index 95a5fc5..c20ce0f 100644
--- a/arch/arm/plat-orion/Makefile
+++ b/arch/arm/plat-orion/Makefile
@@ -2,7 +2,7 @@
# Makefile for the linux kernel.
#
-obj-y := irq.o pcie.o time.o common.o mpp.o
+obj-y := irq.o pcie.o time.o common.o mpp.o addr-map.o
obj-m :=
obj-n :=
obj- :=
diff --git a/arch/arm/plat-orion/addr-map.c b/arch/arm/plat-orion/addr-map.c
new file mode 100644
index 0000000..d3abb34
--- /dev/null
+++ b/arch/arm/plat-orion/addr-map.c
@@ -0,0 +1,166 @@
+/*
+ * arch/arm/plat-orion/addr-map.c
+ *
+ * Address map functions for Marvell Orion based SoCs
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/mbus.h>
+#include <linux/io.h>
+#include <plat/addr-map.h>
+
+/*
+ * DDR target is the same on all Orion platforms.
+ */
+#define TARGET_DDR 0
+
+/*
+ * Helpers to get DDR bank info
+ */
+#define DDR_BASE_CS_OFF(n) (0x0000 + ((n) << 3))
+#define DDR_SIZE_CS_OFF(n) (0x0004 + ((n) << 3))
+
+/*
+ * CPU Address Decode Windows registers
+ */
+#define WIN_CTRL_OFF 0x0000
+#define WIN_BASE_OFF 0x0004
+#define WIN_REMAP_LO_OFF 0x0008
+#define WIN_REMAP_HI_OFF 0x000c
+
+/*
+ * Default implementation
+ */
+static void __init __iomem *
+orion_win_cfg_base(const struct orion_addr_map_cfg *cfg, int win)
+{
+ return (void __iomem *)(cfg->bridge_virt_base + (win << 4));
+}
+
+/*
+ * Default implementation
+ */
+static int __init orion_cpu_win_can_remap(const struct orion_addr_map_cfg *cfg,
+ const int win)
+{
+ if (win < cfg->remappable_wins)
+ return 1;
+
+ return 0;
+}
+
+void __init orion_setup_cpu_win(const struct orion_addr_map_cfg *cfg,
+ const int win, const u32 base,
+ const u32 size, const u8 target,
+ const u8 attr, const int remap)
+{
+ void __iomem *addr = cfg->win_cfg_base(cfg, win);
+ u32 ctrl, base_high, remap_addr;
+
+ if (win >= cfg->num_wins) {
+ printk(KERN_ERR "setup_cpu_win: trying to allocate window "
+ "%d when only %d allowed\n", win, cfg->num_wins);
+ }
+
+ base_high = base & 0xffff0000;
+ ctrl = ((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1;
+
+ writel(base_high, addr + WIN_BASE_OFF);
+ writel(ctrl, addr + WIN_CTRL_OFF);
+ if (cfg->cpu_win_can_remap(cfg, win)) {
+ if (remap < 0)
+ remap_addr = base;
+ else
+ remap_addr = remap;
+ writel(remap_addr & 0xffff0000, addr + WIN_REMAP_LO_OFF);
+ writel(0, addr + WIN_REMAP_HI_OFF);
+ }
+}
+
+/*
+ * Configure a number of windows.
+ */
+static void __init orion_setup_cpu_wins(const struct orion_addr_map_cfg * cfg,
+ const struct orion_addr_map_info *info)
+{
+ while (info->win != -1) {
+ orion_setup_cpu_win(cfg, info->win, info->base, info->size,
+ info->target, info->attr, info->remap);
+ info++;
+ }
+}
+
+static void __init orion_disable_wins(const struct orion_addr_map_cfg * cfg)
+{
+ void __iomem *addr;
+ int i;
+
+ for (i = 0; i < cfg->num_wins; i++) {
+ addr = cfg->win_cfg_base(cfg, i);
+
+ writel(0, addr + WIN_BASE_OFF);
+ writel(0, addr + WIN_CTRL_OFF);
+ if (cfg->cpu_win_can_remap(cfg, i)) {
+ writel(0, addr + WIN_REMAP_LO_OFF);
+ writel(0, addr + WIN_REMAP_HI_OFF);
+ }
+ }
+}
+
+/*
+ * Disable, clear and configure windows.
+ */
+void __init orion_config_wins(struct orion_addr_map_cfg * cfg,
+ const struct orion_addr_map_info *info)
+{
+ if (!cfg->cpu_win_can_remap)
+ cfg->cpu_win_can_remap = orion_cpu_win_can_remap;
+
+ if (!cfg->win_cfg_base)
+ cfg->win_cfg_base = orion_win_cfg_base;
+
+ orion_disable_wins(cfg);
+
+ if (info)
+ orion_setup_cpu_wins(cfg, info);
+}
+
+/*
+ * Setup MBUS dram target info.
+ */
+void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
+ struct mbus_dram_target_info *info,
+ const u32 ddr_window_cpu_base)
+{
+ void __iomem *addr;
+ int i;
+ int cs;
+
+ info->mbus_dram_target_id = TARGET_DDR;
+
+ addr = (void __iomem *)ddr_window_cpu_base;
+
+ for (i = 0, cs = 0; i < 4; i++) {
+ u32 base = readl(addr + DDR_BASE_CS_OFF(i));
+ u32 size = readl(addr + DDR_SIZE_CS_OFF(i));
+
+ /*
+ * Chip select enabled?
+ */
+ if (size & 1) {
+ struct mbus_dram_window *w;
+
+ w = &info->cs[cs++];
+ w->cs_index = i;
+ w->mbus_attr = 0xf & ~(1 << i);
+ w->base = base & 0xffff0000;
+ w->size = (size | 0x0000ffff) + 1;
+ }
+ }
+ info->num_cs = cs;
+}
diff --git a/arch/arm/plat-orion/include/plat/addr-map.h b/arch/arm/plat-orion/include/plat/addr-map.h
new file mode 100644
index 0000000..55e40f4
--- /dev/null
+++ b/arch/arm/plat-orion/include/plat/addr-map.h
@@ -0,0 +1,52 @@
+/*
+ * arch/arm/plat-orion/include/plat/addr-map.h
+ *
+ * Marvell Orion SoC address map handling.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __PLAT_ADDR_MAP_H
+#define __PLAT_ADDR_MAP_H
+
+struct orion_addr_map_cfg {
+ const int num_wins; /* Total number of windows */
+ const int remappable_wins;
+ const u32 bridge_virt_base;
+
+ /* If NULL, the default cpu_win_can_remap will be used, using
+ the value in remappable_wins */
+ int (*cpu_win_can_remap) (const struct orion_addr_map_cfg *cfg,
+ const int win);
+ /* If NULL, the default win_cfg_base will be used, using the
+ value in bridge_virt_base */
+ void __iomem *(*win_cfg_base) (const struct orion_addr_map_cfg *cfg,
+ const int win);
+};
+
+/*
+ * Information needed to setup one address mapping.
+ */
+struct orion_addr_map_info {
+ const int win;
+ const u32 base;
+ const u32 size;
+ const u8 target;
+ const u8 attr;
+ const int remap;
+};
+
+void __init orion_config_wins(struct orion_addr_map_cfg *cfg,
+ const struct orion_addr_map_info *info);
+
+void __init orion_setup_cpu_win(const struct orion_addr_map_cfg *cfg,
+ const int win, const u32 base,
+ const u32 size, const u8 target,
+ const u8 attr, const int remap);
+
+void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
+ struct mbus_dram_target_info *info,
+ const u32 ddr_window_cpu_base);
+#endif
--
1.7.7.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 2/5] [orion] Move the *_mbus_dram_info structure into the orion platform and call it orion_mbus_dram_info everywhere.
2011-11-12 20:00 [PATCH 0/5] Move mbus setup code out of drivers and into platform Andrew Lunn
2011-11-12 20:00 ` [PATCH 1/5] [orion] Consolidate the address map setup on Orion based platforms Andrew Lunn
@ 2011-11-12 20:00 ` Andrew Lunn
2011-11-12 20:00 ` [PATCH 3/5] [orion] Move address map setup out of the drivers and into platform Andrew Lunn
` (2 subsequent siblings)
4 siblings, 0 replies; 15+ messages in thread
From: Andrew Lunn @ 2011-11-12 20:00 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/mach-dove/addr-map.c | 8 +++-----
arch/arm/mach-dove/common.c | 11 ++++++-----
arch/arm/mach-dove/common.h | 1 -
arch/arm/mach-dove/pcie.c | 3 ++-
arch/arm/mach-kirkwood/addr-map.c | 5 +----
arch/arm/mach-kirkwood/common.c | 15 ++++++++-------
arch/arm/mach-kirkwood/common.h | 1 -
arch/arm/mach-kirkwood/pcie.c | 3 ++-
arch/arm/mach-mv78xx0/addr-map.c | 4 ----
arch/arm/mach-mv78xx0/common.c | 17 +++++++++--------
arch/arm/mach-mv78xx0/common.h | 1 -
arch/arm/mach-mv78xx0/pcie.c | 3 ++-
arch/arm/mach-orion5x/addr-map.c | 4 +---
arch/arm/mach-orion5x/common.c | 11 ++++++-----
arch/arm/mach-orion5x/common.h | 1 -
arch/arm/mach-orion5x/pci.c | 5 +++--
arch/arm/plat-orion/addr-map.c | 9 +++++----
arch/arm/plat-orion/include/plat/addr-map.h | 3 ++-
18 files changed, 50 insertions(+), 55 deletions(-)
diff --git a/arch/arm/mach-dove/addr-map.c b/arch/arm/mach-dove/addr-map.c
index 0d8dee6..e1db23c 100644
--- a/arch/arm/mach-dove/addr-map.c
+++ b/arch/arm/mach-dove/addr-map.c
@@ -35,8 +35,6 @@
#define ATTR_PCIE_MEM 0xe8
#define ATTR_SCRATCHPAD 0x0
-struct mbus_dram_target_info dove_mbus_dram_info;
-
static inline void __iomem *ddr_map_sc(int i)
{
return (void __iomem *)(DOVE_MC_VIRT_BASE + 0x100 + ((i) << 4));
@@ -102,7 +100,7 @@ void __init dove_setup_cpu_mbus(void)
/*
* Setup MBUS dram target info.
*/
- dove_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
+ orion_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
for (i = 0, cs = 0; i < 2; i++) {
u32 map = readl(ddr_map_sc(i));
@@ -113,7 +111,7 @@ void __init dove_setup_cpu_mbus(void)
if (map & 1) {
struct mbus_dram_window *w;
- w = &dove_mbus_dram_info.cs[cs++];
+ w = &orion_mbus_dram_info.cs[cs++];
w->cs_index = i;
w->mbus_attr = 0; /* CS address decoding done inside */
/* the DDR controller, no need to */
@@ -122,5 +120,5 @@ void __init dove_setup_cpu_mbus(void)
w->size = 0x100000 << (((map & 0x000f0000) >> 16) - 4);
}
}
- dove_mbus_dram_info.num_cs = cs;
+ orion_mbus_dram_info.num_cs = cs;
}
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index a9e0dae..29c1881 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -30,6 +30,7 @@
#include <linux/irq.h>
#include <plat/time.h>
#include <plat/common.h>
+#include <plat/addr-map.h>
#include "common.h"
static int get_tclk(void);
@@ -71,7 +72,7 @@ void __init dove_map_io(void)
****************************************************************************/
void __init dove_ehci0_init(void)
{
- orion_ehci_init(&dove_mbus_dram_info,
+ orion_ehci_init(&orion_mbus_dram_info,
DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0);
}
@@ -80,7 +81,7 @@ void __init dove_ehci0_init(void)
****************************************************************************/
void __init dove_ehci1_init(void)
{
- orion_ehci_1_init(&dove_mbus_dram_info,
+ orion_ehci_1_init(&orion_mbus_dram_info,
DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1);
}
@@ -89,7 +90,7 @@ void __init dove_ehci1_init(void)
****************************************************************************/
void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
{
- orion_ge00_init(eth_data, &dove_mbus_dram_info,
+ orion_ge00_init(eth_data, &orion_mbus_dram_info,
DOVE_GE00_PHYS_BASE, IRQ_DOVE_GE00_SUM,
0, get_tclk());
}
@@ -107,7 +108,7 @@ void __init dove_rtc_init(void)
****************************************************************************/
void __init dove_sata_init(struct mv_sata_platform_data *sata_data)
{
- orion_sata_init(sata_data, &dove_mbus_dram_info,
+ orion_sata_init(sata_data, &orion_mbus_dram_info,
DOVE_SATA_PHYS_BASE, IRQ_DOVE_SATA);
}
@@ -198,7 +199,7 @@ struct sys_timer dove_timer = {
****************************************************************************/
void __init dove_xor0_init(void)
{
- orion_xor0_init(&dove_mbus_dram_info,
+ orion_xor0_init(&orion_mbus_dram_info,
DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE,
IRQ_DOVE_XOR_00, IRQ_DOVE_XOR_01);
}
diff --git a/arch/arm/mach-dove/common.h b/arch/arm/mach-dove/common.h
index 6a2046e..7322371 100644
--- a/arch/arm/mach-dove/common.h
+++ b/arch/arm/mach-dove/common.h
@@ -15,7 +15,6 @@ struct mv643xx_eth_platform_data;
struct mv_sata_platform_data;
extern struct sys_timer dove_timer;
-extern struct mbus_dram_target_info dove_mbus_dram_info;
/*
* Basic Dove init functions used early by machine-setup.
diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c
index aa2b3a0..42e7d22 100644
--- a/arch/arm/mach-dove/pcie.c
+++ b/arch/arm/mach-dove/pcie.c
@@ -19,6 +19,7 @@
#include <plat/pcie.h>
#include <mach/irqs.h>
#include <mach/bridge-regs.h>
+#include <plat/addr-map.h>
#include "common.h"
struct pcie_port {
@@ -50,7 +51,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
*/
orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
- orion_pcie_setup(pp->base, &dove_mbus_dram_info);
+ orion_pcie_setup(pp->base, &orion_mbus_dram_info);
/*
* IORESOURCE_IO
diff --git a/arch/arm/mach-kirkwood/addr-map.c b/arch/arm/mach-kirkwood/addr-map.c
index ff8ac07..01b0154 100644
--- a/arch/arm/mach-kirkwood/addr-map.c
+++ b/arch/arm/mach-kirkwood/addr-map.c
@@ -35,8 +35,6 @@
#define ATTR_PCIE1_MEM 0xd8
#define ATTR_SRAM 0x01
-struct mbus_dram_target_info kirkwood_mbus_dram_info;
-
/*
* Description of the windows needed by the platform code
*/
@@ -88,6 +86,5 @@ void __init kirkwood_setup_cpu_mbus(void)
/*
* Setup MBUS dram target info.
*/
- orion_setup_cpu_mbus_target(&addr_map_cfg, &kirkwood_mbus_dram_info,
- DDR_WINDOW_CPU_BASE);
+ orion_setup_cpu_mbus_target(&addr_map_cfg, DDR_WINDOW_CPU_BASE);
}
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index f3248cf..d8b4ed2 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -30,6 +30,7 @@
#include <plat/orion_nand.h>
#include <plat/common.h>
#include <plat/time.h>
+#include <plat/addr-map.h>
#include "common.h"
/*****************************************************************************
@@ -73,7 +74,7 @@ unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
void __init kirkwood_ehci_init(void)
{
kirkwood_clk_ctrl |= CGC_USB0;
- orion_ehci_init(&kirkwood_mbus_dram_info,
+ orion_ehci_init(&orion_mbus_dram_info,
USB_PHYS_BASE, IRQ_KIRKWOOD_USB);
}
@@ -85,7 +86,7 @@ void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
{
kirkwood_clk_ctrl |= CGC_GE0;
- orion_ge00_init(eth_data, &kirkwood_mbus_dram_info,
+ orion_ge00_init(eth_data, &orion_mbus_dram_info,
GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
IRQ_KIRKWOOD_GE00_ERR, kirkwood_tclk);
}
@@ -99,7 +100,7 @@ void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
kirkwood_clk_ctrl |= CGC_GE1;
- orion_ge01_init(eth_data, &kirkwood_mbus_dram_info,
+ orion_ge01_init(eth_data, &orion_mbus_dram_info,
GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
IRQ_KIRKWOOD_GE01_ERR, kirkwood_tclk);
}
@@ -178,7 +179,7 @@ void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
if (sata_data->n_ports > 1)
kirkwood_clk_ctrl |= CGC_SATA1;
- orion_sata_init(sata_data, &kirkwood_mbus_dram_info,
+ orion_sata_init(sata_data, &orion_mbus_dram_info,
SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
}
@@ -221,7 +222,7 @@ void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
mvsdio_data->clock = 100000000;
else
mvsdio_data->clock = 200000000;
- mvsdio_data->dram = &kirkwood_mbus_dram_info;
+ mvsdio_data->dram = &orion_mbus_dram_info;
kirkwood_clk_ctrl |= CGC_SDIO;
kirkwood_sdio.dev.platform_data = mvsdio_data;
platform_device_register(&kirkwood_sdio);
@@ -285,7 +286,7 @@ static void __init kirkwood_xor0_init(void)
{
kirkwood_clk_ctrl |= CGC_XOR0;
- orion_xor0_init(&kirkwood_mbus_dram_info,
+ orion_xor0_init(&orion_mbus_dram_info,
XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01);
}
@@ -364,7 +365,7 @@ static struct resource kirkwood_i2s_resources[] = {
};
static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
- .dram = &kirkwood_mbus_dram_info,
+ .dram = &orion_mbus_dram_info,
.burst = 128,
};
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index b9b0f09..4756b94 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -30,7 +30,6 @@ void kirkwood_init(void);
void kirkwood_init_early(void);
void kirkwood_init_irq(void);
-extern struct mbus_dram_target_info kirkwood_mbus_dram_info;
void kirkwood_setup_cpu_mbus(void);
void kirkwood_enable_pcie(void);
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index 74b992d..8def894 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -17,6 +17,7 @@
#include <asm/mach/pci.h>
#include <plat/pcie.h>
#include <mach/bridge-regs.h>
+#include <plat/addr-map.h>
#include "common.h"
void kirkwood_enable_pcie(void)
@@ -208,7 +209,7 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
*/
orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
- orion_pcie_setup(pp->base, &kirkwood_mbus_dram_info);
+ orion_pcie_setup(pp->base, &orion_mbus_dram_info);
return 1;
}
diff --git a/arch/arm/mach-mv78xx0/addr-map.c b/arch/arm/mach-mv78xx0/addr-map.c
index e65aa82..f317d1a 100644
--- a/arch/arm/mach-mv78xx0/addr-map.c
+++ b/arch/arm/mach-mv78xx0/addr-map.c
@@ -37,8 +37,6 @@
#define WIN0_OFF(n) (BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4))
#define WIN8_OFF(n) (BRIDGE_VIRT_BASE + 0x0900 + (((n) - 8) << 4))
-struct mbus_dram_target_info mv78xx0_mbus_dram_info;
-
static void __init __iomem *win_cfg_base(int win)
{
/*
@@ -73,11 +71,9 @@ void __init mv78xx0_setup_cpu_mbus(void)
*/
if (mv78xx0_core_index() == 0)
orion_setup_cpu_mbus_target(&addr_map_cfg,
- &mv78xx0_mbus_dram_info,
DDR_WINDOW_CPU0_BASE);
else
orion_setup_cpu_mbus_target(&addr_map_cfg,
- &mv78xx0_mbus_dram_info,
DDR_WINDOW_CPU1_BASE);
}
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 23d3980..be0c232 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -23,6 +23,7 @@
#include <plat/orion_nand.h>
#include <plat/time.h>
#include <plat/common.h>
+#include <plat/addr-map.h>
#include "common.h"
static int get_tclk(void);
@@ -169,7 +170,7 @@ void __init mv78xx0_map_io(void)
****************************************************************************/
void __init mv78xx0_ehci0_init(void)
{
- orion_ehci_init(&mv78xx0_mbus_dram_info,
+ orion_ehci_init(&orion_mbus_dram_info,
USB0_PHYS_BASE, IRQ_MV78XX0_USB_0);
}
@@ -179,7 +180,7 @@ void __init mv78xx0_ehci0_init(void)
****************************************************************************/
void __init mv78xx0_ehci1_init(void)
{
- orion_ehci_1_init(&mv78xx0_mbus_dram_info,
+ orion_ehci_1_init(&orion_mbus_dram_info,
USB1_PHYS_BASE, IRQ_MV78XX0_USB_1);
}
@@ -189,7 +190,7 @@ void __init mv78xx0_ehci1_init(void)
****************************************************************************/
void __init mv78xx0_ehci2_init(void)
{
- orion_ehci_2_init(&mv78xx0_mbus_dram_info,
+ orion_ehci_2_init(&orion_mbus_dram_info,
USB2_PHYS_BASE, IRQ_MV78XX0_USB_2);
}
@@ -199,7 +200,7 @@ void __init mv78xx0_ehci2_init(void)
****************************************************************************/
void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data)
{
- orion_ge00_init(eth_data, &mv78xx0_mbus_dram_info,
+ orion_ge00_init(eth_data, &orion_mbus_dram_info,
GE00_PHYS_BASE, IRQ_MV78XX0_GE00_SUM,
IRQ_MV78XX0_GE_ERR, get_tclk());
}
@@ -210,7 +211,7 @@ void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data)
****************************************************************************/
void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data)
{
- orion_ge01_init(eth_data, &mv78xx0_mbus_dram_info,
+ orion_ge01_init(eth_data, &orion_mbus_dram_info,
GE01_PHYS_BASE, IRQ_MV78XX0_GE01_SUM,
NO_IRQ, get_tclk());
}
@@ -234,7 +235,7 @@ void __init mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data)
eth_data->duplex = DUPLEX_FULL;
}
- orion_ge10_init(eth_data, &mv78xx0_mbus_dram_info,
+ orion_ge10_init(eth_data, &orion_mbus_dram_info,
GE10_PHYS_BASE, IRQ_MV78XX0_GE10_SUM,
NO_IRQ, get_tclk());
}
@@ -258,7 +259,7 @@ void __init mv78xx0_ge11_init(struct mv643xx_eth_platform_data *eth_data)
eth_data->duplex = DUPLEX_FULL;
}
- orion_ge11_init(eth_data, &mv78xx0_mbus_dram_info,
+ orion_ge11_init(eth_data, &orion_mbus_dram_info,
GE11_PHYS_BASE, IRQ_MV78XX0_GE11_SUM,
NO_IRQ, get_tclk());
}
@@ -277,7 +278,7 @@ void __init mv78xx0_i2c_init(void)
****************************************************************************/
void __init mv78xx0_sata_init(struct mv_sata_platform_data *sata_data)
{
- orion_sata_init(sata_data, &mv78xx0_mbus_dram_info,
+ orion_sata_init(sata_data, &orion_mbus_dram_info,
SATA_PHYS_BASE, IRQ_MV78XX0_SATA);
}
diff --git a/arch/arm/mach-mv78xx0/common.h b/arch/arm/mach-mv78xx0/common.h
index 632e63d..f2ca59c 100644
--- a/arch/arm/mach-mv78xx0/common.h
+++ b/arch/arm/mach-mv78xx0/common.h
@@ -23,7 +23,6 @@ void mv78xx0_init(void);
void mv78xx0_init_early(void);
void mv78xx0_init_irq(void);
-extern struct mbus_dram_target_info mv78xx0_mbus_dram_info;
void mv78xx0_setup_cpu_mbus(void);
void mv78xx0_setup_pcie_io_win(int window, u32 base, u32 size,
int maj, int min);
diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c
index c51af1c..9208667 100644
--- a/arch/arm/mach-mv78xx0/pcie.c
+++ b/arch/arm/mach-mv78xx0/pcie.c
@@ -15,6 +15,7 @@
#include <asm/irq.h>
#include <asm/mach/pci.h>
#include <plat/pcie.h>
+#include <plat/addr-map.h>
#include "common.h"
struct pcie_port {
@@ -153,7 +154,7 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys)
* Generic PCIe unit setup.
*/
orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
- orion_pcie_setup(pp->base, &mv78xx0_mbus_dram_info);
+ orion_pcie_setup(pp->base, &orion_mbus_dram_info);
sys->resource[0] = &pp->res[0];
sys->resource[1] = &pp->res[1];
diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c
index 474268c..a719560 100644
--- a/arch/arm/mach-orion5x/addr-map.c
+++ b/arch/arm/mach-orion5x/addr-map.c
@@ -56,7 +56,6 @@
#define ATTR_DEV_BOOT 0xf
#define ATTR_SRAM 0x0
-struct mbus_dram_target_info orion5x_mbus_dram_info;
static int __initdata win_alloc_count;
static int __init cpu_win_can_remap(const struct orion_addr_map_cfg *cfg,
@@ -114,8 +113,7 @@ void __init orion5x_setup_cpu_mbus_bridge(void)
/*
* Setup MBUS dram target info.
*/
- orion_setup_cpu_mbus_target(&addr_map_cfg, &orion5x_mbus_dram_info,
- ORION5X_DDR_WINDOW_CPU_BASE);
+ orion_setup_cpu_mbus_target(&addr_map_cfg, ORION5X_DDR_WINDOW_CPU_BASE);
}
void __init orion5x_setup_dev_boot_win(u32 base, u32 size)
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index ecca1e0..27addd5 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -31,6 +31,7 @@
#include <plat/orion_nand.h>
#include <plat/time.h>
#include <plat/common.h>
+#include <plat/addr-map.h>
#include "common.h"
/*****************************************************************************
@@ -71,7 +72,7 @@ void __init orion5x_map_io(void)
****************************************************************************/
void __init orion5x_ehci0_init(void)
{
- orion_ehci_init(&orion5x_mbus_dram_info,
+ orion_ehci_init(&orion_mbus_dram_info,
ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL);
}
@@ -81,7 +82,7 @@ void __init orion5x_ehci0_init(void)
****************************************************************************/
void __init orion5x_ehci1_init(void)
{
- orion_ehci_1_init(&orion5x_mbus_dram_info,
+ orion_ehci_1_init(&orion_mbus_dram_info,
ORION5X_USB1_PHYS_BASE, IRQ_ORION5X_USB1_CTRL);
}
@@ -91,7 +92,7 @@ void __init orion5x_ehci1_init(void)
****************************************************************************/
void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
{
- orion_ge00_init(eth_data, &orion5x_mbus_dram_info,
+ orion_ge00_init(eth_data, &orion_mbus_dram_info,
ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM,
IRQ_ORION5X_ETH_ERR, orion5x_tclk);
}
@@ -121,7 +122,7 @@ void __init orion5x_i2c_init(void)
****************************************************************************/
void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
{
- orion_sata_init(sata_data, &orion5x_mbus_dram_info,
+ orion_sata_init(sata_data, &orion_mbus_dram_info,
ORION5X_SATA_PHYS_BASE, IRQ_ORION5X_SATA);
}
@@ -158,7 +159,7 @@ void __init orion5x_uart1_init(void)
****************************************************************************/
void __init orion5x_xor_init(void)
{
- orion_xor0_init(&orion5x_mbus_dram_info,
+ orion_xor0_init(&orion_mbus_dram_info,
ORION5X_XOR_PHYS_BASE,
ORION5X_XOR_PHYS_BASE + 0x200,
IRQ_ORION5X_XOR0, IRQ_ORION5X_XOR1);
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index 6276ca1..44a65af 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -20,7 +20,6 @@ extern struct sys_timer orion5x_timer;
* functions to map its interfaces and by the machine-setup to map its on-
* board devices. Details in /mach-orion/addr-map.c
*/
-extern struct mbus_dram_target_info orion5x_mbus_dram_info;
void orion5x_setup_cpu_mbus_bridge(void);
void orion5x_setup_dev_boot_win(u32 base, u32 size);
void orion5x_setup_dev0_win(u32 base, u32 size);
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index bc4a920..ddfa01a 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -18,6 +18,7 @@
#include <asm/irq.h>
#include <asm/mach/pci.h>
#include <plat/pcie.h>
+#include <plat/addr-map.h>
#include "common.h"
/*****************************************************************************
@@ -145,7 +146,7 @@ static int __init pcie_setup(struct pci_sys_data *sys)
/*
* Generic PCIe unit setup.
*/
- orion_pcie_setup(PCIE_BASE, &orion5x_mbus_dram_info);
+ orion_pcie_setup(PCIE_BASE, &orion_mbus_dram_info);
/*
* Check whether to apply Orion-1/Orion-NAS PCIe config
@@ -477,7 +478,7 @@ static int __init pci_setup(struct pci_sys_data *sys)
/*
* Point PCI unit MBUS decode windows to DRAM space.
*/
- orion5x_setup_pci_wins(&orion5x_mbus_dram_info);
+ orion5x_setup_pci_wins(&orion_mbus_dram_info);
/*
* Master + Slave enable
diff --git a/arch/arm/plat-orion/addr-map.c b/arch/arm/plat-orion/addr-map.c
index d3abb34..c27ad88 100644
--- a/arch/arm/plat-orion/addr-map.c
+++ b/arch/arm/plat-orion/addr-map.c
@@ -14,6 +14,8 @@
#include <linux/io.h>
#include <plat/addr-map.h>
+struct mbus_dram_target_info orion_mbus_dram_info;
+
/*
* DDR target is the same on all Orion platforms.
*/
@@ -134,14 +136,13 @@ void __init orion_config_wins(struct orion_addr_map_cfg * cfg,
* Setup MBUS dram target info.
*/
void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
- struct mbus_dram_target_info *info,
const u32 ddr_window_cpu_base)
{
void __iomem *addr;
int i;
int cs;
- info->mbus_dram_target_id = TARGET_DDR;
+ orion_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
addr = (void __iomem *)ddr_window_cpu_base;
@@ -155,12 +156,12 @@ void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
if (size & 1) {
struct mbus_dram_window *w;
- w = &info->cs[cs++];
+ w = &orion_mbus_dram_info.cs[cs++];
w->cs_index = i;
w->mbus_attr = 0xf & ~(1 << i);
w->base = base & 0xffff0000;
w->size = (size | 0x0000ffff) + 1;
}
}
- info->num_cs = cs;
+ orion_mbus_dram_info.num_cs = cs;
}
diff --git a/arch/arm/plat-orion/include/plat/addr-map.h b/arch/arm/plat-orion/include/plat/addr-map.h
index 55e40f4..fd556f7 100644
--- a/arch/arm/plat-orion/include/plat/addr-map.h
+++ b/arch/arm/plat-orion/include/plat/addr-map.h
@@ -11,6 +11,8 @@
#ifndef __PLAT_ADDR_MAP_H
#define __PLAT_ADDR_MAP_H
+extern struct mbus_dram_target_info orion_mbus_dram_info;
+
struct orion_addr_map_cfg {
const int num_wins; /* Total number of windows */
const int remappable_wins;
@@ -47,6 +49,5 @@ void __init orion_setup_cpu_win(const struct orion_addr_map_cfg *cfg,
const u8 attr, const int remap);
void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
- struct mbus_dram_target_info *info,
const u32 ddr_window_cpu_base);
#endif
--
1.7.7.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 3/5] [orion] Move address map setup out of the drivers and into platform.
2011-11-12 20:00 [PATCH 0/5] Move mbus setup code out of drivers and into platform Andrew Lunn
2011-11-12 20:00 ` [PATCH 1/5] [orion] Consolidate the address map setup on Orion based platforms Andrew Lunn
2011-11-12 20:00 ` [PATCH 2/5] [orion] Move the *_mbus_dram_info structure into the orion platform and call it orion_mbus_dram_info everywhere Andrew Lunn
@ 2011-11-12 20:00 ` Andrew Lunn
2011-11-13 20:53 ` Michael Walle
2011-11-15 0:06 ` Nicolas Pitre
2011-11-12 20:00 ` [PATCH 4/5] [orion] Remove address map info from all platform data strucutures Andrew Lunn
2011-11-12 20:00 ` [PATCH 5/5] [orion] Consolidate the address map setup code Andrew Lunn
4 siblings, 2 replies; 15+ messages in thread
From: Andrew Lunn @ 2011-11-12 20:00 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/mach-dove/pcie.c | 3 +-
arch/arm/mach-kirkwood/mpp.c | 1 -
arch/arm/mach-kirkwood/pcie.c | 3 +-
arch/arm/mach-mv78xx0/mpp.c | 1 -
arch/arm/mach-mv78xx0/pcie.c | 3 +-
arch/arm/mach-orion5x/mpp.c | 1 -
arch/arm/mach-orion5x/pci.c | 2 +-
arch/arm/plat-orion/addr-map.c | 182 +++++++++++++++++++++++++++
arch/arm/plat-orion/include/plat/addr-map.h | 8 ++
arch/arm/plat-orion/include/plat/pcie.h | 3 +-
arch/arm/plat-orion/pcie.c | 6 +-
drivers/ata/sata_mv.c | 36 +-----
drivers/dma/mv_xor.c | 37 +-----
drivers/dma/mv_xor.h | 5 -
drivers/mmc/host/mvsdio.c | 28 +----
drivers/mmc/host/mvsdio.h | 4 -
drivers/net/mv643xx_eth.c | 45 +------
drivers/usb/host/ehci-orion.c | 30 +----
sound/soc/kirkwood/kirkwood-dma.c | 30 +----
sound/soc/kirkwood/kirkwood.h | 4 -
20 files changed, 218 insertions(+), 214 deletions(-)
diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c
index 42e7d22..6c11a4d 100644
--- a/arch/arm/mach-dove/pcie.c
+++ b/arch/arm/mach-dove/pcie.c
@@ -10,7 +10,6 @@
#include <linux/kernel.h>
#include <linux/pci.h>
-#include <linux/mbus.h>
#include <video/vga.h>
#include <asm/mach/pci.h>
#include <asm/mach/arch.h>
@@ -51,7 +50,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
*/
orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
- orion_pcie_setup(pp->base, &orion_mbus_dram_info);
+ orion_pcie_setup(pp->base);
/*
* IORESOURCE_IO
diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c
index b0a7d97..43a495f 100644
--- a/arch/arm/mach-kirkwood/mpp.c
+++ b/arch/arm/mach-kirkwood/mpp.c
@@ -10,7 +10,6 @@
#include <linux/kernel.h>
#include <linux/init.h>
-#include <linux/mbus.h>
#include <linux/io.h>
#include <asm/gpio.h>
#include <mach/hardware.h>
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index 8def894..fb451bf 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -11,7 +11,6 @@
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/slab.h>
-#include <linux/mbus.h>
#include <video/vga.h>
#include <asm/irq.h>
#include <asm/mach/pci.h>
@@ -209,7 +208,7 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
*/
orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
- orion_pcie_setup(pp->base, &orion_mbus_dram_info);
+ orion_pcie_setup(pp->base);
return 1;
}
diff --git a/arch/arm/mach-mv78xx0/mpp.c b/arch/arm/mach-mv78xx0/mpp.c
index 59b7686..34cb967 100644
--- a/arch/arm/mach-mv78xx0/mpp.c
+++ b/arch/arm/mach-mv78xx0/mpp.c
@@ -10,7 +10,6 @@
#include <linux/kernel.h>
#include <linux/init.h>
-#include <linux/mbus.h>
#include <linux/io.h>
#include <plat/mpp.h>
#include <asm/gpio.h>
diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c
index 9208667..12fcb10 100644
--- a/arch/arm/mach-mv78xx0/pcie.c
+++ b/arch/arm/mach-mv78xx0/pcie.c
@@ -10,7 +10,6 @@
#include <linux/kernel.h>
#include <linux/pci.h>
-#include <linux/mbus.h>
#include <video/vga.h>
#include <asm/irq.h>
#include <asm/mach/pci.h>
@@ -154,7 +153,7 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys)
* Generic PCIe unit setup.
*/
orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
- orion_pcie_setup(pp->base, &orion_mbus_dram_info);
+ orion_pcie_setup(pp->base);
sys->resource[0] = &pp->res[0];
sys->resource[1] = &pp->res[1];
diff --git a/arch/arm/mach-orion5x/mpp.c b/arch/arm/mach-orion5x/mpp.c
index b6ddd7a..5b70026 100644
--- a/arch/arm/mach-orion5x/mpp.c
+++ b/arch/arm/mach-orion5x/mpp.c
@@ -10,7 +10,6 @@
#include <linux/kernel.h>
#include <linux/init.h>
-#include <linux/mbus.h>
#include <linux/io.h>
#include <mach/hardware.h>
#include <plat/mpp.h>
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index ddfa01a..a494c47 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -146,7 +146,7 @@ static int __init pcie_setup(struct pci_sys_data *sys)
/*
* Generic PCIe unit setup.
*/
- orion_pcie_setup(PCIE_BASE, &orion_mbus_dram_info);
+ orion_pcie_setup(PCIE_BASE);
/*
* Check whether to apply Orion-1/Orion-NAS PCIe config
diff --git a/arch/arm/plat-orion/addr-map.c b/arch/arm/plat-orion/addr-map.c
index c27ad88..cfb9ee3 100644
--- a/arch/arm/plat-orion/addr-map.c
+++ b/arch/arm/plat-orion/addr-map.c
@@ -9,10 +9,12 @@
*/
#include <linux/kernel.h>
+#include <linux/module.h>
#include <linux/init.h>
#include <linux/mbus.h>
#include <linux/io.h>
#include <plat/addr-map.h>
+#include <plat/ehci-orion.h>
struct mbus_dram_target_info orion_mbus_dram_info;
@@ -165,3 +167,183 @@ void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
}
orion_mbus_dram_info.num_cs = cs;
}
+
+#define XOR_WINDOW_BASE(w) (0x250 + ((w) << 2))
+#define XOR_WINDOW_SIZE(w) (0x270 + ((w) << 2))
+#define XOR_WINDOW_REMAP_HIGH(w) (0x290 + ((w) << 2))
+#define XOR_WINDOW_BAR_ENABLE(chan) (0x240 + ((chan) << 2))
+
+void
+mv_xor_conf_mbus_windows(void __iomem *base)
+{
+ u32 win_enable = 0;
+ struct mbus_dram_window *cs;
+ int i;
+
+ for (i = 0; i < 8; i++) {
+ writel(0, base + XOR_WINDOW_BASE(i));
+ writel(0, base + XOR_WINDOW_SIZE(i));
+ if (i < 4)
+ writel(0, base + XOR_WINDOW_REMAP_HIGH(i));
+ }
+
+ for (i = 0; i < orion_mbus_dram_info.num_cs; i++) {
+ cs = orion_mbus_dram_info.cs + i;
+
+ writel((cs->base & 0xffff0000) |
+ (cs->mbus_attr << 8) |
+ orion_mbus_dram_info.mbus_dram_target_id,
+ base + XOR_WINDOW_BASE(i));
+ writel((cs->size - 1) & 0xffff0000, base + XOR_WINDOW_SIZE(i));
+
+ win_enable |= (1 << i);
+ win_enable |= 3 << (16 + (2 * i));
+ }
+
+ writel(win_enable, base + XOR_WINDOW_BAR_ENABLE(0));
+ writel(win_enable, base + XOR_WINDOW_BAR_ENABLE(1));
+}
+
+#define USB_WINDOW_CTRL(i) (0x320 + ((i) << 4))
+#define USB_WINDOW_BASE(i) (0x324 + ((i) << 4))
+#define rdl(off) __raw_readl(base + (off))
+#define wrl(off, val) __raw_writel((val), base + (off))
+
+void __init
+ehci_orion_conf_mbus_windows(void __iomem *base)
+{
+ int i;
+ struct mbus_dram_window *cs;
+
+ for (i = 0; i < 4; i++) {
+ wrl(USB_WINDOW_CTRL(i), 0);
+ wrl(USB_WINDOW_BASE(i), 0);
+ }
+
+ for (i = 0; i < orion_mbus_dram_info.num_cs; i++) {
+ cs = orion_mbus_dram_info.cs + i;
+
+ wrl(USB_WINDOW_CTRL(i),
+ ((cs->size - 1) & 0xffff0000) |
+ (cs->mbus_attr << 8) |
+ (orion_mbus_dram_info.mbus_dram_target_id << 4) | 1);
+ wrl(USB_WINDOW_BASE(i), cs->base);
+ }
+}
+
+#define SATA_WINDOW_CTRL(i) (0x20030 + ((i) << 4))
+#define SATA_WINDOW_BASE(i) (0x20034 + ((i) << 4))
+
+
+void mv_sata_conf_mbus_windows(void __iomem *base)
+{
+ int i;
+ struct mbus_dram_window *cs;
+
+ for (i = 0; i < 4; i++) {
+ writel(0, base + SATA_WINDOW_CTRL(i));
+ writel(0, base + SATA_WINDOW_BASE(i));
+ }
+
+ for (i = 0; i < orion_mbus_dram_info.num_cs; i++) {
+ cs = orion_mbus_dram_info.cs + i;
+
+ writel(((cs->size - 1) & 0xffff0000) |
+ (cs->mbus_attr << 8) |
+ (orion_mbus_dram_info.mbus_dram_target_id << 4) | 1,
+ base + SATA_WINDOW_CTRL(i));
+ writel(cs->base, base + SATA_WINDOW_BASE(i));
+ }
+}
+
+
+#define ETH_WINDOW_BASE(w) (0x0200 + ((w) << 3))
+#define ETH_WINDOW_SIZE(w) (0x0204 + ((w) << 3))
+#define ETH_WINDOW_REMAP_HIGH(w) (0x0280 + ((w) << 2))
+#define ETH_WINDOW_BAR_ENABLE 0x0290
+
+u32
+mv643xx_eth_conf_mbus_windows(void __iomem *base)
+{
+ u32 win_enable;
+ u32 win_protect;
+ int i;
+ struct mbus_dram_window *cs;
+
+ for (i = 0; i < 6; i++) {
+ writel(0, base + ETH_WINDOW_BASE(i));
+ writel(0, base + ETH_WINDOW_SIZE(i));
+ if (i < 4)
+ writel(0, base + ETH_WINDOW_REMAP_HIGH(i));
+ }
+
+ win_enable = 0x3f;
+ win_protect = 0;
+
+ for (i = 0; i < orion_mbus_dram_info.num_cs; i++) {
+ cs = orion_mbus_dram_info.cs + i;
+ writel((cs->base & 0xffff0000) |
+ (cs->mbus_attr << 8) |
+ orion_mbus_dram_info.mbus_dram_target_id,
+ base + ETH_WINDOW_BASE(i));
+ writel((cs->size - 1) & 0xffff0000, base + ETH_WINDOW_SIZE(i));
+
+ win_enable &= ~(1 << i);
+ win_protect |= 3 << (2 * i);
+ }
+
+ writel(win_enable, base + ETH_WINDOW_BAR_ENABLE);
+ return win_protect;
+}
+
+#define MVSD_WINDOW_CTRL(i) (0x108 + ((i) << 3))
+#define MVSD_WINDOW_BASE(i) (0x10c + ((i) << 3))
+
+void mvsd_conf_mbus_windows(void __iomem *base)
+{
+ int i;
+ struct mbus_dram_window *cs;
+
+ for (i = 0; i < 4; i++) {
+ writel(0, base + MVSD_WINDOW_CTRL(i));
+ writel(0, base + MVSD_WINDOW_BASE(i));
+ }
+
+ for (i = 0; i < orion_mbus_dram_info.num_cs; i++) {
+ cs = orion_mbus_dram_info.cs + i;
+ writel(((cs->size - 1) & 0xffff0000) |
+ (cs->mbus_attr << 8) |
+ (orion_mbus_dram_info.mbus_dram_target_id << 4) | 1,
+ base + MVSD_WINDOW_CTRL(i));
+ writel(cs->base, base + MVSD_WINDOW_BASE(i));
+ }
+}
+
+#define KIRKWOOD_AUDIO_WIN_BASE_REG(win) (0xA00 + ((win)<<3))
+#define KIRKWOOD_AUDIO_WIN_CTRL_REG(win) (0xA04 + ((win)<<3))
+
+void kirkwood_dma_conf_mbus_windows(void __iomem *base, int win,
+ unsigned long dma)
+{
+ int i;
+ struct mbus_dram_window *cs;
+
+ /* First disable and clear windows */
+ writel(0, base + KIRKWOOD_AUDIO_WIN_CTRL_REG(win));
+ writel(0, base + KIRKWOOD_AUDIO_WIN_BASE_REG(win));
+
+ /* try to find matching cs for current dma address */
+ for (i = 0; i < orion_mbus_dram_info.num_cs; i++) {
+ cs = orion_mbus_dram_info.cs + i;
+ if ((cs->base & 0xffff0000) < (dma & 0xffff0000)) {
+ writel(cs->base & 0xffff0000,
+ base + KIRKWOOD_AUDIO_WIN_BASE_REG(win));
+ writel(((cs->size - 1) & 0xffff0000) |
+ (cs->mbus_attr << 8) |
+ (orion_mbus_dram_info.mbus_dram_target_id << 4)
+ | 1,
+ base + KIRKWOOD_AUDIO_WIN_CTRL_REG(win));
+ }
+ }
+}
+EXPORT_SYMBOL_GPL(kirkwood_dma_conf_mbus_windows);
diff --git a/arch/arm/plat-orion/include/plat/addr-map.h b/arch/arm/plat-orion/include/plat/addr-map.h
index fd556f7..4be2cac 100644
--- a/arch/arm/plat-orion/include/plat/addr-map.h
+++ b/arch/arm/plat-orion/include/plat/addr-map.h
@@ -50,4 +50,12 @@ void __init orion_setup_cpu_win(const struct orion_addr_map_cfg *cfg,
void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
const u32 ddr_window_cpu_base);
+
+void mv_xor_conf_mbus_windows(void __iomem *base);
+void ehci_orion_conf_mbus_windows(void __iomem *base);
+void mv_sata_conf_mbus_windows(void __iomem *base);
+u32 mv643xx_eth_conf_mbus_windows(void __iomem *base);
+void mv_sd_conf_mbus_windows(void __iomem *base);
+void kirkwood_dma_conf_mbus_windows(void __iomem *base, int win,
+ unsigned long dma);
#endif
diff --git a/arch/arm/plat-orion/include/plat/pcie.h b/arch/arm/plat-orion/include/plat/pcie.h
index cc99163..fe5b9e8 100644
--- a/arch/arm/plat-orion/include/plat/pcie.h
+++ b/arch/arm/plat-orion/include/plat/pcie.h
@@ -20,8 +20,7 @@ int orion_pcie_x4_mode(void __iomem *base);
int orion_pcie_get_local_bus_nr(void __iomem *base);
void orion_pcie_set_local_bus_nr(void __iomem *base, int nr);
void orion_pcie_reset(void __iomem *base);
-void orion_pcie_setup(void __iomem *base,
- struct mbus_dram_target_info *dram);
+void orion_pcie_setup(void __iomem *base);
int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus,
u32 devfn, int where, int size, u32 *val);
int orion_pcie_rd_conf_tlp(void __iomem *base, struct pci_bus *bus,
diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c
index af2d733..86dbb5b 100644
--- a/arch/arm/plat-orion/pcie.c
+++ b/arch/arm/plat-orion/pcie.c
@@ -13,6 +13,7 @@
#include <linux/mbus.h>
#include <asm/mach/pci.h>
#include <plat/pcie.h>
+#include <plat/addr-map.h>
#include <linux/delay.h>
/*
@@ -175,8 +176,7 @@ static void __init orion_pcie_setup_wins(void __iomem *base,
writel(((size - 1) & 0xffff0000) | 1, base + PCIE_BAR_CTRL_OFF(1));
}
-void __init orion_pcie_setup(void __iomem *base,
- struct mbus_dram_target_info *dram)
+void __init orion_pcie_setup(void __iomem *base)
{
u16 cmd;
u32 mask;
@@ -184,7 +184,7 @@ void __init orion_pcie_setup(void __iomem *base,
/*
* Point PCIe unit MBUS decode windows to DRAM space.
*/
- orion_pcie_setup_wins(base, dram);
+ orion_pcie_setup_wins(base, &orion_mbus_dram_info);
/*
* Master + slave enable.
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 4b6b209..43c6d2a 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -62,13 +62,13 @@
#include <linux/clk.h>
#include <linux/platform_device.h>
#include <linux/ata_platform.h>
-#include <linux/mbus.h>
#include <linux/bitops.h>
#include <linux/gfp.h>
#include <scsi/scsi_host.h>
#include <scsi/scsi_cmnd.h>
#include <scsi/scsi_device.h>
#include <linux/libata.h>
+#include <plat/addr-map.h>
#define DRV_NAME "sata_mv"
#define DRV_VERSION "1.28"
@@ -444,9 +444,6 @@ enum {
#define IS_PCIE(hpriv) ((hpriv)->hp_flags & MV_HP_PCIE)
#define IS_SOC(hpriv) ((hpriv)->hp_flags & MV_HP_FLAG_SOC)
-#define WINDOW_CTRL(i) (0x20030 + ((i) << 4))
-#define WINDOW_BASE(i) (0x20034 + ((i) << 4))
-
enum {
/* DMA boundary 0xffff is required by the s/g splitting
* we need on /length/ in mv_fill-sg().
@@ -3987,27 +3984,6 @@ static int mv_create_dma_pools(struct mv_host_priv *hpriv, struct device *dev)
return 0;
}
-static void mv_conf_mbus_windows(struct mv_host_priv *hpriv,
- struct mbus_dram_target_info *dram)
-{
- int i;
-
- for (i = 0; i < 4; i++) {
- writel(0, hpriv->base + WINDOW_CTRL(i));
- writel(0, hpriv->base + WINDOW_BASE(i));
- }
-
- for (i = 0; i < dram->num_cs; i++) {
- struct mbus_dram_window *cs = dram->cs + i;
-
- writel(((cs->size - 1) & 0xffff0000) |
- (cs->mbus_attr << 8) |
- (dram->mbus_dram_target_id << 4) | 1,
- hpriv->base + WINDOW_CTRL(i));
- writel(cs->base, hpriv->base + WINDOW_BASE(i));
- }
-}
-
/**
* mv_platform_probe - handle a positive probe of an soc Marvell
* host
@@ -4070,10 +4046,9 @@ static int mv_platform_probe(struct platform_device *pdev)
#endif
/*
- * (Re-)program MBUS remapping windows if we are asked to.
+ * (Re-)program MBUS remapping windows.
*/
- if (mv_platform_data->dram != NULL)
- mv_conf_mbus_windows(hpriv, mv_platform_data->dram);
+ mv_sata_conf_mbus_windows(hpriv->base);
rc = mv_create_dma_pools(hpriv, &pdev->dev);
if (rc)
@@ -4146,10 +4121,9 @@ static int mv_platform_resume(struct platform_device *pdev)
const struct mv_sata_platform_data *mv_platform_data = \
pdev->dev.platform_data;
/*
- * (Re-)program MBUS remapping windows if we are asked to.
+ * (Re-)program MBUS remapping windows.
*/
- if (mv_platform_data->dram != NULL)
- mv_conf_mbus_windows(hpriv, mv_platform_data->dram);
+ mv_sata_conf_mbus_windows(hpriv->base);
/* initialize adapter */
ret = mv_init_host(host);
diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c
index 9a353c2..10f8518 100644
--- a/drivers/dma/mv_xor.c
+++ b/drivers/dma/mv_xor.c
@@ -26,6 +26,7 @@
#include <linux/platform_device.h>
#include <linux/memory.h>
#include <plat/mv_xor.h>
+#include <plat/addr-map.h>
#include "mv_xor.h"
static void mv_xor_issue_pending(struct dma_chan *chan);
@@ -1248,37 +1249,6 @@ static int __devinit mv_xor_probe(struct platform_device *pdev)
return ret;
}
-static void
-mv_xor_conf_mbus_windows(struct mv_xor_shared_private *msp,
- struct mbus_dram_target_info *dram)
-{
- void __iomem *base = msp->xor_base;
- u32 win_enable = 0;
- int i;
-
- for (i = 0; i < 8; i++) {
- writel(0, base + WINDOW_BASE(i));
- writel(0, base + WINDOW_SIZE(i));
- if (i < 4)
- writel(0, base + WINDOW_REMAP_HIGH(i));
- }
-
- for (i = 0; i < dram->num_cs; i++) {
- struct mbus_dram_window *cs = dram->cs + i;
-
- writel((cs->base & 0xffff0000) |
- (cs->mbus_attr << 8) |
- dram->mbus_dram_target_id, base + WINDOW_BASE(i));
- writel((cs->size - 1) & 0xffff0000, base + WINDOW_SIZE(i));
-
- win_enable |= (1 << i);
- win_enable |= 3 << (16 + (2 * i));
- }
-
- writel(win_enable, base + WINDOW_BAR_ENABLE(0));
- writel(win_enable, base + WINDOW_BAR_ENABLE(1));
-}
-
static struct platform_driver mv_xor_driver = {
.probe = mv_xor_probe,
.remove = __devexit_p(mv_xor_remove),
@@ -1321,10 +1291,9 @@ static int mv_xor_shared_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, msp);
/*
- * (Re-)program MBUS remapping windows if we are asked to.
+ * (Re-)program MBUS remapping windows.
*/
- if (msd != NULL && msd->dram != NULL)
- mv_xor_conf_mbus_windows(msp, msd->dram);
+ mv_xor_conf_mbus_windows(msp->xor_base);
return 0;
}
diff --git a/drivers/dma/mv_xor.h b/drivers/dma/mv_xor.h
index 977b592..b6b13fb 100644
--- a/drivers/dma/mv_xor.h
+++ b/drivers/dma/mv_xor.h
@@ -47,11 +47,6 @@
#define XOR_ERROR_ADDR(chan) (chan->mmr_base + 0x60)
#define XOR_INTR_MASK_VALUE 0x3F5
-#define WINDOW_BASE(w) (0x250 + ((w) << 2))
-#define WINDOW_SIZE(w) (0x270 + ((w) << 2))
-#define WINDOW_REMAP_HIGH(w) (0x290 + ((w) << 2))
-#define WINDOW_BAR_ENABLE(chan) (0x240 + ((chan) << 2))
-
struct mv_xor_shared_private {
void __iomem *xor_base;
void __iomem *xor_high_base;
diff --git a/drivers/mmc/host/mvsdio.c b/drivers/mmc/host/mvsdio.c
index a5bf60e..9e1a1be 100644
--- a/drivers/mmc/host/mvsdio.c
+++ b/drivers/mmc/host/mvsdio.c
@@ -13,7 +13,6 @@
#include <linux/init.h>
#include <linux/io.h>
#include <linux/platform_device.h>
-#include <linux/mbus.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/dma-mapping.h>
@@ -25,6 +24,7 @@
#include <asm/sizes.h>
#include <asm/unaligned.h>
#include <plat/mvsdio.h>
+#include <plat/addr-map.h>
#include "mvsdio.h"
@@ -679,27 +679,6 @@ static const struct mmc_host_ops mvsd_ops = {
.enable_sdio_irq = mvsd_enable_sdio_irq,
};
-static void __init mv_conf_mbus_windows(struct mvsd_host *host,
- struct mbus_dram_target_info *dram)
-{
- void __iomem *iobase = host->base;
- int i;
-
- for (i = 0; i < 4; i++) {
- writel(0, iobase + MVSD_WINDOW_CTRL(i));
- writel(0, iobase + MVSD_WINDOW_BASE(i));
- }
-
- for (i = 0; i < dram->num_cs; i++) {
- struct mbus_dram_window *cs = dram->cs + i;
- writel(((cs->size - 1) & 0xffff0000) |
- (cs->mbus_attr << 8) |
- (dram->mbus_dram_target_id << 4) | 1,
- iobase + MVSD_WINDOW_CTRL(i));
- writel(cs->base, iobase + MVSD_WINDOW_BASE(i));
- }
-}
-
static int __init mvsd_probe(struct platform_device *pdev)
{
struct mmc_host *mmc = NULL;
@@ -754,9 +733,8 @@ static int __init mvsd_probe(struct platform_device *pdev)
goto out;
}
- /* (Re-)program MBUS remapping windows if we are asked to. */
- if (mvsd_data->dram != NULL)
- mv_conf_mbus_windows(host, mvsd_data->dram);
+ /* (Re-)program MBUS remapping windows. */
+ mvsd_conf_mbus_windows(host->base);
mvsd_power_down(host);
diff --git a/drivers/mmc/host/mvsdio.h b/drivers/mmc/host/mvsdio.h
index 7d9727b..7e07793 100644
--- a/drivers/mmc/host/mvsdio.h
+++ b/drivers/mmc/host/mvsdio.h
@@ -63,10 +63,6 @@
#define MVSD_AUTO_RSP2 0x098
#define MVSD_CLK_DIV 0x128
-#define MVSD_WINDOW_CTRL(i) (0x108 + ((i) << 3))
-#define MVSD_WINDOW_BASE(i) (0x10c + ((i) << 3))
-
-
/*
* MVSD_CMD
*/
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c
index 2596999..17263b6 100644
--- a/drivers/net/mv643xx_eth.c
+++ b/drivers/net/mv643xx_eth.c
@@ -58,6 +58,7 @@
#include <linux/inet_lro.h>
#include <linux/slab.h>
#include <asm/system.h>
+#include <plat/addr-map.h>
static char mv643xx_eth_driver_name[] = "mv643xx_eth";
static char mv643xx_eth_driver_version[] = "1.4";
@@ -75,10 +76,6 @@ static char mv643xx_eth_driver_version[] = "1.4";
#define ERR_INT_CAUSE 0x0080
#define ERR_INT_SMI_DONE 0x00000010
#define ERR_INT_MASK 0x0084
-#define WINDOW_BASE(w) (0x0200 + ((w) << 3))
-#define WINDOW_SIZE(w) (0x0204 + ((w) << 3))
-#define WINDOW_REMAP_HIGH(w) (0x0280 + ((w) << 2))
-#define WINDOW_BAR_ENABLE 0x0290
#define WINDOW_PROTECT(w) (0x0294 + ((w) << 4))
/*
@@ -2510,41 +2507,6 @@ static void mv643xx_eth_netpoll(struct net_device *dev)
/* platform glue ************************************************************/
-static void
-mv643xx_eth_conf_mbus_windows(struct mv643xx_eth_shared_private *msp,
- struct mbus_dram_target_info *dram)
-{
- void __iomem *base = msp->base;
- u32 win_enable;
- u32 win_protect;
- int i;
-
- for (i = 0; i < 6; i++) {
- writel(0, base + WINDOW_BASE(i));
- writel(0, base + WINDOW_SIZE(i));
- if (i < 4)
- writel(0, base + WINDOW_REMAP_HIGH(i));
- }
-
- win_enable = 0x3f;
- win_protect = 0;
-
- for (i = 0; i < dram->num_cs; i++) {
- struct mbus_dram_window *cs = dram->cs + i;
-
- writel((cs->base & 0xffff0000) |
- (cs->mbus_attr << 8) |
- dram->mbus_dram_target_id, base + WINDOW_BASE(i));
- writel((cs->size - 1) & 0xffff0000, base + WINDOW_SIZE(i));
-
- win_enable &= ~(1 << i);
- win_protect |= 3 << (2 * i);
- }
-
- writel(win_enable, base + WINDOW_BAR_ENABLE);
- msp->win_protect = win_protect;
-}
-
static void infer_hw_params(struct mv643xx_eth_shared_private *msp)
{
/*
@@ -2642,10 +2604,9 @@ static int mv643xx_eth_shared_probe(struct platform_device *pdev)
}
/*
- * (Re-)program MBUS remapping windows if we are asked to.
+ * (Re-)program MBUS remapping windows.
*/
- if (pd != NULL && pd->dram != NULL)
- mv643xx_eth_conf_mbus_windows(msp, pd->dram);
+ msp->win_protect = mv643xx_eth_conf_mbus_windows(msp->base);
/*
* Detect hardware parameters.
diff --git a/drivers/usb/host/ehci-orion.c b/drivers/usb/host/ehci-orion.c
index 395bdb0..e233865 100644
--- a/drivers/usb/host/ehci-orion.c
+++ b/drivers/usb/host/ehci-orion.c
@@ -11,8 +11,8 @@
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
-#include <linux/mbus.h>
#include <plat/ehci-orion.h>
+#include <plat/addr-map.h>
#define rdl(off) __raw_readl(hcd->regs + (off))
#define wrl(off, val) __raw_writel((val), hcd->regs + (off))
@@ -21,8 +21,6 @@
#define USB_MODE 0x1a8
#define USB_CAUSE 0x310
#define USB_MASK 0x314
-#define USB_WINDOW_CTRL(i) (0x320 + ((i) << 4))
-#define USB_WINDOW_BASE(i) (0x324 + ((i) << 4))
#define USB_IPG 0x360
#define USB_PHY_PWR_CTRL 0x400
#define USB_PHY_TX_CTRL 0x420
@@ -170,27 +168,6 @@ static const struct hc_driver ehci_orion_hc_driver = {
.clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
};
-static void __init
-ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
- struct mbus_dram_target_info *dram)
-{
- int i;
-
- for (i = 0; i < 4; i++) {
- wrl(USB_WINDOW_CTRL(i), 0);
- wrl(USB_WINDOW_BASE(i), 0);
- }
-
- for (i = 0; i < dram->num_cs; i++) {
- struct mbus_dram_window *cs = dram->cs + i;
-
- wrl(USB_WINDOW_CTRL(i), ((cs->size - 1) & 0xffff0000) |
- (cs->mbus_attr << 8) |
- (dram->mbus_dram_target_id << 4) | 1);
- wrl(USB_WINDOW_BASE(i), cs->base);
- }
-}
-
static int __devinit ehci_orion_drv_probe(struct platform_device *pdev)
{
struct orion_ehci_data *pd = pdev->dev.platform_data;
@@ -257,10 +234,9 @@ static int __devinit ehci_orion_drv_probe(struct platform_device *pdev)
ehci->sbrn = 0x20;
/*
- * (Re-)program MBUS remapping windows if we are asked to.
+ * (Re-)program MBUS remapping windows.
*/
- if (pd != NULL && pd->dram != NULL)
- ehci_orion_conf_mbus_windows(hcd, pd->dram);
+ ehci_orion_conf_mbus_windows(hcd->regs);
/*
* setup Orion USB controller.
diff --git a/sound/soc/kirkwood/kirkwood-dma.c b/sound/soc/kirkwood/kirkwood-dma.c
index cd33de1..ce4b624 100644
--- a/sound/soc/kirkwood/kirkwood-dma.c
+++ b/sound/soc/kirkwood/kirkwood-dma.c
@@ -17,8 +17,8 @@
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/dma-mapping.h>
-#include <linux/mbus.h>
#include <sound/soc.h>
+#include <plat/addr-map.h>
#include "kirkwood.h"
#define KIRKWOOD_RATES \
@@ -94,30 +94,6 @@ static irqreturn_t kirkwood_dma_irq(int irq, void *dev_id)
return IRQ_HANDLED;
}
-static void kirkwood_dma_conf_mbus_windows(void __iomem *base, int win,
- unsigned long dma,
- struct mbus_dram_target_info *dram)
-{
- int i;
-
- /* First disable and clear windows */
- writel(0, base + KIRKWOOD_AUDIO_WIN_CTRL_REG(win));
- writel(0, base + KIRKWOOD_AUDIO_WIN_BASE_REG(win));
-
- /* try to find matching cs for current dma address */
- for (i = 0; i < dram->num_cs; i++) {
- struct mbus_dram_window *cs = dram->cs + i;
- if ((cs->base & 0xffff0000) < (dma & 0xffff0000)) {
- writel(cs->base & 0xffff0000,
- base + KIRKWOOD_AUDIO_WIN_BASE_REG(win));
- writel(((cs->size - 1) & 0xffff0000) |
- (cs->mbus_attr << 8) |
- (dram->mbus_dram_target_id << 4) | 1,
- base + KIRKWOOD_AUDIO_WIN_CTRL_REG(win));
- }
- }
-}
-
static int kirkwood_dma_open(struct snd_pcm_substream *substream)
{
int err;
@@ -179,11 +155,11 @@ static int kirkwood_dma_open(struct snd_pcm_substream *substream)
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
prdata->play_stream = substream;
kirkwood_dma_conf_mbus_windows(priv->io,
- KIRKWOOD_PLAYBACK_WIN, addr, priv->dram);
+ KIRKWOOD_PLAYBACK_WIN, addr);
} else {
prdata->rec_stream = substream;
kirkwood_dma_conf_mbus_windows(priv->io,
- KIRKWOOD_RECORD_WIN, addr, priv->dram);
+ KIRKWOOD_RECORD_WIN, addr);
}
return 0;
diff --git a/sound/soc/kirkwood/kirkwood.h b/sound/soc/kirkwood/kirkwood.h
index bb6e6a5..1293689 100644
--- a/sound/soc/kirkwood/kirkwood.h
+++ b/sound/soc/kirkwood/kirkwood.h
@@ -16,10 +16,6 @@
#define KIRKWOOD_PLAYBACK_WIN 1
#define KIRKWOOD_MAX_AUDIO_WIN 2
-#define KIRKWOOD_AUDIO_WIN_BASE_REG(win) (0xA00 + ((win)<<3))
-#define KIRKWOOD_AUDIO_WIN_CTRL_REG(win) (0xA04 + ((win)<<3))
-
-
#define KIRKWOOD_RECCTL 0x1000
#define KIRKWOOD_RECCTL_SPDIF_EN (1<<11)
#define KIRKWOOD_RECCTL_I2S_EN (1<<10)
--
1.7.7.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 4/5] [orion] Remove address map info from all platform data strucutures.
2011-11-12 20:00 [PATCH 0/5] Move mbus setup code out of drivers and into platform Andrew Lunn
` (2 preceding siblings ...)
2011-11-12 20:00 ` [PATCH 3/5] [orion] Move address map setup out of the drivers and into platform Andrew Lunn
@ 2011-11-12 20:00 ` Andrew Lunn
2011-11-12 20:00 ` [PATCH 5/5] [orion] Consolidate the address map setup code Andrew Lunn
4 siblings, 0 replies; 15+ messages in thread
From: Andrew Lunn @ 2011-11-12 20:00 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/mach-dove/common.c | 15 +++------
arch/arm/mach-kirkwood/common.c | 16 +++------
arch/arm/mach-mv78xx0/common.c | 21 +++++-------
arch/arm/mach-orion5x/common.c | 15 +++------
arch/arm/plat-orion/common.c | 43 +++++-------------------
arch/arm/plat-orion/include/plat/audio.h | 3 --
arch/arm/plat-orion/include/plat/common.h | 17 ++-------
arch/arm/plat-orion/include/plat/ehci-orion.h | 1 -
arch/arm/plat-orion/include/plat/mv_xor.h | 6 ---
arch/arm/plat-orion/include/plat/mvsdio.h | 1 -
drivers/ata/sata_mv.c | 2 -
drivers/dma/mv_xor.c | 1 -
include/linux/ata_platform.h | 3 --
13 files changed, 36 insertions(+), 108 deletions(-)
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index 29c1881..29ff0d0 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -14,7 +14,6 @@
#include <linux/platform_device.h>
#include <linux/pci.h>
#include <linux/clk.h>
-#include <linux/mbus.h>
#include <linux/ata_platform.h>
#include <linux/gpio.h>
#include <asm/page.h>
@@ -72,8 +71,7 @@ void __init dove_map_io(void)
****************************************************************************/
void __init dove_ehci0_init(void)
{
- orion_ehci_init(&orion_mbus_dram_info,
- DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0);
+ orion_ehci_init(DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0);
}
/*****************************************************************************
@@ -81,8 +79,7 @@ void __init dove_ehci0_init(void)
****************************************************************************/
void __init dove_ehci1_init(void)
{
- orion_ehci_1_init(&orion_mbus_dram_info,
- DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1);
+ orion_ehci_1_init(DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1);
}
/*****************************************************************************
@@ -90,7 +87,7 @@ void __init dove_ehci1_init(void)
****************************************************************************/
void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
{
- orion_ge00_init(eth_data, &orion_mbus_dram_info,
+ orion_ge00_init(eth_data,
DOVE_GE00_PHYS_BASE, IRQ_DOVE_GE00_SUM,
0, get_tclk());
}
@@ -108,8 +105,7 @@ void __init dove_rtc_init(void)
****************************************************************************/
void __init dove_sata_init(struct mv_sata_platform_data *sata_data)
{
- orion_sata_init(sata_data, &orion_mbus_dram_info,
- DOVE_SATA_PHYS_BASE, IRQ_DOVE_SATA);
+ orion_sata_init(sata_data, DOVE_SATA_PHYS_BASE, IRQ_DOVE_SATA);
}
@@ -199,8 +195,7 @@ struct sys_timer dove_timer = {
****************************************************************************/
void __init dove_xor0_init(void)
{
- orion_xor0_init(&orion_mbus_dram_info,
- DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE,
+ orion_xor0_init(DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE,
IRQ_DOVE_XOR_00, IRQ_DOVE_XOR_01);
}
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index d8b4ed2..6badde5 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -12,7 +12,6 @@
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
-#include <linux/mbus.h>
#include <linux/ata_platform.h>
#include <linux/mtd/nand.h>
#include <linux/dma-mapping.h>
@@ -74,8 +73,7 @@ unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
void __init kirkwood_ehci_init(void)
{
kirkwood_clk_ctrl |= CGC_USB0;
- orion_ehci_init(&orion_mbus_dram_info,
- USB_PHYS_BASE, IRQ_KIRKWOOD_USB);
+ orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB);
}
@@ -86,7 +84,7 @@ void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
{
kirkwood_clk_ctrl |= CGC_GE0;
- orion_ge00_init(eth_data, &orion_mbus_dram_info,
+ orion_ge00_init(eth_data,
GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
IRQ_KIRKWOOD_GE00_ERR, kirkwood_tclk);
}
@@ -100,7 +98,7 @@ void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
kirkwood_clk_ctrl |= CGC_GE1;
- orion_ge01_init(eth_data, &orion_mbus_dram_info,
+ orion_ge01_init(eth_data,
GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
IRQ_KIRKWOOD_GE01_ERR, kirkwood_tclk);
}
@@ -179,8 +177,7 @@ void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
if (sata_data->n_ports > 1)
kirkwood_clk_ctrl |= CGC_SATA1;
- orion_sata_init(sata_data, &orion_mbus_dram_info,
- SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
+ orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
}
@@ -222,7 +219,6 @@ void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
mvsdio_data->clock = 100000000;
else
mvsdio_data->clock = 200000000;
- mvsdio_data->dram = &orion_mbus_dram_info;
kirkwood_clk_ctrl |= CGC_SDIO;
kirkwood_sdio.dev.platform_data = mvsdio_data;
platform_device_register(&kirkwood_sdio);
@@ -286,8 +282,7 @@ static void __init kirkwood_xor0_init(void)
{
kirkwood_clk_ctrl |= CGC_XOR0;
- orion_xor0_init(&orion_mbus_dram_info,
- XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
+ orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01);
}
@@ -365,7 +360,6 @@ static struct resource kirkwood_i2s_resources[] = {
};
static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
- .dram = &orion_mbus_dram_info,
.burst = 128,
};
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index be0c232..534ce20 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -12,7 +12,6 @@
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
-#include <linux/mbus.h>
#include <linux/ata_platform.h>
#include <linux/ethtool.h>
#include <asm/mach/map.h>
@@ -170,8 +169,7 @@ void __init mv78xx0_map_io(void)
****************************************************************************/
void __init mv78xx0_ehci0_init(void)
{
- orion_ehci_init(&orion_mbus_dram_info,
- USB0_PHYS_BASE, IRQ_MV78XX0_USB_0);
+ orion_ehci_init(USB0_PHYS_BASE, IRQ_MV78XX0_USB_0);
}
@@ -180,8 +178,7 @@ void __init mv78xx0_ehci0_init(void)
****************************************************************************/
void __init mv78xx0_ehci1_init(void)
{
- orion_ehci_1_init(&orion_mbus_dram_info,
- USB1_PHYS_BASE, IRQ_MV78XX0_USB_1);
+ orion_ehci_1_init(USB1_PHYS_BASE, IRQ_MV78XX0_USB_1);
}
@@ -190,8 +187,7 @@ void __init mv78xx0_ehci1_init(void)
****************************************************************************/
void __init mv78xx0_ehci2_init(void)
{
- orion_ehci_2_init(&orion_mbus_dram_info,
- USB2_PHYS_BASE, IRQ_MV78XX0_USB_2);
+ orion_ehci_2_init(USB2_PHYS_BASE, IRQ_MV78XX0_USB_2);
}
@@ -200,7 +196,7 @@ void __init mv78xx0_ehci2_init(void)
****************************************************************************/
void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data)
{
- orion_ge00_init(eth_data, &orion_mbus_dram_info,
+ orion_ge00_init(eth_data,
GE00_PHYS_BASE, IRQ_MV78XX0_GE00_SUM,
IRQ_MV78XX0_GE_ERR, get_tclk());
}
@@ -211,7 +207,7 @@ void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data)
****************************************************************************/
void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data)
{
- orion_ge01_init(eth_data, &orion_mbus_dram_info,
+ orion_ge01_init(eth_data,
GE01_PHYS_BASE, IRQ_MV78XX0_GE01_SUM,
NO_IRQ, get_tclk());
}
@@ -235,7 +231,7 @@ void __init mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data)
eth_data->duplex = DUPLEX_FULL;
}
- orion_ge10_init(eth_data, &orion_mbus_dram_info,
+ orion_ge10_init(eth_data,
GE10_PHYS_BASE, IRQ_MV78XX0_GE10_SUM,
NO_IRQ, get_tclk());
}
@@ -259,7 +255,7 @@ void __init mv78xx0_ge11_init(struct mv643xx_eth_platform_data *eth_data)
eth_data->duplex = DUPLEX_FULL;
}
- orion_ge11_init(eth_data, &orion_mbus_dram_info,
+ orion_ge11_init(eth_data,
GE11_PHYS_BASE, IRQ_MV78XX0_GE11_SUM,
NO_IRQ, get_tclk());
}
@@ -278,8 +274,7 @@ void __init mv78xx0_i2c_init(void)
****************************************************************************/
void __init mv78xx0_sata_init(struct mv_sata_platform_data *sata_data)
{
- orion_sata_init(sata_data, &orion_mbus_dram_info,
- SATA_PHYS_BASE, IRQ_MV78XX0_SATA);
+ orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_MV78XX0_SATA);
}
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 27addd5..c0dea6e 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -15,7 +15,6 @@
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/serial_8250.h>
-#include <linux/mbus.h>
#include <linux/mv643xx_i2c.h>
#include <linux/ata_platform.h>
#include <net/dsa.h>
@@ -72,8 +71,7 @@ void __init orion5x_map_io(void)
****************************************************************************/
void __init orion5x_ehci0_init(void)
{
- orion_ehci_init(&orion_mbus_dram_info,
- ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL);
+ orion_ehci_init(ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL);
}
@@ -82,8 +80,7 @@ void __init orion5x_ehci0_init(void)
****************************************************************************/
void __init orion5x_ehci1_init(void)
{
- orion_ehci_1_init(&orion_mbus_dram_info,
- ORION5X_USB1_PHYS_BASE, IRQ_ORION5X_USB1_CTRL);
+ orion_ehci_1_init(ORION5X_USB1_PHYS_BASE, IRQ_ORION5X_USB1_CTRL);
}
@@ -92,7 +89,7 @@ void __init orion5x_ehci1_init(void)
****************************************************************************/
void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
{
- orion_ge00_init(eth_data, &orion_mbus_dram_info,
+ orion_ge00_init(eth_data,
ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM,
IRQ_ORION5X_ETH_ERR, orion5x_tclk);
}
@@ -122,8 +119,7 @@ void __init orion5x_i2c_init(void)
****************************************************************************/
void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
{
- orion_sata_init(sata_data, &orion_mbus_dram_info,
- ORION5X_SATA_PHYS_BASE, IRQ_ORION5X_SATA);
+ orion_sata_init(sata_data, ORION5X_SATA_PHYS_BASE, IRQ_ORION5X_SATA);
}
@@ -159,8 +155,7 @@ void __init orion5x_uart1_init(void)
****************************************************************************/
void __init orion5x_xor_init(void)
{
- orion_xor0_init(&orion_mbus_dram_info,
- ORION5X_XOR_PHYS_BASE,
+ orion_xor0_init(ORION5X_XOR_PHYS_BASE,
ORION5X_XOR_PHYS_BASE + 0x200,
IRQ_ORION5X_XOR0, IRQ_ORION5X_XOR1);
}
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
index db8741e..f762089 100644
--- a/arch/arm/plat-orion/common.c
+++ b/arch/arm/plat-orion/common.c
@@ -13,7 +13,6 @@
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/serial_8250.h>
-#include <linux/mbus.h>
#include <linux/ata_platform.h>
#include <linux/mv643xx_eth.h>
#include <linux/mv643xx_i2c.h>
@@ -204,13 +203,12 @@ void __init orion_rtc_init(unsigned long mapbase,
****************************************************************************/
static __init void ge_complete(
struct mv643xx_eth_shared_platform_data *orion_ge_shared_data,
- struct mbus_dram_target_info *mbus_dram_info, int tclk,
+ int tclk,
struct resource *orion_ge_resource, unsigned long irq,
struct platform_device *orion_ge_shared,
struct mv643xx_eth_platform_data *eth_data,
struct platform_device *orion_ge)
{
- orion_ge_shared_data->dram = mbus_dram_info;
orion_ge_shared_data->t_clk = tclk;
orion_ge_resource->start = irq;
orion_ge_resource->end = irq;
@@ -260,7 +258,6 @@ static struct platform_device orion_ge00 = {
};
void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
- struct mbus_dram_target_info *mbus_dram_info,
unsigned long mapbase,
unsigned long irq,
unsigned long irq_err,
@@ -268,7 +265,7 @@ void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
{
fill_resources(&orion_ge00_shared, orion_ge00_shared_resources,
mapbase + 0x2000, SZ_16K - 1, irq_err);
- ge_complete(&orion_ge00_shared_data, mbus_dram_info, tclk,
+ ge_complete(&orion_ge00_shared_data, tclk,
orion_ge00_resources, irq, &orion_ge00_shared,
eth_data, &orion_ge00);
}
@@ -314,7 +311,6 @@ static struct platform_device orion_ge01 = {
};
void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
- struct mbus_dram_target_info *mbus_dram_info,
unsigned long mapbase,
unsigned long irq,
unsigned long irq_err,
@@ -322,7 +318,7 @@ void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
{
fill_resources(&orion_ge01_shared, orion_ge01_shared_resources,
mapbase + 0x2000, SZ_16K - 1, irq_err);
- ge_complete(&orion_ge01_shared_data, mbus_dram_info, tclk,
+ ge_complete(&orion_ge01_shared_data, tclk,
orion_ge01_resources, irq, &orion_ge01_shared,
eth_data, &orion_ge01);
}
@@ -368,7 +364,6 @@ static struct platform_device orion_ge10 = {
};
void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data,
- struct mbus_dram_target_info *mbus_dram_info,
unsigned long mapbase,
unsigned long irq,
unsigned long irq_err,
@@ -376,7 +371,7 @@ void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data,
{
fill_resources(&orion_ge10_shared, orion_ge10_shared_resources,
mapbase + 0x2000, SZ_16K - 1, irq_err);
- ge_complete(&orion_ge10_shared_data, mbus_dram_info, tclk,
+ ge_complete(&orion_ge10_shared_data, tclk,
orion_ge10_resources, irq, &orion_ge10_shared,
eth_data, &orion_ge10);
}
@@ -422,7 +417,6 @@ static struct platform_device orion_ge11 = {
};
void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data,
- struct mbus_dram_target_info *mbus_dram_info,
unsigned long mapbase,
unsigned long irq,
unsigned long irq_err,
@@ -430,7 +424,7 @@ void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data,
{
fill_resources(&orion_ge11_shared, orion_ge11_shared_resources,
mapbase + 0x2000, SZ_16K - 1, irq_err);
- ge_complete(&orion_ge11_shared_data, mbus_dram_info, tclk,
+ ge_complete(&orion_ge11_shared_data, tclk,
orion_ge11_resources, irq, &orion_ge11_shared,
eth_data, &orion_ge11);
}
@@ -593,8 +587,6 @@ void __init orion_wdt_init(unsigned long tclk)
/*****************************************************************************
* XOR
****************************************************************************/
-static struct mv_xor_platform_shared_data orion_xor_shared_data;
-
static u64 orion_xor_dmamask = DMA_BIT_MASK(32);
static void __init orion_xor_init_channels(
@@ -633,9 +625,6 @@ static struct resource orion_xor0_shared_resources[] = {
static struct platform_device orion_xor0_shared = {
.name = MV_XOR_SHARED_NAME,
.id = 0,
- .dev = {
- .platform_data = &orion_xor_shared_data,
- },
.num_resources = ARRAY_SIZE(orion_xor0_shared_resources),
.resource = orion_xor0_shared_resources,
};
@@ -688,14 +677,11 @@ static struct platform_device orion_xor01_channel = {
},
};
-void __init orion_xor0_init(struct mbus_dram_target_info *mbus_dram_info,
- unsigned long mapbase_low,
+void __init orion_xor0_init(unsigned long mapbase_low,
unsigned long mapbase_high,
unsigned long irq_0,
unsigned long irq_1)
{
- orion_xor_shared_data.dram = mbus_dram_info;
-
orion_xor0_shared_resources[0].start = mapbase_low;
orion_xor0_shared_resources[0].end = mapbase_low + 0xff;
orion_xor0_shared_resources[1].start = mapbase_high;
@@ -728,9 +714,6 @@ static struct resource orion_xor1_shared_resources[] = {
static struct platform_device orion_xor1_shared = {
.name = MV_XOR_SHARED_NAME,
.id = 1,
- .dev = {
- .platform_data = &orion_xor_shared_data,
- },
.num_resources = ARRAY_SIZE(orion_xor1_shared_resources),
.resource = orion_xor1_shared_resources,
};
@@ -829,11 +812,9 @@ static struct platform_device orion_ehci = {
},
};
-void __init orion_ehci_init(struct mbus_dram_target_info *mbus_dram_info,
- unsigned long mapbase,
+void __init orion_ehci_init(unsigned long mapbase,
unsigned long irq)
{
- orion_ehci_data.dram = mbus_dram_info;
fill_resources(&orion_ehci, orion_ehci_resources, mapbase, SZ_4K - 1,
irq);
@@ -855,11 +836,9 @@ static struct platform_device orion_ehci_1 = {
},
};
-void __init orion_ehci_1_init(struct mbus_dram_target_info *mbus_dram_info,
- unsigned long mapbase,
+void __init orion_ehci_1_init(unsigned long mapbase,
unsigned long irq)
{
- orion_ehci_data.dram = mbus_dram_info;
fill_resources(&orion_ehci_1, orion_ehci_1_resources,
mapbase, SZ_4K - 1, irq);
@@ -881,11 +860,9 @@ static struct platform_device orion_ehci_2 = {
},
};
-void __init orion_ehci_2_init(struct mbus_dram_target_info *mbus_dram_info,
- unsigned long mapbase,
+void __init orion_ehci_2_init(unsigned long mapbase,
unsigned long irq)
{
- orion_ehci_data.dram = mbus_dram_info;
fill_resources(&orion_ehci_2, orion_ehci_2_resources,
mapbase, SZ_4K - 1, irq);
@@ -912,11 +889,9 @@ static struct platform_device orion_sata = {
};
void __init orion_sata_init(struct mv_sata_platform_data *sata_data,
- struct mbus_dram_target_info *mbus_dram_info,
unsigned long mapbase,
unsigned long irq)
{
- sata_data->dram = mbus_dram_info;
orion_sata.dev.platform_data = sata_data;
fill_resources(&orion_sata, orion_sata_resources,
mapbase, 0x5000 - 1, irq);
diff --git a/arch/arm/plat-orion/include/plat/audio.h b/arch/arm/plat-orion/include/plat/audio.h
index 9cf1f78..885f8ab 100644
--- a/arch/arm/plat-orion/include/plat/audio.h
+++ b/arch/arm/plat-orion/include/plat/audio.h
@@ -1,11 +1,8 @@
#ifndef __PLAT_AUDIO_H
#define __PLAT_AUDIO_H
-#include <linux/mbus.h>
-
struct kirkwood_asoc_platform_data {
u32 tclk;
- struct mbus_dram_target_info *dram;
int burst;
};
#endif
diff --git a/arch/arm/plat-orion/include/plat/common.h b/arch/arm/plat-orion/include/plat/common.h
index a63c357..0fe08d7 100644
--- a/arch/arm/plat-orion/include/plat/common.h
+++ b/arch/arm/plat-orion/include/plat/common.h
@@ -37,28 +37,24 @@ void __init orion_rtc_init(unsigned long mapbase,
unsigned long irq);
void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
- struct mbus_dram_target_info *mbus_dram_info,
unsigned long mapbase,
unsigned long irq,
unsigned long irq_err,
int tclk);
void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
- struct mbus_dram_target_info *mbus_dram_info,
unsigned long mapbase,
unsigned long irq,
unsigned long irq_err,
int tclk);
void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data,
- struct mbus_dram_target_info *mbus_dram_info,
unsigned long mapbase,
unsigned long irq,
unsigned long irq_err,
int tclk);
void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data,
- struct mbus_dram_target_info *mbus_dram_info,
unsigned long mapbase,
unsigned long irq,
unsigned long irq_err,
@@ -82,8 +78,7 @@ void __init orion_spi_1_init(unsigned long mapbase,
void __init orion_wdt_init(unsigned long tclk);
-void __init orion_xor0_init(struct mbus_dram_target_info *mbus_dram_info,
- unsigned long mapbase_low,
+void __init orion_xor0_init(unsigned long mapbase_low,
unsigned long mapbase_high,
unsigned long irq_0,
unsigned long irq_1);
@@ -93,20 +88,16 @@ void __init orion_xor1_init(unsigned long mapbase_low,
unsigned long irq_0,
unsigned long irq_1);
-void __init orion_ehci_init(struct mbus_dram_target_info *mbus_dram_info,
- unsigned long mapbase,
+void __init orion_ehci_init(unsigned long mapbase,
unsigned long irq);
-void __init orion_ehci_1_init(struct mbus_dram_target_info *mbus_dram_info,
- unsigned long mapbase,
+void __init orion_ehci_1_init(unsigned long mapbase,
unsigned long irq);
-void __init orion_ehci_2_init(struct mbus_dram_target_info *mbus_dram_info,
- unsigned long mapbase,
+void __init orion_ehci_2_init(unsigned long mapbase,
unsigned long irq);
void __init orion_sata_init(struct mv_sata_platform_data *sata_data,
- struct mbus_dram_target_info *mbus_dram_info,
unsigned long mapbase,
unsigned long irq);
diff --git a/arch/arm/plat-orion/include/plat/ehci-orion.h b/arch/arm/plat-orion/include/plat/ehci-orion.h
index 4ec668e..6fc78e4 100644
--- a/arch/arm/plat-orion/include/plat/ehci-orion.h
+++ b/arch/arm/plat-orion/include/plat/ehci-orion.h
@@ -19,7 +19,6 @@ enum orion_ehci_phy_ver {
};
struct orion_ehci_data {
- struct mbus_dram_target_info *dram;
enum orion_ehci_phy_ver phy_version;
};
diff --git a/arch/arm/plat-orion/include/plat/mv_xor.h b/arch/arm/plat-orion/include/plat/mv_xor.h
index bd5f3bd..2ba1f7d 100644
--- a/arch/arm/plat-orion/include/plat/mv_xor.h
+++ b/arch/arm/plat-orion/include/plat/mv_xor.h
@@ -13,12 +13,6 @@
#define MV_XOR_SHARED_NAME "mv_xor_shared"
#define MV_XOR_NAME "mv_xor"
-struct mbus_dram_target_info;
-
-struct mv_xor_platform_shared_data {
- struct mbus_dram_target_info *dram;
-};
-
struct mv_xor_platform_data {
struct platform_device *shared;
int hw_id;
diff --git a/arch/arm/plat-orion/include/plat/mvsdio.h b/arch/arm/plat-orion/include/plat/mvsdio.h
index 14ca886..1190efe 100644
--- a/arch/arm/plat-orion/include/plat/mvsdio.h
+++ b/arch/arm/plat-orion/include/plat/mvsdio.h
@@ -12,7 +12,6 @@
#include <linux/mbus.h>
struct mvsdio_platform_data {
- struct mbus_dram_target_info *dram;
unsigned int clock;
int gpio_card_detect;
int gpio_write_protect;
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 43c6d2a..a9a367a 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -4118,8 +4118,6 @@ static int mv_platform_resume(struct platform_device *pdev)
if (host) {
struct mv_host_priv *hpriv = host->private_data;
- const struct mv_sata_platform_data *mv_platform_data = \
- pdev->dev.platform_data;
/*
* (Re-)program MBUS remapping windows.
*/
diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c
index 10f8518..2835adb 100644
--- a/drivers/dma/mv_xor.c
+++ b/drivers/dma/mv_xor.c
@@ -1260,7 +1260,6 @@ static struct platform_driver mv_xor_driver = {
static int mv_xor_shared_probe(struct platform_device *pdev)
{
- struct mv_xor_platform_shared_data *msd = pdev->dev.platform_data;
struct mv_xor_shared_private *msp;
struct resource *res;
diff --git a/include/linux/ata_platform.h b/include/linux/ata_platform.h
index 9a26c83..b856a2a 100644
--- a/include/linux/ata_platform.h
+++ b/include/linux/ata_platform.h
@@ -27,10 +27,7 @@ extern int __devexit __pata_platform_remove(struct device *dev);
/*
* Marvell SATA private data
*/
-struct mbus_dram_target_info;
-
struct mv_sata_platform_data {
- struct mbus_dram_target_info *dram;
int n_ports; /* number of sata ports */
};
--
1.7.7.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 5/5] [orion] Consolidate the address map setup code.
2011-11-12 20:00 [PATCH 0/5] Move mbus setup code out of drivers and into platform Andrew Lunn
` (3 preceding siblings ...)
2011-11-12 20:00 ` [PATCH 4/5] [orion] Remove address map info from all platform data strucutures Andrew Lunn
@ 2011-11-12 20:00 ` Andrew Lunn
4 siblings, 0 replies; 15+ messages in thread
From: Andrew Lunn @ 2011-11-12 20:00 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/plat-orion/addr-map.c | 171 +++++++++++++++++++---------------------
1 files changed, 80 insertions(+), 91 deletions(-)
diff --git a/arch/arm/plat-orion/addr-map.c b/arch/arm/plat-orion/addr-map.c
index cfb9ee3..946a4b0 100644
--- a/arch/arm/plat-orion/addr-map.c
+++ b/arch/arm/plat-orion/addr-map.c
@@ -168,98 +168,83 @@ void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
orion_mbus_dram_info.num_cs = cs;
}
-#define XOR_WINDOW_BASE(w) (0x250 + ((w) << 2))
-#define XOR_WINDOW_SIZE(w) (0x270 + ((w) << 2))
-#define XOR_WINDOW_REMAP_HIGH(w) (0x290 + ((w) << 2))
-#define XOR_WINDOW_BAR_ENABLE(chan) (0x240 + ((chan) << 2))
-
-void
-mv_xor_conf_mbus_windows(void __iomem *base)
-{
- u32 win_enable = 0;
- struct mbus_dram_window *cs;
- int i;
-
- for (i = 0; i < 8; i++) {
- writel(0, base + XOR_WINDOW_BASE(i));
- writel(0, base + XOR_WINDOW_SIZE(i));
- if (i < 4)
- writel(0, base + XOR_WINDOW_REMAP_HIGH(i));
+#define WIN_X(_X_, _devname_, _off_, _shift_) \
+ static u32 _devname_ ## _win_ ## _X_(u32 i) \
+ { \
+ return _off_ + ((i) << _shift_); \
+ \
}
- for (i = 0; i < orion_mbus_dram_info.num_cs; i++) {
- cs = orion_mbus_dram_info.cs + i;
+#define WIN_BASE(_devname_, _off_, _shift_) \
+ WIN_X(base, _devname_, _off_, _shift_)
- writel((cs->base & 0xffff0000) |
- (cs->mbus_attr << 8) |
- orion_mbus_dram_info.mbus_dram_target_id,
- base + XOR_WINDOW_BASE(i));
- writel((cs->size - 1) & 0xffff0000, base + XOR_WINDOW_SIZE(i));
+#define WIN_CTRL(_devname_, _off_, _shift_) \
+ WIN_X(ctrl, _devname_, _off_, _shift_)
- win_enable |= (1 << i);
- win_enable |= 3 << (16 + (2 * i));
- }
+#define WIN_SIZE(_devname_, _off_, _shift_) \
+ WIN_X(size, _devname_, _off_, _shift_)
- writel(win_enable, base + XOR_WINDOW_BAR_ENABLE(0));
- writel(win_enable, base + XOR_WINDOW_BAR_ENABLE(1));
-}
+#define WIN_REMAP(_devname_, _off_, _shift_) \
+ WIN_X(remap, _devname_, _off_, _shift_)
-#define USB_WINDOW_CTRL(i) (0x320 + ((i) << 4))
-#define USB_WINDOW_BASE(i) (0x324 + ((i) << 4))
-#define rdl(off) __raw_readl(base + (off))
-#define wrl(off, val) __raw_writel((val), base + (off))
+WIN_BASE(xor, 0x250, 2);
+WIN_SIZE(xor, 0x270, 2);
+WIN_REMAP(xor, 0x290, 2);
+WIN_CTRL(usb, 0x320, 4);
+WIN_BASE(usb, 0x324, 4);
+WIN_CTRL(sata, 0x20030, 4);
+WIN_BASE(sata, 0x20034, 4);
+WIN_BASE(eth, 0x200, 3);
+WIN_SIZE(eth, 0x204, 3);
+WIN_REMAP(eth, 0x0280, 2);
+WIN_CTRL(mvsd, 0x108, 3);
+WIN_BASE(mvsd, 0x10c, 3);
-void __init
-ehci_orion_conf_mbus_windows(void __iomem *base)
+typedef u32 (*woff_t)(u32);
+
+void mbus_windows_base_size(void __iomem *base, woff_t off_base,
+ woff_t off_size, woff_t off_remap, int maxwin)
{
int i;
struct mbus_dram_window *cs;
- for (i = 0; i < 4; i++) {
- wrl(USB_WINDOW_CTRL(i), 0);
- wrl(USB_WINDOW_BASE(i), 0);
+ for (i = 0; i < maxwin; i++) {
+ writel(0, base + off_base(i));
+ writel(0, base + off_size(i));
+ if (i < 4)
+ writel(0, base + off_remap(i));
}
for (i = 0; i < orion_mbus_dram_info.num_cs; i++) {
cs = orion_mbus_dram_info.cs + i;
-
- wrl(USB_WINDOW_CTRL(i),
- ((cs->size - 1) & 0xffff0000) |
- (cs->mbus_attr << 8) |
- (orion_mbus_dram_info.mbus_dram_target_id << 4) | 1);
- wrl(USB_WINDOW_BASE(i), cs->base);
+ writel((cs->base & 0xffff0000) |
+ (cs->mbus_attr << 8) |
+ orion_mbus_dram_info.mbus_dram_target_id,
+ base + off_base(i));
+ writel((cs->size - 1) & 0xffff0000, base + off_size(i));
}
}
-#define SATA_WINDOW_CTRL(i) (0x20030 + ((i) << 4))
-#define SATA_WINDOW_BASE(i) (0x20034 + ((i) << 4))
-
+#define XOR_WINDOW_BAR_ENABLE(chan) (0x240 + ((chan) << 2))
-void mv_sata_conf_mbus_windows(void __iomem *base)
+void
+mv_xor_conf_mbus_windows(void __iomem *base)
{
+ u32 win_enable = 0;
int i;
- struct mbus_dram_window *cs;
- for (i = 0; i < 4; i++) {
- writel(0, base + SATA_WINDOW_CTRL(i));
- writel(0, base + SATA_WINDOW_BASE(i));
- }
+ mbus_windows_base_size(base, xor_win_base, xor_win_size,
+ xor_win_remap, 8);
for (i = 0; i < orion_mbus_dram_info.num_cs; i++) {
- cs = orion_mbus_dram_info.cs + i;
-
- writel(((cs->size - 1) & 0xffff0000) |
- (cs->mbus_attr << 8) |
- (orion_mbus_dram_info.mbus_dram_target_id << 4) | 1,
- base + SATA_WINDOW_CTRL(i));
- writel(cs->base, base + SATA_WINDOW_BASE(i));
+ win_enable |= (1 << i);
+ win_enable |= 3 << (16 + (2 * i));
}
-}
+ writel(win_enable, base + XOR_WINDOW_BAR_ENABLE(0));
+ writel(win_enable, base + XOR_WINDOW_BAR_ENABLE(1));
+}
-#define ETH_WINDOW_BASE(w) (0x0200 + ((w) << 3))
-#define ETH_WINDOW_SIZE(w) (0x0204 + ((w) << 3))
-#define ETH_WINDOW_REMAP_HIGH(w) (0x0280 + ((w) << 2))
#define ETH_WINDOW_BAR_ENABLE 0x0290
u32
@@ -268,26 +253,14 @@ mv643xx_eth_conf_mbus_windows(void __iomem *base)
u32 win_enable;
u32 win_protect;
int i;
- struct mbus_dram_window *cs;
- for (i = 0; i < 6; i++) {
- writel(0, base + ETH_WINDOW_BASE(i));
- writel(0, base + ETH_WINDOW_SIZE(i));
- if (i < 4)
- writel(0, base + ETH_WINDOW_REMAP_HIGH(i));
- }
+ mbus_windows_base_size(base, eth_win_base, eth_win_size,
+ eth_win_remap, 6);
win_enable = 0x3f;
win_protect = 0;
for (i = 0; i < orion_mbus_dram_info.num_cs; i++) {
- cs = orion_mbus_dram_info.cs + i;
- writel((cs->base & 0xffff0000) |
- (cs->mbus_attr << 8) |
- orion_mbus_dram_info.mbus_dram_target_id,
- base + ETH_WINDOW_BASE(i));
- writel((cs->size - 1) & 0xffff0000, base + ETH_WINDOW_SIZE(i));
-
win_enable &= ~(1 << i);
win_protect |= 3 << (2 * i);
}
@@ -296,29 +269,45 @@ mv643xx_eth_conf_mbus_windows(void __iomem *base)
return win_protect;
}
-#define MVSD_WINDOW_CTRL(i) (0x108 + ((i) << 3))
-#define MVSD_WINDOW_BASE(i) (0x10c + ((i) << 3))
-
-void mvsd_conf_mbus_windows(void __iomem *base)
+void
+mbus_windows_ctrl_base(void __iomem *base, woff_t off_ctrl, woff_t off_base)
{
int i;
struct mbus_dram_window *cs;
for (i = 0; i < 4; i++) {
- writel(0, base + MVSD_WINDOW_CTRL(i));
- writel(0, base + MVSD_WINDOW_BASE(i));
+ writel(0, base + off_ctrl(i));
+ writel(0, base + off_base(i));
}
for (i = 0; i < orion_mbus_dram_info.num_cs; i++) {
cs = orion_mbus_dram_info.cs + i;
+
writel(((cs->size - 1) & 0xffff0000) |
(cs->mbus_attr << 8) |
(orion_mbus_dram_info.mbus_dram_target_id << 4) | 1,
- base + MVSD_WINDOW_CTRL(i));
- writel(cs->base, base + MVSD_WINDOW_BASE(i));
+ base + off_ctrl(i));
+ writel(cs->base, base + off_base(i));
}
}
+void __init
+ehci_orion_conf_mbus_windows(void __iomem *base)
+{
+ mbus_windows_ctrl_base(base, usb_win_ctrl, usb_win_base);
+}
+
+void mv_sata_conf_mbus_windows(void __iomem *base)
+{
+ mbus_windows_ctrl_base(base, sata_win_ctrl, sata_win_base);
+}
+
+void mvsd_conf_mbus_windows(void __iomem *base)
+{
+ mbus_windows_ctrl_base(base, mvsd_win_ctrl, mvsd_win_base);
+}
+
+
#define KIRKWOOD_AUDIO_WIN_BASE_REG(win) (0xA00 + ((win)<<3))
#define KIRKWOOD_AUDIO_WIN_CTRL_REG(win) (0xA04 + ((win)<<3))
@@ -337,12 +326,12 @@ void kirkwood_dma_conf_mbus_windows(void __iomem *base, int win,
cs = orion_mbus_dram_info.cs + i;
if ((cs->base & 0xffff0000) < (dma & 0xffff0000)) {
writel(cs->base & 0xffff0000,
- base + KIRKWOOD_AUDIO_WIN_BASE_REG(win));
+ base + KIRKWOOD_AUDIO_WIN_BASE_REG(win));
writel(((cs->size - 1) & 0xffff0000) |
- (cs->mbus_attr << 8) |
- (orion_mbus_dram_info.mbus_dram_target_id << 4)
+ (cs->mbus_attr << 8) |
+ (orion_mbus_dram_info.mbus_dram_target_id << 4)
| 1,
- base + KIRKWOOD_AUDIO_WIN_CTRL_REG(win));
+ base + KIRKWOOD_AUDIO_WIN_CTRL_REG(win));
}
}
}
--
1.7.7.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 3/5] [orion] Move address map setup out of the drivers and into platform.
2011-11-12 20:00 ` [PATCH 3/5] [orion] Move address map setup out of the drivers and into platform Andrew Lunn
@ 2011-11-13 20:53 ` Michael Walle
2011-11-15 0:06 ` Nicolas Pitre
1 sibling, 0 replies; 15+ messages in thread
From: Michael Walle @ 2011-11-13 20:53 UTC (permalink / raw)
To: linux-arm-kernel
Am Samstag 12 November 2011, 21:00:05 schrieb Andrew Lunn:
> --- a/arch/arm/plat-orion/include/plat/addr-map.h
> +++ b/arch/arm/plat-orion/include/plat/addr-map.h
> @@ -50,4 +50,12 @@ void __init orion_setup_cpu_win(const struct
> orion_addr_map_cfg *cfg,
>
> void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg
> *cfg, const u32 ddr_window_cpu_base);
> +
> +void mv_xor_conf_mbus_windows(void __iomem *base);
> +void ehci_orion_conf_mbus_windows(void __iomem *base);
> +void mv_sata_conf_mbus_windows(void __iomem *base);
> +u32 mv643xx_eth_conf_mbus_windows(void __iomem *base);
> +void mv_sd_conf_mbus_windows(void __iomem *base);
this should be mvsd_conf_mbus_windows.
> +void kirkwood_dma_conf_mbus_windows(void __iomem *base, int win,
> + unsigned long dma);
> #endif
--
Michael
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 3/5] [orion] Move address map setup out of the drivers and into platform.
2011-11-12 20:00 ` [PATCH 3/5] [orion] Move address map setup out of the drivers and into platform Andrew Lunn
2011-11-13 20:53 ` Michael Walle
@ 2011-11-15 0:06 ` Nicolas Pitre
2011-11-15 7:41 ` Andrew Lunn
1 sibling, 1 reply; 15+ messages in thread
From: Nicolas Pitre @ 2011-11-15 0:06 UTC (permalink / raw)
To: linux-arm-kernel
On Sat, 12 Nov 2011, Andrew Lunn wrote:
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> ---
> arch/arm/mach-dove/pcie.c | 3 +-
> arch/arm/mach-kirkwood/mpp.c | 1 -
> arch/arm/mach-kirkwood/pcie.c | 3 +-
> arch/arm/mach-mv78xx0/mpp.c | 1 -
> arch/arm/mach-mv78xx0/pcie.c | 3 +-
> arch/arm/mach-orion5x/mpp.c | 1 -
> arch/arm/mach-orion5x/pci.c | 2 +-
> arch/arm/plat-orion/addr-map.c | 182 +++++++++++++++++++++++++++
> arch/arm/plat-orion/include/plat/addr-map.h | 8 ++
> arch/arm/plat-orion/include/plat/pcie.h | 3 +-
> arch/arm/plat-orion/pcie.c | 6 +-
> drivers/ata/sata_mv.c | 36 +-----
> drivers/dma/mv_xor.c | 37 +-----
> drivers/dma/mv_xor.h | 5 -
> drivers/mmc/host/mvsdio.c | 28 +----
> drivers/mmc/host/mvsdio.h | 4 -
> drivers/net/mv643xx_eth.c | 45 +------
> drivers/usb/host/ehci-orion.c | 30 +----
> sound/soc/kirkwood/kirkwood-dma.c | 30 +----
> sound/soc/kirkwood/kirkwood.h | 4 -
> 20 files changed, 218 insertions(+), 214 deletions(-)
I have a conceptual concern with this patch. Initially, we moved all
the device specific mbus initializations from the core SOC code into
their respective drivers before submitting this code to mainline, simply
because that was the right thing to do. Because the corresponding
registers are highly device/peripheral specific, it makes sense to put
that info in the drivers.
Now you are moving it all back into a centralized place, meaning that a
lot of different peripheral knowledge has to be gathered up into that
single place. And if a new driver is ever added for a new peripheral,
then that central place will have to learn about it too. This doesn't
look that pretty to me.
Furthermore, this is not providing any sort of code saving either.
I understand that you might want to get rid of the annoying platform
data pointer for the mbus values. But I think that this could be done
some other way though. IMHO the mbus initialization code for
peripherals should remain in the drivers, and a different way to query
the needed information be elaborated instead. Otherwise this is like
throwing out the baby with the bath water.
Nicolas
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 3/5] [orion] Move address map setup out of the drivers and into platform.
2011-11-15 0:06 ` Nicolas Pitre
@ 2011-11-15 7:41 ` Andrew Lunn
2011-11-15 22:14 ` Nicolas Pitre
0 siblings, 1 reply; 15+ messages in thread
From: Andrew Lunn @ 2011-11-15 7:41 UTC (permalink / raw)
To: linux-arm-kernel
> I understand that you might want to get rid of the annoying platform
> data pointer for the mbus values. But I think that this could be done
> some other way though. IMHO the mbus initialization code for
> peripherals should remain in the drivers, and a different way to query
> the needed information be elaborated instead. Otherwise this is like
> throwing out the baby with the bath water.
I'm open to suggestion.
What do you think about the idea of keeping the first two patches,
i.e. *_mbus_dram_info out of mach-* and into plat-orion. Then
providing a function orion_mbus_dram_info() which returns its. Keep
the address map setup code in the drivers, remove struct
mbus_dram_target_info from platform_data and use this function
instead?
Thanks
Andrew
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 3/5] [orion] Move address map setup out of the drivers and into platform.
2011-11-15 7:41 ` Andrew Lunn
@ 2011-11-15 22:14 ` Nicolas Pitre
2011-11-16 6:59 ` Andrew Lunn
0 siblings, 1 reply; 15+ messages in thread
From: Nicolas Pitre @ 2011-11-15 22:14 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, 15 Nov 2011, Andrew Lunn wrote:
> > I understand that you might want to get rid of the annoying platform
> > data pointer for the mbus values. But I think that this could be done
> > some other way though. IMHO the mbus initialization code for
> > peripherals should remain in the drivers, and a different way to query
> > the needed information be elaborated instead. Otherwise this is like
> > throwing out the baby with the bath water.
>
> I'm open to suggestion.
>
> What do you think about the idea of keeping the first two patches,
> i.e. *_mbus_dram_info out of mach-* and into plat-orion. Then
> providing a function orion_mbus_dram_info() which returns its. Keep
> the address map setup code in the drivers, remove struct
> mbus_dram_target_info from platform_data and use this function
> instead?
I pretty much like patch #1. Just remember to mark unneeded data after
boot as __initdata.
I don't see the point of patch #2. Having a kirkwood specific piece of
data called kirkwood_foo rather than orion_foo makes more sense to me.
Having a static orion_mbus_dram_info() function might be a problem on
other platforms. for example, the mv643xx_eth driver is also used by
some PowerPC targets. The sata_mv driver is shared between
Orion/Kirkwood/Dove SOCs and Marvell SATA controllers on PCI cards that
can be found on any architecture with a PCI bus. Etc. It is therefore
necessary to query those resources in a standard way and be prepared for
the fact that they might just be absent. So I'd suggest looking at the
possibility of using IORESOURCE_BUS in the standard platform device
data or a similar mechanism.
Nicolas
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 3/5] [orion] Move address map setup out of the drivers and into platform.
2011-11-15 22:14 ` Nicolas Pitre
@ 2011-11-16 6:59 ` Andrew Lunn
2011-11-16 16:08 ` Nicolas Pitre
0 siblings, 1 reply; 15+ messages in thread
From: Andrew Lunn @ 2011-11-16 6:59 UTC (permalink / raw)
To: linux-arm-kernel
> > What do you think about the idea of keeping the first two patches,
> > i.e. *_mbus_dram_info out of mach-* and into plat-orion. Then
> > providing a function orion_mbus_dram_info() which returns its. Keep
> > the address map setup code in the drivers, remove struct
> > mbus_dram_target_info from platform_data and use this function
> > instead?
>
> I pretty much like patch #1. Just remember to mark unneeded data after
> boot as __initdata.
O.K. I can do that and submit it.
> I don't see the point of patch #2. Having a kirkwood specific piece of
> data called kirkwood_foo rather than orion_foo makes more sense to me.
Is it kirkwood specific? All plat-orion based systems have one
mbus_dram_target_info. The structure i would say belongs to orion, but
the contents to kirkwood. How you use the structure belongs to orion,
since all the drivers, independent of if they are running on kirkwood,
dove, mv78xx0, all use it in the same way.
> Having a static orion_mbus_dram_info() function might be a problem on
> other platforms. for example, the mv643xx_eth driver is also used by
> some PowerPC targets.
That in itself is interesting. I looked at the PowerPC code,
powerpc/platforms/chrp/pegasos_eth.c &
powerpc/sysdev/mv64x60_dev.c. No mention of any _mbus_dram_info
structure. Which to me means _mbus_dram_info is an plat-orion thing
and not an mv643xx_eth thing, so maybe it belongs in the plat-orion?
I guess what will decide it, is when another SoC comes along using
these devices and needs the address map setup doing differently. Then
it is clear its a platform thing, not a device thing.
> The sata_mv driver is shared between Orion/Kirkwood/Dove SOCs and
> Marvell SATA controllers on PCI cards that can be found on any
> architecture with a PCI bus. Etc. It is therefore necessary to
> query those resources in a standard way and be prepared for the fact
> that they might just be absent. So I'd suggest looking at the
> possibility of using IORESOURCE_BUS in the standard platform device
> data or a similar mechanism.
There seems to be a lack of information and usage of IORESOURCE_BUS.
arch/x86/pci/broadcom_bus.c seems to create such a resource record,
prints it out and then it is throw away.
drivers/usb/gadget/net2272.c uses it to indicated how much registers
offsets need left shifting when access io memory. Only the blackfin
uses it.
pnp/interface.c etc just prints it and then ignores it.
There is nothing under Documentation about it....
All i could find is:
http://lkml.indiana.edu/hypermail/linux/kernel/1003.0/02515.html
IORESOURCE_BUS is for PCI bus number ranges. For bridge
devices, ACPI reports secondary bus number ranges in _CRS
descriptors, but we currently ignore them. Adding this
resource type will allow us to handle those descriptors in
PNPACPI.
How would you suggest using IORESOURCE_BUS?
Andrew
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 3/5] [orion] Move address map setup out of the drivers and into platform.
2011-11-16 6:59 ` Andrew Lunn
@ 2011-11-16 16:08 ` Nicolas Pitre
2011-11-16 16:49 ` Andrew Lunn
0 siblings, 1 reply; 15+ messages in thread
From: Nicolas Pitre @ 2011-11-16 16:08 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, 16 Nov 2011, Andrew Lunn wrote:
> > > What do you think about the idea of keeping the first two patches,
> > > i.e. *_mbus_dram_info out of mach-* and into plat-orion. Then
> > > providing a function orion_mbus_dram_info() which returns its. Keep
> > > the address map setup code in the drivers, remove struct
> > > mbus_dram_target_info from platform_data and use this function
> > > instead?
> >
> > I pretty much like patch #1. Just remember to mark unneeded data after
> > boot as __initdata.
>
> O.K. I can do that and submit it.
>
> > I don't see the point of patch #2. Having a kirkwood specific piece of
> > data called kirkwood_foo rather than orion_foo makes more sense to me.
>
> Is it kirkwood specific? All plat-orion based systems have one
> mbus_dram_target_info. The structure i would say belongs to orion, but
> the contents to kirkwood. How you use the structure belongs to orion,
> since all the drivers, independent of if they are running on kirkwood,
> dove, mv78xx0, all use it in the same way.
I don't talk about the usage nor the structure definition. I talk about
the SOC specific instances. If one of them contains Kirkwood specific
values, it is normal to call it kirkwood_foo, no? Once you pass a
pointer to that instance then the name doesn't matter, and then this
falls into the usage part.
> > Having a static orion_mbus_dram_info() function might be a problem on
> > other platforms. for example, the mv643xx_eth driver is also used by
> > some PowerPC targets.
>
> That in itself is interesting. I looked at the PowerPC code,
> powerpc/platforms/chrp/pegasos_eth.c &
> powerpc/sysdev/mv64x60_dev.c. No mention of any _mbus_dram_info
> structure.
Exact. You therefore can't just put a call to orion_mbus_dram_info()
fin the driver because there is no such function on PPC.
> Which to me means _mbus_dram_info is an plat-orion thing
> and not an mv643xx_eth thing, so maybe it belongs in the plat-orion?
No, because this is still a driver specific issue. If it were an Orion
specific issue, the setup for all peripherals would be done inside a
single register block with the same register format. As it is, the bus
connection setup is performed by each peripheral block, and there are
even differences between them.
> I guess what will decide it, is when another SoC comes along using
> these devices and needs the address map setup doing differently. Then
> it is clear its a platform thing, not a device thing.
Given that the mbus connection is implemented by the IP block providing
the peripheral function, just like for the PCI connection in some cases,
clearly indicates that this is a driver function.
> > The sata_mv driver is shared between Orion/Kirkwood/Dove SOCs and
> > Marvell SATA controllers on PCI cards that can be found on any
> > architecture with a PCI bus. Etc. It is therefore necessary to
> > query those resources in a standard way and be prepared for the fact
> > that they might just be absent. So I'd suggest looking at the
> > possibility of using IORESOURCE_BUS in the standard platform device
> > data or a similar mechanism.
>
> How would you suggest using IORESOURCE_BUS?
Looking at it closer, I don't think simple resource ranges would be
suitable after all.
I would therefore suggest the following starting point:
diff --git a/include/linux/mbus.h b/include/linux/mbus.h
index c11ff29325..2d8989c6e4 100644
--- a/include/linux/mbus.h
+++ b/include/linux/mbus.h
@@ -32,5 +32,17 @@ struct mbus_dram_target_info
} cs[4];
};
+/*
+ * The Marvell mbus is to be found only on SOCs from the Orion family
+ * at the moment. Provide a dummy stub for other architectures.
+ */
+#ifdef CONFIG_PLAT_ORION
+extern const struct mbus_dram_target_info *mrvl_mbus_dram_info(void);
+#else
+static inline const struct mbus_dram_target_info *mrvl_mbus_dram_info(void)
+{
+ return NULL;
+}
+#endif
#endif
And then the driver code could call this and test the returned pointer
instead of dev->platform_data.
However I still have doubts on the usefulness of this exercice. There
are often more than just this mbus stuff to be found into platform data
structures anyway. things like number of ports, PHY addresses, etc.
Eventually, those parameters should be retrieved from a device tree, and
probably the mbus parameters should be retrieved from there as well.
Until then, I don't think we gain much from changing the existing
platform data method.
Nicolas
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 3/5] [orion] Move address map setup out of the drivers and into platform.
2011-11-16 16:08 ` Nicolas Pitre
@ 2011-11-16 16:49 ` Andrew Lunn
2011-11-16 17:18 ` Michael Walle
2011-11-16 17:25 ` Nicolas Pitre
0 siblings, 2 replies; 15+ messages in thread
From: Andrew Lunn @ 2011-11-16 16:49 UTC (permalink / raw)
To: linux-arm-kernel
> > How would you suggest using IORESOURCE_BUS?
>
> Looking at it closer, I don't think simple resource ranges would be
> suitable after all.
>
> I would therefore suggest the following starting point:
>
> diff --git a/include/linux/mbus.h b/include/linux/mbus.h
> index c11ff29325..2d8989c6e4 100644
> --- a/include/linux/mbus.h
> +++ b/include/linux/mbus.h
> @@ -32,5 +32,17 @@ struct mbus_dram_target_info
> } cs[4];
> };
>
> +/*
> + * The Marvell mbus is to be found only on SOCs from the Orion family
> + * at the moment. Provide a dummy stub for other architectures.
> + */
> +#ifdef CONFIG_PLAT_ORION
> +extern const struct mbus_dram_target_info *mrvl_mbus_dram_info(void);
> +#else
> +static inline const struct mbus_dram_target_info *mrvl_mbus_dram_info(void)
> +{
> + return NULL;
> +}
> +#endif
>
> #endif
>
So you are suggesting each mach-* implements this function and returns
its specific *_dram_target_info structure? Four functions which are
virtually identical. I would probably just have orion_dram_target_info
in the plat-orion which all mach-* use and one implementation of this
function in plat-oriom.
> However I still have doubts on the usefulness of this exercice. There
> are often more than just this mbus stuff to be found into platform data
> structures anyway. things like number of ports, PHY addresses, etc.
> Eventually, those parameters should be retrieved from a device tree, and
> probably the mbus parameters should be retrieved from there as well.
I agree about ports, PHY addresses, etc. They are all a property of
the hardware, and belong in device tree. However the memory address of
*_dram_target_info does not belong in the device true.
> Until then, I don't think we gain much from changing the existing
> platform data method.
I'm just trying to move towards device tree. *_dram_target_info is one
thing which is blocking this move. The second maybe the clock
speed. It would be nice to move to clkdev, and remove clk from the
platform_data structures.
Do you see a better way to move toward device tree for orion?
Andrew
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 3/5] [orion] Move address map setup out of the drivers and into platform.
2011-11-16 16:49 ` Andrew Lunn
@ 2011-11-16 17:18 ` Michael Walle
2011-11-16 17:25 ` Nicolas Pitre
1 sibling, 0 replies; 15+ messages in thread
From: Michael Walle @ 2011-11-16 17:18 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, November 16, 2011 17:49, Andrew Lunn wrote:
> So you are suggesting each mach-* implements this function and returns
> its specific *_dram_target_info structure? Four functions which are
> virtually identical. I would probably just have orion_dram_target_info
> in the plat-orion which all mach-* use and one implementation of this
> function in plat-oriom.
>
>> However I still have doubts on the usefulness of this exercice. There
>> are often more than just this mbus stuff to be found into platform data
>> structures anyway. things like number of ports, PHY addresses, etc.
>> Eventually, those parameters should be retrieved from a device tree, and
>> probably the mbus parameters should be retrieved from there as well.
>
> I agree about ports, PHY addresses, etc. They are all a property of
> the hardware, and belong in device tree. However the memory address of
> *_dram_target_info does not belong in the device true.
i agree.
OTOH we could say, we define a generic mapping in the device tree. If i
understood it correctly, there is only one mapping in use atm, which maps
in the main memory (which properties are passed by the _dram_target_info).
So instead of this specific use case, provide a generic one, basically the
contents which are written into the window control and base registers. Sth
like that:
ethernet {
range = <..>;
interrupts = <..>;
memory-map = <base0 size0 target0 attr0 /* main memory */
base1 size1 target1 attr1 /* flash */
base2 size2 target2 attr2>; /* dunno */
};
>> Until then, I don't think we gain much from changing the existing
>> platform data method.
>
> I'm just trying to move towards device tree. *_dram_target_info is one
> thing which is blocking this move. The second maybe the clock
> speed. It would be nice to move to clkdev, and remove clk from the
> platform_data structures.
i worked around the clock by defining a frequency property per device,
atm. Ah and disable the clock gating, which i think the clock api will
solve, too.
> Do you see a better way to move toward device tree for orion?
i'll post my kirkwood dts patches as RFC soon on this mailinglist. For
those who are interested in them in the meanwhile can have a look at my
git repository at:
https://github.com/mwalle/linux/tree/kirkwood-devtree
btw. i imported andrews patches.
--
Michael
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 3/5] [orion] Move address map setup out of the drivers and into platform.
2011-11-16 16:49 ` Andrew Lunn
2011-11-16 17:18 ` Michael Walle
@ 2011-11-16 17:25 ` Nicolas Pitre
1 sibling, 0 replies; 15+ messages in thread
From: Nicolas Pitre @ 2011-11-16 17:25 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, 16 Nov 2011, Andrew Lunn wrote:
> > > How would you suggest using IORESOURCE_BUS?
> >
> > Looking at it closer, I don't think simple resource ranges would be
> > suitable after all.
> >
> > I would therefore suggest the following starting point:
> >
> > diff --git a/include/linux/mbus.h b/include/linux/mbus.h
> > index c11ff29325..2d8989c6e4 100644
> > --- a/include/linux/mbus.h
> > +++ b/include/linux/mbus.h
> > @@ -32,5 +32,17 @@ struct mbus_dram_target_info
> > } cs[4];
> > };
> >
> > +/*
> > + * The Marvell mbus is to be found only on SOCs from the Orion family
> > + * at the moment. Provide a dummy stub for other architectures.
> > + */
> > +#ifdef CONFIG_PLAT_ORION
> > +extern const struct mbus_dram_target_info *mrvl_mbus_dram_info(void);
> > +#else
> > +static inline const struct mbus_dram_target_info *mrvl_mbus_dram_info(void)
> > +{
> > + return NULL;
> > +}
> > +#endif
> >
> > #endif
> >
>
> So you are suggesting each mach-* implements this function and returns
> its specific *_dram_target_info structure? Four functions which are
> virtually identical. I would probably just have orion_dram_target_info
> in the plat-orion which all mach-* use and one implementation of this
> function in plat-oriom.
OK then, let's see how this would look like.
> I'm just trying to move towards device tree. *_dram_target_info is one
> thing which is blocking this move. The second maybe the clock
> speed. It would be nice to move to clkdev, and remove clk from the
> platform_data structures.
Absolutely! And that would allow for turning on/off the various clocks
dynamically with actual driver usage.
Nicolas
^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2011-11-16 17:25 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2011-11-12 20:00 [PATCH 0/5] Move mbus setup code out of drivers and into platform Andrew Lunn
2011-11-12 20:00 ` [PATCH 1/5] [orion] Consolidate the address map setup on Orion based platforms Andrew Lunn
2011-11-12 20:00 ` [PATCH 2/5] [orion] Move the *_mbus_dram_info structure into the orion platform and call it orion_mbus_dram_info everywhere Andrew Lunn
2011-11-12 20:00 ` [PATCH 3/5] [orion] Move address map setup out of the drivers and into platform Andrew Lunn
2011-11-13 20:53 ` Michael Walle
2011-11-15 0:06 ` Nicolas Pitre
2011-11-15 7:41 ` Andrew Lunn
2011-11-15 22:14 ` Nicolas Pitre
2011-11-16 6:59 ` Andrew Lunn
2011-11-16 16:08 ` Nicolas Pitre
2011-11-16 16:49 ` Andrew Lunn
2011-11-16 17:18 ` Michael Walle
2011-11-16 17:25 ` Nicolas Pitre
2011-11-12 20:00 ` [PATCH 4/5] [orion] Remove address map info from all platform data strucutures Andrew Lunn
2011-11-12 20:00 ` [PATCH 5/5] [orion] Consolidate the address map setup code Andrew Lunn
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