From: catalin.marinas@arm.com (Catalin Marinas)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v9 15/15] ARM: LPAE: Add the Kconfig entries
Date: Mon, 14 Nov 2011 16:23:51 +0000 [thread overview]
Message-ID: <1321287831-24560-16-git-send-email-catalin.marinas@arm.com> (raw)
In-Reply-To: <1321287831-24560-1-git-send-email-catalin.marinas@arm.com>
This patch adds the ARM_LPAE and ARCH_PHYS_ADDR_T_64BIT Kconfig entries
allowing LPAE support to be compiled into the kernel.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
---
arch/arm/Kconfig | 2 +-
arch/arm/mm/Kconfig | 17 +++++++++++++++++
2 files changed, 18 insertions(+), 1 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 44789ef..885c04e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1959,7 +1959,7 @@ endchoice
config XIP_KERNEL
bool "Kernel Execute-In-Place from ROM"
- depends on !ZBOOT_ROM
+ depends on !ZBOOT_ROM && !ARM_LPAE
help
Execute-In-Place allows the kernel to run from non-volatile storage
directly addressable by the CPU, such as NOR flash. This saves RAM
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 67f75a0..5cf7922 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -629,6 +629,23 @@ config IO_36
comment "Processor Features"
+config ARM_LPAE
+ bool "Support for the Large Physical Address Extension"
+ depends on MMU && CPU_V7
+ help
+ Say Y if you have an ARMv7 processor supporting the LPAE page
+ table format and you would like to access memory beyond the
+ 4GB limit. The resulting kernel image will not run on
+ processors without the LPA extension.
+
+ If unsure, say N.
+
+config ARCH_PHYS_ADDR_T_64BIT
+ def_bool ARM_LPAE
+
+config ARCH_DMA_ADDR_T_64BIT
+ bool
+
config ARM_THUMB
bool "Support Thumb user binaries"
depends on CPU_ARM720T || CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_V6 || CPU_V6K || CPU_V7 || CPU_FEROCEON
prev parent reply other threads:[~2011-11-14 16:23 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-11-14 16:23 [PATCH v9 00/15] ARM: Add support for the Large Physical Address Extensions Catalin Marinas
2011-11-14 16:23 ` [PATCH v9 01/15] ARM: pgtable: Fix compiler warning in ioremap.c introduced by nopud Catalin Marinas
2011-11-14 16:23 ` [PATCH v9 02/15] ARM: pgtable: switch to use pgtable-nopud.h Catalin Marinas
2011-11-14 16:23 ` [PATCH v9 03/15] ARM: LPAE: Move page table maintenance macros to pgtable-2level.h Catalin Marinas
2011-11-14 16:23 ` [PATCH v9 04/15] ARM: LPAE: Move the FSR definitions to separate files Catalin Marinas
2011-11-14 16:23 ` [PATCH v9 05/15] ARM: LPAE: Factor out classic-MMU specific code into proc-v7-2level.S Catalin Marinas
2011-11-14 16:23 ` [PATCH v9 06/15] ARM: LPAE: add ISBs around MMU enabling code Catalin Marinas
2011-11-14 16:23 ` [PATCH v9 07/15] ARM: LPAE: Introduce the 3-level page table format definitions Catalin Marinas
2011-11-14 16:23 ` [PATCH v9 08/15] ARM: LPAE: Page table maintenance for the 3-level format Catalin Marinas
2011-11-14 16:23 ` [PATCH v9 09/15] ARM: LPAE: MMU setup for the 3-level page table format Catalin Marinas
2011-11-14 16:23 ` [PATCH v9 10/15] ARM: LPAE: Invalidate the TLB before freeing the PMD Catalin Marinas
2011-11-14 16:23 ` [PATCH v9 11/15] ARM: LPAE: Add fault handling support Catalin Marinas
2011-11-14 16:23 ` [PATCH v9 12/15] ARM: LPAE: Add context switching support Catalin Marinas
2011-11-14 16:23 ` [PATCH v9 13/15] ARM: LPAE: Add identity mapping support for the 3-level page table format Catalin Marinas
2011-11-14 16:23 ` [PATCH v9 14/15] ARM: LPAE: mark memory banks with start > ULONG_MAX as highmem Catalin Marinas
2011-11-14 16:23 ` Catalin Marinas [this message]
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