From mboxrd@z Thu Jan  1 00:00:00 1970
From: richard.zhao@linaro.org (Richard Zhao)
Date: Wed, 23 Nov 2011 19:12:27 +0800
Subject: [RFC V1 0/8] imx5 clock port to Mike's clkv3
Message-ID: <1322046755-13511-1-git-send-email-richard.zhao@linaro.org>
To: linux-arm-kernel@lists.infradead.org
List-Id: linux-arm-kernel.lists.infradead.org

This work took Sascha's common clk work as a start, and port to Mike's
generic clk v3 patch.

clock tree topology:
.
??? ckih1
??? ??? ssi_lp_apm
??? ckih2
??? ckil
??? dummy
??? ??? emi_fast_gate
??? osc
    ??? lp_apm
    ??? ??? periph_apm
    ??? ??? step_clk
    ??? pll1
    ??? ??? pll1_sw
    ???     ??? cpu_podf
    ??? pll2
    ??? ??? pll2_sw
    ??? ??? ??? esdhc1_sel
    ??? ??? ??? ??? esdhc1_pred
    ??? ??? ???     ??? esdhc1_podf
    ??? ??? ???         ??? esdhc1_per_gate
    ??? ??? ???         ??? esdhc3_sel
    ??? ??? ???         ??? ??? esdhc2_per_gate
    ??? ??? ???         ??? esdhc4_sel
    ??? ??? ???             ??? esdhc4_per_gate
    ??? ??? ??? esdhc2_sel
    ??? ??? ??? ??? esdhc2_pred
    ??? ??? ???     ??? esdhc2_podf
    ??? ??? ???         ??? esdhc3_per_gate
    ??? ??? ??? main_bus
    ??? ??? ??? ??? ahb_root
    ??? ??? ??? ??? ??? ipg
    ??? ??? ??? ???     ??? ahb_max
    ??? ??? ??? ???     ??? ahbmux1
    ??? ??? ??? ???     ??? aips_tz1
    ??? ??? ??? ???     ??? aips_tz2
    ??? ??? ??? ???     ??? cspi_ipg_gate
    ??? ??? ??? ???     ??? ecspi1_ipg_gate
    ??? ??? ??? ???     ??? ecspi2_ipg_gate
    ??? ??? ??? ???     ??? esdhc1_ipg_gate
    ??? ??? ??? ???     ??? esdhc2_ipg_gate
    ??? ??? ??? ???     ??? esdhc3_ipg_gate
    ??? ??? ??? ???     ??? esdhc4_ipg_gate
    ??? ??? ??? ???     ??? fec_gate
    ??? ??? ??? ???     ??? gpt_gate
    ??? ??? ??? ???     ??? gpt_ipg_gate
    ??? ??? ??? ???     ??? iim_gate
    ??? ??? ??? ???     ??? pwm1_ipg_gate
    ??? ??? ??? ???     ??? pwm2_ipg_gate
    ??? ??? ??? ???     ??? sdma_gate
    ??? ??? ??? ???     ??? ssi1_ipg_gate
    ??? ??? ??? ???     ??? ssi2_ipg_gate
    ??? ??? ??? ???     ??? ssi3_ipg_gate
    ??? ??? ??? ???     ??? uart1_ipg_gate
    ??? ??? ??? ???     ??? uart2_ipg_gate
    ??? ??? ??? ???     ??? uart3_ipg_gate
    ??? ??? ??? ???     ??? usboh3_ahb_gate
    ??? ??? ??? ??? axi_a
    ??? ??? ??? ??? ??? ddr_root
    ??? ??? ??? ??? axi_b
    ??? ??? ??? ??? ??? arm_axi
    ??? ??? ??? ??? ??? gpu
    ??? ??? ??? ??? ??? gpu2d
    ??? ??? ??? ??? ??? ipu_hsp
    ??? ??? ??? ??? ??? ??? ipu_gate
    ??? ??? ??? ??? ??? vpu_axi_root
    ??? ??? ??? ??? emi_sel
    ??? ??? ??? ??? ??? emi_slow_podf
    ??? ??? ??? ???     ??? emi_slow_gate
    ??? ??? ??? ???     ??? nfc_podf
    ??? ??? ??? ???         ??? nfc_gate
    ??? ??? ??? ??? perclk_lp_apm
    ??? ??? ???     ??? perclk_pred1
    ??? ??? ???         ??? perclk_pred2
    ??? ??? ???             ??? perclk_podf
    ??? ??? ???                 ??? ipg_perclk
    ??? ??? ???                     ??? i2c1_gate
    ??? ??? ???                     ??? i2c2_gate
    ??? ??? ???                     ??? pwm1_hf_gate
    ??? ??? ???                     ??? pwm2_hf_gate
    ??? ??? ??? uart_sel
    ??? ???     ??? uart_pred
    ??? ???         ??? uart_root
    ??? ???             ??? uart1_per_gate
    ??? ???             ??? uart2_per_gate
    ??? ???             ??? uart3_per_gate
    ??? ??? step_pll2_div
    ??? pll3
    ??? ??? pll3_sw
    ??? ??? ??? ecspi_sel
    ??? ??? ??? ??? ecspi_pred
    ??? ??? ???     ??? ecspi_podf
    ??? ??? ???         ??? ecspi1_per_gate
    ??? ??? ???         ??? ecspi2_per_gate
    ??? ??? ??? ipu_di0_sel
    ??? ??? ??? ??? ipu_di0_gate
    ??? ??? ??? ipu_di1_sel
    ??? ??? ??? ??? ipu_di1_gate
    ??? ??? ??? ssi1_clk_sel
    ??? ??? ??? ??? ssi1_clk_pred
    ??? ??? ???     ??? ssi1_clk
    ??? ??? ???         ??? ssi1_gate
    ??? ??? ???         ??? ssi3_clk
    ??? ??? ???             ??? ssi3_gate
    ??? ??? ??? ssi2_clk_sel
    ??? ??? ??? ??? ssi2_clk_pred
    ??? ??? ???     ??? ssi2_clk
    ??? ??? ???         ??? ssi2_gate
    ??? ??? ??? usboh3_sel
    ??? ??? ??? ??? usboh3_pred
    ??? ??? ???     ??? usboh3_podf
    ??? ??? ???         ??? usboh3_gate
    ??? ??? ??? usb_phy_pred
    ??? ???     ??? usb_phy_podf
    ??? ??? step_pll3_div
    ??? pll4
    ??? ??? pll4_sw
    ???     ??? tve_ext_sel
    ???         ??? tve_pred
    ???             ??? tve_gate
    ???             ??? tve_sel
    ??? usb_phy_sel
        ??? mx53_usb_phy1_gate
        ??? mx53_usb_phy2_gate


Thanks
Richard