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From: amit.kachhap@linaro.org (Amit Daniel Kachhap)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V4 5/5] ARM: exynos: Enable l2 configuration through device tree
Date: Mon,  5 Dec 2011 16:36:12 +0530	[thread overview]
Message-ID: <1323083172-14096-6-git-send-email-amit.kachhap@linaro.org> (raw)
In-Reply-To: <1323083172-14096-1-git-send-email-amit.kachhap@linaro.org>

This patch enables calling generic l2 setup functions if device tree is used.

Signed-off-by: Amit Daniel Kachhap <amit.kachhap@linaro.org>
---
 arch/arm/mach-exynos/cpu.c |   12 ++++++++++--
 1 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-exynos/cpu.c b/arch/arm/mach-exynos/cpu.c
index 252e346..b62a90f 100644
--- a/arch/arm/mach-exynos/cpu.c
+++ b/arch/arm/mach-exynos/cpu.c
@@ -37,6 +37,9 @@
 #include <mach/regs-pmu.h>
 #include <mach/pmu.h>
 
+#define L2_AUX_VAL 0x7C470001
+#define L2_AUX_MASK 0xC200ffff
+
 unsigned int gic_bank_offset __read_mostly;
 
 extern int combiner_init(unsigned int combiner_nr, void __iomem *base,
@@ -299,6 +302,7 @@ core_initcall(exynos4_core_init);
 #ifdef CONFIG_CACHE_L2X0
 static int __init exynos4_l2x0_cache_init(void)
 {
+#ifndef CONFIG_OF
 	if (!(__raw_readl(S5P_VA_L2CC + L2X0_CTRL) & 0x1)) {
 		l2x0_saved_regs.phy_base = EXYNOS4_PA_L2CC;
 		/* TAG, Data Latency Control: 2 cycles */
@@ -332,8 +336,12 @@ static int __init exynos4_l2x0_cache_init(void)
 		clean_dcache_area(&l2x0_saved_regs, sizeof(struct l2x0_regs));
 	}
 
-	l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff);
-
+	l2x0_init(S5P_VA_L2CC, L2_AUX_VAL, L2_AUX_MASK);
+#else
+	l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK);
+	l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs);
+	clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long));
+#endif
 	return 0;
 }
 
-- 
1.7.1

  parent reply	other threads:[~2011-12-05 11:06 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-12-05 11:06 [PATCH V4 0/5] ARM: exynos: Add l2 retention mode cpuidle state Amit Daniel Kachhap
2011-12-05 11:06 ` [PATCH V4 1/5] ARM: exynos: Add support AFTR mode on EXYNOS4210 Amit Daniel Kachhap
2011-12-05 11:06 ` [PATCH V4 2/5] ARM: exynos: save L2 settings during bootup Amit Daniel Kachhap
2011-12-05 11:06 ` [PATCH V4 3/5] ARM: s5p: add L2 early resume code Amit Daniel Kachhap
2011-12-05 11:06 ` [PATCH V4 4/5] ARM: exynos: remove useless code to save/restore L2 Amit Daniel Kachhap
2011-12-05 11:06 ` Amit Daniel Kachhap [this message]
2012-01-03  6:22 ` [PATCH V4 0/5] ARM: exynos: Add l2 retention mode cpuidle state amit kachhap
2012-01-03 13:22   ` Kukjin Kim
2012-01-05  4:26     ` Amit Kachhap

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