* [PATCH v4 1/7] ARM: local timers: reserve local_timer_register() to SMP
2012-04-27 12:55 [GIT PULL][PATCH v4 0/7] A7/A15 architected timer support Marc Zyngier
@ 2012-04-27 12:55 ` Marc Zyngier
2012-04-27 12:55 ` [PATCH v4 2/7] ARM: local timers: Add A15 architected timer support Marc Zyngier
` (5 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Marc Zyngier @ 2012-04-27 12:55 UTC (permalink / raw)
To: linux-arm-kernel
When running an SMP_ON_UP enabled kernel on UP, or with nosmp
passed to the kernel, we want to be able to detect that a local
timer is not going to be used (local timers are only used on
SMP platforms), so we could register it as a global timer instead.
Return -ENXIO when the above case is detected.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/kernel/smp.c | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index addbbe8..11c4148 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -454,6 +454,9 @@ static struct local_timer_ops *lt_ops;
#ifdef CONFIG_LOCAL_TIMERS
int local_timer_register(struct local_timer_ops *ops)
{
+ if (!is_smp() || !setup_max_cpus)
+ return -ENXIO;
+
if (lt_ops)
return -EBUSY;
--
1.7.7.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v4 2/7] ARM: local timers: Add A15 architected timer support
2012-04-27 12:55 [GIT PULL][PATCH v4 0/7] A7/A15 architected timer support Marc Zyngier
2012-04-27 12:55 ` [PATCH v4 1/7] ARM: local timers: reserve local_timer_register() to SMP Marc Zyngier
@ 2012-04-27 12:55 ` Marc Zyngier
2012-04-27 12:55 ` [PATCH v4 3/7] ARM: architected timers: Add A15 specific sched_clock implementation Marc Zyngier
` (4 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Marc Zyngier @ 2012-04-27 12:55 UTC (permalink / raw)
To: linux-arm-kernel
Add support for the A15 generic timer and clocksource.
As the timer generates interrupts on a different PPI depending
on the execution mode (normal or secure), it is possible to
register two different PPIs.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/Kconfig | 6 +
arch/arm/include/asm/arch_timer.h | 19 +++
arch/arm/kernel/Makefile | 1 +
arch/arm/kernel/arch_timer.c | 288 +++++++++++++++++++++++++++++++++++++
4 files changed, 314 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch_timer.h
create mode 100644 arch/arm/kernel/arch_timer.c
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index cf006d4..4faabba 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1543,6 +1543,12 @@ config HAVE_ARM_SCU
help
This option enables support for the ARM system coherency unit
+config ARM_ARCH_TIMER
+ bool "Architected timer support"
+ depends on CPU_V7
+ help
+ This option enables support for the ARM architected timer
+
config HAVE_ARM_TWD
bool
depends on SMP
diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h
new file mode 100644
index 0000000..827305d
--- /dev/null
+++ b/arch/arm/include/asm/arch_timer.h
@@ -0,0 +1,19 @@
+#ifndef __ASMARM_ARCH_TIMER_H
+#define __ASMARM_ARCH_TIMER_H
+
+#include <linux/ioport.h>
+
+struct arch_timer {
+ struct resource res[2];
+};
+
+#ifdef CONFIG_ARM_ARCH_TIMER
+int arch_timer_register(struct arch_timer *);
+#else
+static inline int arch_timer_register(struct arch_timer *at)
+{
+ return -ENXIO;
+}
+#endif
+
+#endif
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 7b787d6..22b0f1e 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -34,6 +34,7 @@ obj-$(CONFIG_ARM_CPU_SUSPEND) += sleep.o suspend.o
obj-$(CONFIG_SMP) += smp.o smp_tlb.o
obj-$(CONFIG_HAVE_ARM_SCU) += smp_scu.o
obj-$(CONFIG_HAVE_ARM_TWD) += smp_twd.o
+obj-$(CONFIG_ARM_ARCH_TIMER) += arch_timer.o
obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o insn.o
obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o insn.o
obj-$(CONFIG_JUMP_LABEL) += jump_label.o insn.o patch.o
diff --git a/arch/arm/kernel/arch_timer.c b/arch/arm/kernel/arch_timer.c
new file mode 100644
index 0000000..bb9a8b4
--- /dev/null
+++ b/arch/arm/kernel/arch_timer.c
@@ -0,0 +1,288 @@
+/*
+ * linux/arch/arm/kernel/arch_timer.c
+ *
+ * Copyright (C) 2011 ARM Ltd.
+ * All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/smp.h>
+#include <linux/cpu.h>
+#include <linux/jiffies.h>
+#include <linux/clockchips.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+
+#include <asm/cputype.h>
+#include <asm/localtimer.h>
+#include <asm/arch_timer.h>
+#include <asm/system_info.h>
+
+static unsigned long arch_timer_rate;
+static int arch_timer_ppi;
+static int arch_timer_ppi2;
+
+static struct clock_event_device __percpu **arch_timer_evt;
+
+/*
+ * Architected system timer support.
+ */
+
+#define ARCH_TIMER_CTRL_ENABLE (1 << 0)
+#define ARCH_TIMER_CTRL_IT_MASK (1 << 1)
+#define ARCH_TIMER_CTRL_IT_STAT (1 << 2)
+
+#define ARCH_TIMER_REG_CTRL 0
+#define ARCH_TIMER_REG_FREQ 1
+#define ARCH_TIMER_REG_TVAL 2
+
+static void arch_timer_reg_write(int reg, u32 val)
+{
+ switch (reg) {
+ case ARCH_TIMER_REG_CTRL:
+ asm volatile("mcr p15, 0, %0, c14, c2, 1" : : "r" (val));
+ break;
+ case ARCH_TIMER_REG_TVAL:
+ asm volatile("mcr p15, 0, %0, c14, c2, 0" : : "r" (val));
+ break;
+ }
+
+ isb();
+}
+
+static u32 arch_timer_reg_read(int reg)
+{
+ u32 val;
+
+ switch (reg) {
+ case ARCH_TIMER_REG_CTRL:
+ asm volatile("mrc p15, 0, %0, c14, c2, 1" : "=r" (val));
+ break;
+ case ARCH_TIMER_REG_FREQ:
+ asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (val));
+ break;
+ case ARCH_TIMER_REG_TVAL:
+ asm volatile("mrc p15, 0, %0, c14, c2, 0" : "=r" (val));
+ break;
+ default:
+ BUG();
+ }
+
+ return val;
+}
+
+static irqreturn_t arch_timer_handler(int irq, void *dev_id)
+{
+ struct clock_event_device *evt = *(struct clock_event_device **)dev_id;
+ unsigned long ctrl;
+
+ ctrl = arch_timer_reg_read(ARCH_TIMER_REG_CTRL);
+ if (ctrl & ARCH_TIMER_CTRL_IT_STAT) {
+ ctrl |= ARCH_TIMER_CTRL_IT_MASK;
+ arch_timer_reg_write(ARCH_TIMER_REG_CTRL, ctrl);
+ evt->event_handler(evt);
+ return IRQ_HANDLED;
+ }
+
+ return IRQ_NONE;
+}
+
+static void arch_timer_disable(void)
+{
+ unsigned long ctrl;
+
+ ctrl = arch_timer_reg_read(ARCH_TIMER_REG_CTRL);
+ ctrl &= ~ARCH_TIMER_CTRL_ENABLE;
+ arch_timer_reg_write(ARCH_TIMER_REG_CTRL, ctrl);
+}
+
+static void arch_timer_set_mode(enum clock_event_mode mode,
+ struct clock_event_device *clk)
+{
+ switch (mode) {
+ case CLOCK_EVT_MODE_UNUSED:
+ case CLOCK_EVT_MODE_SHUTDOWN:
+ arch_timer_disable();
+ break;
+ default:
+ break;
+ }
+}
+
+static int arch_timer_set_next_event(unsigned long evt,
+ struct clock_event_device *unused)
+{
+ unsigned long ctrl;
+
+ ctrl = arch_timer_reg_read(ARCH_TIMER_REG_CTRL);
+ ctrl |= ARCH_TIMER_CTRL_ENABLE;
+ ctrl &= ~ARCH_TIMER_CTRL_IT_MASK;
+
+ arch_timer_reg_write(ARCH_TIMER_REG_TVAL, evt);
+ arch_timer_reg_write(ARCH_TIMER_REG_CTRL, ctrl);
+
+ return 0;
+}
+
+static int __cpuinit arch_timer_setup(struct clock_event_device *clk)
+{
+ /* Be safe... */
+ arch_timer_disable();
+
+ clk->features = CLOCK_EVT_FEAT_ONESHOT;
+ clk->name = "arch_sys_timer";
+ clk->rating = 450;
+ clk->set_mode = arch_timer_set_mode;
+ clk->set_next_event = arch_timer_set_next_event;
+ clk->irq = arch_timer_ppi;
+
+ clockevents_config_and_register(clk, arch_timer_rate,
+ 0xf, 0x7fffffff);
+
+ *__this_cpu_ptr(arch_timer_evt) = clk;
+
+ enable_percpu_irq(clk->irq, 0);
+ if (arch_timer_ppi2)
+ enable_percpu_irq(arch_timer_ppi2, 0);
+
+ return 0;
+}
+
+/* Is the optional system timer available? */
+static int local_timer_is_architected(void)
+{
+ return (cpu_architecture() >= CPU_ARCH_ARMv7) &&
+ ((read_cpuid_ext(CPUID_EXT_PFR1) >> 16) & 0xf) == 1;
+}
+
+static int arch_timer_available(void)
+{
+ unsigned long freq;
+
+ if (!local_timer_is_architected())
+ return -ENXIO;
+
+ if (arch_timer_rate == 0) {
+ arch_timer_reg_write(ARCH_TIMER_REG_CTRL, 0);
+ freq = arch_timer_reg_read(ARCH_TIMER_REG_FREQ);
+
+ /* Check the timer frequency. */
+ if (freq == 0) {
+ pr_warn("Architected timer frequency not available\n");
+ return -EINVAL;
+ }
+
+ arch_timer_rate = freq;
+ }
+
+ pr_info_once("Architected local timer running at %lu.%02luMHz.\n",
+ arch_timer_rate / 1000000, (arch_timer_rate / 10000) % 100);
+ return 0;
+}
+
+static inline cycle_t arch_counter_get_cntpct(void)
+{
+ u32 cvall, cvalh;
+
+ asm volatile("mrrc p15, 0, %0, %1, c14" : "=r" (cvall), "=r" (cvalh));
+
+ return ((cycle_t) cvalh << 32) | cvall;
+}
+
+static inline cycle_t arch_counter_get_cntvct(void)
+{
+ u32 cvall, cvalh;
+
+ asm volatile("mrrc p15, 1, %0, %1, c14" : "=r" (cvall), "=r" (cvalh));
+
+ return ((cycle_t) cvalh << 32) | cvall;
+}
+
+static cycle_t arch_counter_read(struct clocksource *cs)
+{
+ return arch_counter_get_cntpct();
+}
+
+static struct clocksource clocksource_counter = {
+ .name = "arch_sys_counter",
+ .rating = 400,
+ .read = arch_counter_read,
+ .mask = CLOCKSOURCE_MASK(56),
+ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
+static void __cpuinit arch_timer_stop(struct clock_event_device *clk)
+{
+ pr_debug("arch_timer_teardown disable IRQ%d cpu #%d\n",
+ clk->irq, smp_processor_id());
+ disable_percpu_irq(clk->irq);
+ if (arch_timer_ppi2)
+ disable_percpu_irq(arch_timer_ppi2);
+ arch_timer_set_mode(CLOCK_EVT_MODE_UNUSED, clk);
+}
+
+static struct local_timer_ops arch_timer_ops __cpuinitdata = {
+ .setup = arch_timer_setup,
+ .stop = arch_timer_stop,
+};
+
+int __init arch_timer_register(struct arch_timer *at)
+{
+ int err;
+
+ if (at->res[0].start <= 0 || !(at->res[0].flags & IORESOURCE_IRQ))
+ return -EINVAL;
+
+ err = arch_timer_available();
+ if (err)
+ return err;
+
+ arch_timer_evt = alloc_percpu(struct clock_event_device *);
+ if (!arch_timer_evt)
+ return -ENOMEM;
+
+ clocksource_register_hz(&clocksource_counter, arch_timer_rate);
+
+ arch_timer_ppi = at->res[0].start;
+ err = request_percpu_irq(arch_timer_ppi, arch_timer_handler,
+ "arch_timer", arch_timer_evt);
+ if (err) {
+ pr_err("arch_timer: can't register interrupt %d (%d)\n",
+ arch_timer_ppi, err);
+ goto out_free;
+ }
+
+ if (at->res[1].start > 0 || (at->res[1].flags & IORESOURCE_IRQ)) {
+ arch_timer_ppi2 = at->res[1].start;
+ err = request_percpu_irq(arch_timer_ppi2, arch_timer_handler,
+ "arch_timer", arch_timer_evt);
+ if (err) {
+ pr_err("arch_timer: can't register interrupt %d (%d)\n",
+ arch_timer_ppi2, err);
+ arch_timer_ppi2 = 0;
+ goto out_free_irq;
+ }
+ }
+
+ err = local_timer_register(&arch_timer_ops);
+ if (err)
+ goto out_free_irq;
+
+ return 0;
+
+out_free_irq:
+ free_percpu_irq(arch_timer_ppi, arch_timer_evt);
+ if (arch_timer_ppi2)
+ free_percpu_irq(arch_timer_ppi2, arch_timer_evt);
+
+out_free:
+ free_percpu(arch_timer_evt);
+
+ return err;
+}
--
1.7.7.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v4 3/7] ARM: architected timers: Add A15 specific sched_clock implementation
2012-04-27 12:55 [GIT PULL][PATCH v4 0/7] A7/A15 architected timer support Marc Zyngier
2012-04-27 12:55 ` [PATCH v4 1/7] ARM: local timers: reserve local_timer_register() to SMP Marc Zyngier
2012-04-27 12:55 ` [PATCH v4 2/7] ARM: local timers: Add A15 architected timer support Marc Zyngier
@ 2012-04-27 12:55 ` Marc Zyngier
2012-04-27 12:55 ` [PATCH v4 4/7] ARM: architected timers: add DT support Marc Zyngier
` (3 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Marc Zyngier @ 2012-04-27 12:55 UTC (permalink / raw)
To: linux-arm-kernel
Provide an A15 sched_clock implementation using the virtual counter,
which is thought to be more useful than the physical one in a
virtualised environment, as it can offset the time spent in another
VM or the hypervisor.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/include/asm/arch_timer.h | 6 ++++++
arch/arm/kernel/arch_timer.c | 25 +++++++++++++++++++++++++
2 files changed, 31 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h
index 827305d..dc008c6 100644
--- a/arch/arm/include/asm/arch_timer.h
+++ b/arch/arm/include/asm/arch_timer.h
@@ -9,11 +9,17 @@ struct arch_timer {
#ifdef CONFIG_ARM_ARCH_TIMER
int arch_timer_register(struct arch_timer *);
+int arch_timer_sched_clock_init(void);
#else
static inline int arch_timer_register(struct arch_timer *at)
{
return -ENXIO;
}
+
+static inline int arch_timer_sched_clock_init(void)
+{
+ return -ENXIO;
+}
#endif
#endif
diff --git a/arch/arm/kernel/arch_timer.c b/arch/arm/kernel/arch_timer.c
index bb9a8b4..dd90704 100644
--- a/arch/arm/kernel/arch_timer.c
+++ b/arch/arm/kernel/arch_timer.c
@@ -23,6 +23,7 @@
#include <asm/localtimer.h>
#include <asm/arch_timer.h>
#include <asm/system_info.h>
+#include <asm/sched_clock.h>
static unsigned long arch_timer_rate;
static int arch_timer_ppi;
@@ -204,6 +205,18 @@ static inline cycle_t arch_counter_get_cntvct(void)
return ((cycle_t) cvalh << 32) | cvall;
}
+static u32 notrace arch_counter_get_cntvct32(void)
+{
+ cycle_t cntvct = arch_counter_get_cntvct();
+
+ /*
+ * The sched_clock infrastructure only knows about counters
+ * with@most 32bits. Forget about the upper 24 bits for the
+ * time being...
+ */
+ return (u32)(cntvct & (u32)~0);
+}
+
static cycle_t arch_counter_read(struct clocksource *cs)
{
return arch_counter_get_cntpct();
@@ -286,3 +299,15 @@ out_free:
return err;
}
+
+int __init arch_timer_sched_clock_init(void)
+{
+ int err;
+
+ err = arch_timer_available();
+ if (err)
+ return err;
+
+ setup_sched_clock(arch_counter_get_cntvct32, 32, arch_timer_rate);
+ return 0;
+}
--
1.7.7.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v4 4/7] ARM: architected timers: add DT support
2012-04-27 12:55 [GIT PULL][PATCH v4 0/7] A7/A15 architected timer support Marc Zyngier
` (2 preceding siblings ...)
2012-04-27 12:55 ` [PATCH v4 3/7] ARM: architected timers: Add A15 specific sched_clock implementation Marc Zyngier
@ 2012-04-27 12:55 ` Marc Zyngier
2012-04-27 12:55 ` [PATCH v4 5/7] ARM: architected timers: add support for UP timer Marc Zyngier
` (2 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Marc Zyngier @ 2012-04-27 12:55 UTC (permalink / raw)
To: linux-arm-kernel
Add runtime DT support and documentation for the Cortex A7/A15
architected timers.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
.../devicetree/bindings/arm/arch_timer.txt | 27 ++++++++++
arch/arm/include/asm/arch_timer.h | 6 ++
arch/arm/kernel/arch_timer.c | 53 +++++++++++++++++---
3 files changed, 79 insertions(+), 7 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/arch_timer.txt
diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt
new file mode 100644
index 0000000..52478c8
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/arch_timer.txt
@@ -0,0 +1,27 @@
+* ARM architected timer
+
+ARM Cortex-A7 and Cortex-A15 have a per-core architected timer, which
+provides per-cpu timers.
+
+The timer is attached to a GIC to deliver its per-processor interrupts.
+
+** Timer node properties:
+
+- compatible : Should at least contain "arm,armv7-timer".
+
+- interrupts : Interrupt list for secure, non-secure, virtual and
+ hypervisor timers, in that order.
+
+- clock-frequency : The frequency of the main counter, in Hz. Optional.
+
+Example:
+
+ timer {
+ compatible = "arm,cortex-a15-timer",
+ "arm,armv7-timer";
+ interrupts = <1 13 0xf08>,
+ <1 14 0xf08>,
+ <1 11 0xf08>,
+ <1 10 0xf08>;
+ clock-frequency = <100000000>;
+ };
diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h
index dc008c6..935897f 100644
--- a/arch/arm/include/asm/arch_timer.h
+++ b/arch/arm/include/asm/arch_timer.h
@@ -10,12 +10,18 @@ struct arch_timer {
#ifdef CONFIG_ARM_ARCH_TIMER
int arch_timer_register(struct arch_timer *);
int arch_timer_sched_clock_init(void);
+int arch_timer_of_register(void);
#else
static inline int arch_timer_register(struct arch_timer *at)
{
return -ENXIO;
}
+static inline int arch_timer_of_register(void)
+{
+ return -ENXIO;
+}
+
static inline int arch_timer_sched_clock_init(void)
{
return -ENXIO;
diff --git a/arch/arm/kernel/arch_timer.c b/arch/arm/kernel/arch_timer.c
index dd90704..1a34eee 100644
--- a/arch/arm/kernel/arch_timer.c
+++ b/arch/arm/kernel/arch_timer.c
@@ -17,6 +17,7 @@
#include <linux/jiffies.h>
#include <linux/clockchips.h>
#include <linux/interrupt.h>
+#include <linux/of_irq.h>
#include <linux/io.h>
#include <asm/cputype.h>
@@ -245,13 +246,10 @@ static struct local_timer_ops arch_timer_ops __cpuinitdata = {
.stop = arch_timer_stop,
};
-int __init arch_timer_register(struct arch_timer *at)
+static int __init arch_timer_common_register(void)
{
int err;
- if (at->res[0].start <= 0 || !(at->res[0].flags & IORESOURCE_IRQ))
- return -EINVAL;
-
err = arch_timer_available();
if (err)
return err;
@@ -262,7 +260,6 @@ int __init arch_timer_register(struct arch_timer *at)
clocksource_register_hz(&clocksource_counter, arch_timer_rate);
- arch_timer_ppi = at->res[0].start;
err = request_percpu_irq(arch_timer_ppi, arch_timer_handler,
"arch_timer", arch_timer_evt);
if (err) {
@@ -271,8 +268,7 @@ int __init arch_timer_register(struct arch_timer *at)
goto out_free;
}
- if (at->res[1].start > 0 || (at->res[1].flags & IORESOURCE_IRQ)) {
- arch_timer_ppi2 = at->res[1].start;
+ if (arch_timer_ppi2) {
err = request_percpu_irq(arch_timer_ppi2, arch_timer_handler,
"arch_timer", arch_timer_evt);
if (err) {
@@ -300,6 +296,49 @@ out_free:
return err;
}
+int __init arch_timer_register(struct arch_timer *at)
+{
+ if (at->res[0].start <= 0 || !(at->res[0].flags & IORESOURCE_IRQ))
+ return -EINVAL;
+
+ arch_timer_ppi = at->res[0].start;
+
+ if (at->res[1].start > 0 || (at->res[1].flags & IORESOURCE_IRQ))
+ arch_timer_ppi2 = at->res[1].start;
+
+ return arch_timer_common_register();
+}
+
+#ifdef CONFIG_OF
+static const struct of_device_id arch_timer_of_match[] __initconst = {
+ { .compatible = "arm,armv7-timer", },
+ {},
+};
+
+int __init arch_timer_of_register(void)
+{
+ struct device_node *np;
+ u32 freq;
+
+ np = of_find_matching_node(NULL, arch_timer_of_match);
+ if (!np) {
+ pr_err("arch_timer: can't find DT node\n");
+ return -ENODEV;
+ }
+
+ /* Try to determine the frequency from the device tree or CNTFRQ */
+ if (!of_property_read_u32(np, "clock-frequency", &freq))
+ arch_timer_rate = freq;
+
+ arch_timer_ppi = irq_of_parse_and_map(np, 0);
+ arch_timer_ppi2 = irq_of_parse_and_map(np, 1);
+ pr_info("arch_timer: found %s irqs %d %d\n",
+ np->name, arch_timer_ppi, arch_timer_ppi2);
+
+ return arch_timer_common_register();
+}
+#endif
+
int __init arch_timer_sched_clock_init(void)
{
int err;
--
1.7.7.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v4 5/7] ARM: architected timers: add support for UP timer
2012-04-27 12:55 [GIT PULL][PATCH v4 0/7] A7/A15 architected timer support Marc Zyngier
` (3 preceding siblings ...)
2012-04-27 12:55 ` [PATCH v4 4/7] ARM: architected timers: add DT support Marc Zyngier
@ 2012-04-27 12:55 ` Marc Zyngier
2012-04-27 12:55 ` [PATCH v4 6/7] ARM: vexpress: plug local timers into the DT code Marc Zyngier
2012-04-27 12:55 ` [PATCH v4 7/7] ARM: architected timers: remove support for non DT platforms Marc Zyngier
6 siblings, 0 replies; 8+ messages in thread
From: Marc Zyngier @ 2012-04-27 12:55 UTC (permalink / raw)
To: linux-arm-kernel
If CONFIG_LOCAL_TIMERS is not defined, let the architected timer
driver register a single clock_event_device that is used as a
global timer.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/kernel/arch_timer.c | 13 +++++++++++++
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/arch/arm/kernel/arch_timer.c b/arch/arm/kernel/arch_timer.c
index 1a34eee..154f0a1 100644
--- a/arch/arm/kernel/arch_timer.c
+++ b/arch/arm/kernel/arch_timer.c
@@ -246,6 +246,8 @@ static struct local_timer_ops arch_timer_ops __cpuinitdata = {
.stop = arch_timer_stop,
};
+static struct clock_event_device arch_timer_global_evt;
+
static int __init arch_timer_common_register(void)
{
int err;
@@ -280,6 +282,17 @@ static int __init arch_timer_common_register(void)
}
err = local_timer_register(&arch_timer_ops);
+ if (err) {
+ /*
+ * We couldn't register as a local timer (could be
+ * because we're on a UP platform, or because some
+ * other local timer is already present...). Try as a
+ * global timer instead.
+ */
+ arch_timer_global_evt.cpumask = cpumask_of(0);
+ err = arch_timer_setup(&arch_timer_global_evt);
+ }
+
if (err)
goto out_free_irq;
--
1.7.7.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v4 6/7] ARM: vexpress: plug local timers into the DT code
2012-04-27 12:55 [GIT PULL][PATCH v4 0/7] A7/A15 architected timer support Marc Zyngier
` (4 preceding siblings ...)
2012-04-27 12:55 ` [PATCH v4 5/7] ARM: architected timers: add support for UP timer Marc Zyngier
@ 2012-04-27 12:55 ` Marc Zyngier
2012-04-27 12:55 ` [PATCH v4 7/7] ARM: architected timers: remove support for non DT platforms Marc Zyngier
6 siblings, 0 replies; 8+ messages in thread
From: Marc Zyngier @ 2012-04-27 12:55 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Pawel Moll <pawel.moll@arm.com>
---
arch/arm/mach-vexpress/v2m.c | 8 +++++++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index 47cdcca..04dd092 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -19,8 +19,10 @@
#include <linux/clkdev.h>
#include <linux/mtd/physmap.h>
+#include <asm/arch_timer.h>
#include <asm/mach-types.h>
#include <asm/sizes.h>
+#include <asm/smp_twd.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
@@ -616,7 +618,6 @@ void __init v2m_dt_init_early(void)
}
clkdev_add_table(v2m_dt_lookups, ARRAY_SIZE(v2m_dt_lookups));
- versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000);
}
static struct of_device_id vexpress_irq_match[] __initdata = {
@@ -643,6 +644,11 @@ static void __init v2m_dt_timer_init(void)
return;
node = of_find_node_by_path(path);
v2m_sp804_init(of_iomap(node, 0), irq_of_parse_and_map(node, 0));
+ if (arch_timer_of_register() != 0)
+ twd_local_timer_of_register();
+
+ if (arch_timer_sched_clock_init() != 0)
+ versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000);
}
static struct sys_timer v2m_dt_timer = {
--
1.7.7.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v4 7/7] ARM: architected timers: remove support for non DT platforms
2012-04-27 12:55 [GIT PULL][PATCH v4 0/7] A7/A15 architected timer support Marc Zyngier
` (5 preceding siblings ...)
2012-04-27 12:55 ` [PATCH v4 6/7] ARM: vexpress: plug local timers into the DT code Marc Zyngier
@ 2012-04-27 12:55 ` Marc Zyngier
6 siblings, 0 replies; 8+ messages in thread
From: Marc Zyngier @ 2012-04-27 12:55 UTC (permalink / raw)
To: linux-arm-kernel
All mainline platforms using the ARM architected timers are DT
only. As such, remove the ad-hoc support that is not longer needed
anymore.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/include/asm/arch_timer.h | 14 +-------------
arch/arm/kernel/arch_timer.c | 19 ++-----------------
2 files changed, 3 insertions(+), 30 deletions(-)
diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h
index 935897f..ed2e95d 100644
--- a/arch/arm/include/asm/arch_timer.h
+++ b/arch/arm/include/asm/arch_timer.h
@@ -1,22 +1,10 @@
#ifndef __ASMARM_ARCH_TIMER_H
#define __ASMARM_ARCH_TIMER_H
-#include <linux/ioport.h>
-
-struct arch_timer {
- struct resource res[2];
-};
-
#ifdef CONFIG_ARM_ARCH_TIMER
-int arch_timer_register(struct arch_timer *);
-int arch_timer_sched_clock_init(void);
int arch_timer_of_register(void);
+int arch_timer_sched_clock_init(void);
#else
-static inline int arch_timer_register(struct arch_timer *at)
-{
- return -ENXIO;
-}
-
static inline int arch_timer_of_register(void)
{
return -ENXIO;
diff --git a/arch/arm/kernel/arch_timer.c b/arch/arm/kernel/arch_timer.c
index 154f0a1..dd58035 100644
--- a/arch/arm/kernel/arch_timer.c
+++ b/arch/arm/kernel/arch_timer.c
@@ -248,7 +248,7 @@ static struct local_timer_ops arch_timer_ops __cpuinitdata = {
static struct clock_event_device arch_timer_global_evt;
-static int __init arch_timer_common_register(void)
+static int __init arch_timer_register(void)
{
int err;
@@ -309,20 +309,6 @@ out_free:
return err;
}
-int __init arch_timer_register(struct arch_timer *at)
-{
- if (at->res[0].start <= 0 || !(at->res[0].flags & IORESOURCE_IRQ))
- return -EINVAL;
-
- arch_timer_ppi = at->res[0].start;
-
- if (at->res[1].start > 0 || (at->res[1].flags & IORESOURCE_IRQ))
- arch_timer_ppi2 = at->res[1].start;
-
- return arch_timer_common_register();
-}
-
-#ifdef CONFIG_OF
static const struct of_device_id arch_timer_of_match[] __initconst = {
{ .compatible = "arm,armv7-timer", },
{},
@@ -348,9 +334,8 @@ int __init arch_timer_of_register(void)
pr_info("arch_timer: found %s irqs %d %d\n",
np->name, arch_timer_ppi, arch_timer_ppi2);
- return arch_timer_common_register();
+ return arch_timer_register();
}
-#endif
int __init arch_timer_sched_clock_init(void)
{
--
1.7.7.1
^ permalink raw reply related [flat|nested] 8+ messages in thread