From: thomas.abraham@linaro.org (Thomas Abraham)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 08/20] ARM: EXYNOS: update irqs for EXYNOS5250 evt1
Date: Mon, 30 Apr 2012 12:14:18 -0700 [thread overview]
Message-ID: <1335813270-13083-9-git-send-email-thomas.abraham@linaro.org> (raw)
In-Reply-To: <1335813270-13083-1-git-send-email-thomas.abraham@linaro.org>
From: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
arch/arm/mach-exynos/include/mach/irqs.h | 34 ++++++++++++++++++-----------
1 files changed, 21 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h
index ece5624..46d4734 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -297,6 +297,7 @@
#define EXYNOS5_IRQ_MIPICSI1 IRQ_SPI(80)
#define EXYNOS5_IRQ_EFNFCON_DMA_ABORT IRQ_SPI(81)
#define EXYNOS5_IRQ_MIPIDSI0 IRQ_SPI(82)
+#define EXYNOS5_IRQ_WDT_IOP IRQ_SPI(83)
#define EXYNOS5_IRQ_ROTATOR IRQ_SPI(84)
#define EXYNOS5_IRQ_GSC0 IRQ_SPI(85)
#define EXYNOS5_IRQ_GSC1 IRQ_SPI(86)
@@ -305,8 +306,8 @@
#define EXYNOS5_IRQ_JPEG IRQ_SPI(89)
#define EXYNOS5_IRQ_EFNFCON_DMA IRQ_SPI(90)
#define EXYNOS5_IRQ_2D IRQ_SPI(91)
-#define EXYNOS5_IRQ_SFMC0 IRQ_SPI(92)
-#define EXYNOS5_IRQ_SFMC1 IRQ_SPI(93)
+#define EXYNOS5_IRQ_EFNFCON_0 IRQ_SPI(92)
+#define EXYNOS5_IRQ_EFNFCON_1 IRQ_SPI(93)
#define EXYNOS5_IRQ_MIXER IRQ_SPI(94)
#define EXYNOS5_IRQ_HDMI IRQ_SPI(95)
#define EXYNOS5_IRQ_MFC IRQ_SPI(96)
@@ -320,7 +321,7 @@
#define EXYNOS5_IRQ_PCM2 IRQ_SPI(104)
#define EXYNOS5_IRQ_SPDIF IRQ_SPI(105)
#define EXYNOS5_IRQ_ADC0 IRQ_SPI(106)
-
+#define EXYNOS5_IRQ_ADC1 IRQ_SPI(107)
#define EXYNOS5_IRQ_SATA_PHY IRQ_SPI(108)
#define EXYNOS5_IRQ_SATA_PMEMREQ IRQ_SPI(109)
#define EXYNOS5_IRQ_CAM_C IRQ_SPI(110)
@@ -329,7 +330,6 @@
#define EXYNOS5_IRQ_DP1_INTP1 IRQ_SPI(113)
#define EXYNOS5_IRQ_CEC IRQ_SPI(114)
#define EXYNOS5_IRQ_SATA IRQ_SPI(115)
-#define EXYNOS5_IRQ_NFCON IRQ_SPI(116)
#define EXYNOS5_IRQ_MCT_L0 IRQ_SPI(120)
#define EXYNOS5_IRQ_MCT_L1 IRQ_SPI(121)
@@ -340,7 +340,6 @@
#define EXYNOS5_IRQ_RP_TIMER IRQ_SPI(127)
#define EXYNOS5_IRQ_PMU COMBINER_IRQ(1, 2)
-#define EXYNOS5_IRQ_PMU_CPU1 COMBINER_IRQ(1, 6)
#define EXYNOS5_IRQ_SYSMMU_GSC0_0 COMBINER_IRQ(2, 0)
#define EXYNOS5_IRQ_SYSMMU_GSC0_1 COMBINER_IRQ(2, 1)
@@ -351,6 +350,8 @@
#define EXYNOS5_IRQ_SYSMMU_GSC3_0 COMBINER_IRQ(2, 6)
#define EXYNOS5_IRQ_SYSMMU_GSC3_1 COMBINER_IRQ(2, 7)
+#define EXYNOS5_IRQ_SYSMMU_LITE2_0 COMBINER_IRQ(3, 0)
+#define EXYNOS5_IRQ_SYSMMU_LITE2_1 COMBINER_IRQ(3, 1)
#define EXYNOS5_IRQ_SYSMMU_FIMD1_0 COMBINER_IRQ(3, 2)
#define EXYNOS5_IRQ_SYSMMU_FIMD1_1 COMBINER_IRQ(3, 3)
#define EXYNOS5_IRQ_SYSMMU_LITE0_0 COMBINER_IRQ(3, 4)
@@ -374,8 +375,8 @@
#define EXYNOS5_IRQ_SYSMMU_ARM_0 COMBINER_IRQ(6, 0)
#define EXYNOS5_IRQ_SYSMMU_ARM_1 COMBINER_IRQ(6, 1)
-#define EXYNOS5_IRQ_SYSMMU_MFC_L_0 COMBINER_IRQ(6, 2)
-#define EXYNOS5_IRQ_SYSMMU_MFC_L_1 COMBINER_IRQ(6, 3)
+#define EXYNOS5_IRQ_SYSMMU_MFC_R_0 COMBINER_IRQ(6, 2)
+#define EXYNOS5_IRQ_SYSMMU_MFC_R_1 COMBINER_IRQ(6, 3)
#define EXYNOS5_IRQ_SYSMMU_RTIC_0 COMBINER_IRQ(6, 4)
#define EXYNOS5_IRQ_SYSMMU_RTIC_1 COMBINER_IRQ(6, 5)
#define EXYNOS5_IRQ_SYSMMU_SSS_0 COMBINER_IRQ(6, 6)
@@ -387,11 +388,9 @@
#define EXYNOS5_IRQ_SYSMMU_MDMA1_1 COMBINER_IRQ(7, 3)
#define EXYNOS5_IRQ_SYSMMU_TV_0 COMBINER_IRQ(7, 4)
#define EXYNOS5_IRQ_SYSMMU_TV_1 COMBINER_IRQ(7, 5)
-#define EXYNOS5_IRQ_SYSMMU_GPSX_0 COMBINER_IRQ(7, 6)
-#define EXYNOS5_IRQ_SYSMMU_GPSX_1 COMBINER_IRQ(7, 7)
-#define EXYNOS5_IRQ_SYSMMU_MFC_R_0 COMBINER_IRQ(8, 5)
-#define EXYNOS5_IRQ_SYSMMU_MFC_R_1 COMBINER_IRQ(8, 6)
+#define EXYNOS5_IRQ_SYSMMU_MFC_L_0 COMBINER_IRQ(8, 5)
+#define EXYNOS5_IRQ_SYSMMU_MFC_L_1 COMBINER_IRQ(8, 6)
#define EXYNOS5_IRQ_SYSMMU_DIS1_0 COMBINER_IRQ(9, 4)
#define EXYNOS5_IRQ_SYSMMU_DIS1_1 COMBINER_IRQ(9, 5)
@@ -407,15 +406,24 @@
#define EXYNOS5_IRQ_SYSMMU_DRC_0 COMBINER_IRQ(11, 6)
#define EXYNOS5_IRQ_SYSMMU_DRC_1 COMBINER_IRQ(11, 7)
+#define EXYNOS5_IRQ_MDMA1_ABORT COMBINER_IRQ(13, 1)
+
+#define EXYNOS5_IRQ_MDMA0_ABORT COMBINER_IRQ(15, 3)
+
#define EXYNOS5_IRQ_FIMD1_FIFO COMBINER_IRQ(18, 4)
#define EXYNOS5_IRQ_FIMD1_VSYNC COMBINER_IRQ(18, 5)
#define EXYNOS5_IRQ_FIMD1_SYSTEM COMBINER_IRQ(18, 6)
+#define EXYNOS5_IRQ_ARMIOP_GIC COMBINER_IRQ(19, 0)
+#define EXYNOS5_IRQ_ARMISP_GIC COMBINER_IRQ(19, 1)
+#define EXYNOS5_IRQ_IOP_GIC COMBINER_IRQ(19, 3)
+#define EXYNOS5_IRQ_ISP_GIC COMBINER_IRQ(19, 4)
+
+#define EXYNOS5_IRQ_PMU_CPU1 COMBINER_IRQ(22, 4)
+
#define EXYNOS5_IRQ_EINT0 COMBINER_IRQ(23, 0)
#define EXYNOS5_IRQ_MCT_G0 COMBINER_IRQ(23, 3)
#define EXYNOS5_IRQ_MCT_G1 COMBINER_IRQ(23, 4)
-#define EXYNOS5_IRQ_MCT_G2 COMBINER_IRQ(23, 5)
-#define EXYNOS5_IRQ_MCT_G3 COMBINER_IRQ(23, 6)
#define EXYNOS5_IRQ_EINT1 COMBINER_IRQ(24, 0)
#define EXYNOS5_IRQ_SYSMMU_LITE1_0 COMBINER_IRQ(24, 1)
--
1.7.5.4
next prev parent reply other threads:[~2012-04-30 19:14 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-04-30 19:14 [PATCH 00/20] ARM: Samsung: Add support for Exynos5250 Rev1.0 Thomas Abraham
2012-04-30 19:14 ` [PATCH 01/20] ARM: EXYNOS: Add watchdog timer clock instance Thomas Abraham
2012-04-30 19:14 ` [PATCH 02/20] ARM: EXYNOS: Support DMA for EXYNOS5250 SoC Thomas Abraham
2012-04-30 19:14 ` [PATCH 03/20] ARM: EXYNOS: fix ctrlbit for exynos5_clk_pdma1 Thomas Abraham
2012-04-30 19:14 ` [PATCH 04/20] ARM: EXYNOS: Modify the GIC physical address for static io-mapping Thomas Abraham
2012-04-30 19:14 ` [PATCH 05/20] ARM: EXYNOS: Redefine IRQ_MCT_L0,1 definition Thomas Abraham
2012-05-27 1:29 ` Kyungmin Park
2012-06-04 7:56 ` Thomas Abraham
2012-04-30 19:14 ` [PATCH 06/20] ARM: EXYNOS: add GPC4 bank instance Thomas Abraham
2012-05-15 16:27 ` Grant Likely
2012-04-30 19:14 ` [PATCH 07/20] ARM: EXYNOS: Add pre-divider and fout mux clocks for bpll and mpll Thomas Abraham
2012-05-09 11:45 ` Kukjin Kim
2012-05-15 7:09 ` Kukjin Kim
2012-04-30 19:14 ` Thomas Abraham [this message]
2012-04-30 19:14 ` [PATCH 09/20] ARM: Exynos: Remove a new bus_type instance for Exynos5 Thomas Abraham
2012-04-30 19:14 ` [PATCH 10/20] of/irq: fix interrupt parent lookup procedure Thomas Abraham
2012-05-15 8:29 ` Kukjin Kim
2012-05-15 18:41 ` Grant Likely
2012-05-15 20:59 ` Grant Likely
2012-05-26 14:05 ` Thomas Abraham
2012-04-30 19:14 ` [PATCH 11/20] of/irq: add retry support for interrupt controller tree initialization Thomas Abraham
2012-04-30 19:14 ` [PATCH 12/20] ARM: Exynos: Add irq_domain support for interrupt combiner Thomas Abraham
2012-04-30 19:14 ` [PATCH 13/20] ARM: Exynos: Add device tree " Thomas Abraham
2012-04-30 19:14 ` [PATCH 14/20] ARM: Exynos: Simplify the wakeup interrupt setup code Thomas Abraham
2012-04-30 19:14 ` [PATCH 15/20] ARM: Exynos: Add irq_domain support for gpio wakeup interrupts Thomas Abraham
2012-05-15 16:29 ` Grant Likely
2012-04-30 19:14 ` [PATCH 16/20] ARM: Exynos: Remove arch_initcall for wakeup interrupt initialization Thomas Abraham
2012-04-30 19:14 ` [PATCH 17/20] ARM: Exynos: Add device tree support for gpio wakeup interrupt controller Thomas Abraham
2012-05-15 16:35 ` Grant Likely
2012-04-30 19:14 ` [PATCH 18/20] ARM: dts: Update device tree source files for EXYNOS5250 Thomas Abraham
2012-05-02 19:55 ` Olof Johansson
2012-05-15 14:00 ` Thomas Abraham
2012-05-15 14:20 ` [PATCH v2 " Thomas Abraham
2012-04-30 19:14 ` [PATCH 19/20] ARM: Exynos5: Add combiner, wakeup interrupt controller and ethernet nodes Thomas Abraham
2012-05-02 17:57 ` Olof Johansson
2012-05-19 6:11 ` Grant Likely
2012-05-19 6:23 ` Olof Johansson
2012-04-30 19:14 ` [PATCH 20/20] ARM: Exynos5: Add AUXDATA for i2c controllers Thomas Abraham
2012-05-09 11:50 ` [PATCH 00/20] ARM: Samsung: Add support for Exynos5250 Rev1.0 Kukjin Kim
2012-05-15 8:41 ` Kukjin Kim
2012-05-15 8:44 ` Thomas Abraham
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