From: t-kristo@ti.com (Tero Kristo)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv2 19/19] ARM: OMAP4: powerdomain: update mpu / core off counters during device off
Date: Thu, 31 May 2012 09:50:21 +0300 [thread overview]
Message-ID: <1338447021.8834.161.camel@sokoban> (raw)
In-Reply-To: <CAOMWX4fV_UEOuUi3M0yT5QfyunAw7Gf85LoXOP2DquQzv=rB6w@mail.gmail.com>
On Wed, 2012-05-30 at 16:08 -0500, Menon, Nishanth wrote:
> On Mon, May 14, 2012 at 5:18 AM, Tero Kristo <t-kristo@ti.com> wrote:
> > Currently device off does not have any counters / timers of its own
> > and it is impossible to track the time spent in this state. In device
> > off, MPU / CORE powerdomains enter OSWR, so normally the RETENTION
> > state times / counts are increased during device off.
> >
> > This patch adds a new field to the powerdomain struct for context loss
> > register, which is checked during pwrdm_post_transition to see if
> > a device off type context loss has happened. If this is the case,
> > the counters + timers for OFF state are touched instead of RETENTION.
> >
> > Signed-off-by: Tero Kristo <t-kristo@ti.com>
> > ---
> > arch/arm/mach-omap2/omap-mpuss-lowpower.c | 1 -
> > arch/arm/mach-omap2/powerdomain.c | 9 +++++++++
> > arch/arm/mach-omap2/powerdomain.h | 2 ++
> > arch/arm/mach-omap2/powerdomains44xx_data.c | 2 ++
> > arch/arm/mach-omap2/prm44xx.c | 15 +++++++++++++++
> > arch/arm/mach-omap2/prm44xx.h | 2 ++
> > 6 files changed, 30 insertions(+), 1 deletions(-)
> >
> > diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
> > index 1f06f97..f187025 100644
> > --- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
> > +++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
> > @@ -404,7 +404,6 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
> > if (omap4_device_prev_state_off()) {
> > omap4_dpll_resume_off();
> > omap4_cm_resume_off();
> > - omap4_device_clear_prev_off_state();
>
> We should probably delete the function in it's entirety - not just the
> call - the original implementation just clears L3 and this
> implementation seems superior.
Yeah, that can be done, I don't think it is used anymore after this
change.
>
> > }
> >
> > sar_save_failed:
> > diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
> > index 96ad3dbe..f13bb2c 100644
> > --- a/arch/arm/mach-omap2/powerdomain.c
> > +++ b/arch/arm/mach-omap2/powerdomain.c
> > @@ -156,6 +156,15 @@ static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
> > break;
> > case PWRDM_STATE_PREV:
> > prev = pwrdm_read_prev_pwrst(pwrdm);
> > +
> > + /*
> > + * If powerdomain has context offset defined, check if
> > + * the domain has lost context (i.e. entered off)
> > + */
> > + if (pwrdm->context_offs)
> > + if (omap4_pwrdm_lost_context_rff(pwrdm->prcm_offs,
> > + pwrdm->context_offs))
>
> We should wrap this under pwrdm_lost_context(pwrdm)
> pwrdm_lost_context should call the arch_pwrdm->lost_context_rff as
> needed? the rest of the powerdomain.c does not use OMAP4 specific
> APIs.
Yes, that sounds like a good change, I'll change this.
>
>
> > + prev = PWRDM_POWER_OFF;
> > if (pwrdm->state != prev)
> > pwrdm->state_counter[prev]++;
> > if (prev == PWRDM_POWER_RET)
> > diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h
> > index 0d72a8a..a427645 100644
> > --- a/arch/arm/mach-omap2/powerdomain.h
> > +++ b/arch/arm/mach-omap2/powerdomain.h
> > @@ -82,6 +82,7 @@ struct powerdomain;
> > * @name: Powerdomain name
> > * @voltdm: voltagedomain containing this powerdomain
> > * @prcm_offs: the address offset from CM_BASE/PRM_BASE
> > + * @context_offs: the address offset for the CONTEXT register
> > * @prcm_partition: (OMAP4 only) the PRCM partition ID containing @prcm_offs
> > * @pwrsts: Possible powerdomain power states
> > * @pwrsts_logic_ret: Possible logic power states when pwrdm in RETENTION
> > @@ -106,6 +107,7 @@ struct powerdomain {
> > struct voltagedomain *ptr;
> > } voltdm;
> > const s16 prcm_offs;
> > + const s16 context_offs;
> > const u8 pwrsts;
> > const u8 pwrsts_logic_ret;
> > const u8 flags;
> > diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c
> > index d8701ce..c4de02f 100644
> > --- a/arch/arm/mach-omap2/powerdomains44xx_data.c
> > +++ b/arch/arm/mach-omap2/powerdomains44xx_data.c
> > @@ -36,6 +36,7 @@ static struct powerdomain core_44xx_pwrdm = {
> > .voltdm = { .name = "core" },
> > .prcm_offs = OMAP4430_PRM_CORE_INST,
> > .prcm_partition = OMAP4430_PRM_PARTITION,
> > + .context_offs = OMAP4_RM_L3_1_L3_1_CONTEXT_OFFSET,
> > .pwrsts = PWRSTS_RET_ON,
> > .pwrsts_logic_ret = PWRSTS_OFF_RET,
> > .banks = 5,
> > @@ -205,6 +206,7 @@ static struct powerdomain mpu_44xx_pwrdm = {
> > .voltdm = { .name = "mpu" },
> > .prcm_offs = OMAP4430_PRM_MPU_INST,
> > .prcm_partition = OMAP4430_PRM_PARTITION,
> > + .context_offs = OMAP4_RM_MPU_MPU_CONTEXT_OFFSET,
> > .pwrsts = PWRSTS_RET_ON,
> > .pwrsts_logic_ret = PWRSTS_OFF_RET,
> > .banks = 3,
>
> Why are we not populating the rest of the CONTEXT_OFFSET registers?
Well, the thing is, other domains don't have any 'spare' context
registers that are not needed by anything else. Like, all the per domain
context registers are used by some hwmod. If we grab the register for
this use, then the context lost count for that hwmod will break.
For PER domain, it might be possible to use RM_L4PER_L4_PER_CONTEXT
though (it has two bit positions), but that is the only one missing...
Other domains do go to OFF. L3_init domain doesn't have anything.
>
> > diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
> > index 86c6c6b..de9132f 100644
> > --- a/arch/arm/mach-omap2/prm44xx.c
> > +++ b/arch/arm/mach-omap2/prm44xx.c
> > @@ -289,6 +289,21 @@ static void __init omap44xx_prm_enable_io_wakeup(void)
> > OMAP4_PRM_IO_PMCTRL_OFFSET);
> > }
> >
> > +bool omap4_pwrdm_lost_context_rff(s16 inst, s16 offset)
> > +{
> > + u32 val;
> > +
> > + val = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, inst, offset);
> > +
> > + if (val & OMAP4430_LOSTCONTEXT_RFF_MASK) {
> > + omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION, inst,
> > + offset);
> > + return true;
> > + }
> > +
> > + return false;
> > +}
> > +
>
> could move to powerdomain4xx.c?
Yes, I'll do that.
-Tero
>
> > /**
> > * omap4_device_set_state_off() - setup device off state
> > * @enable: set to off or not.
> > diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
> > index ee72ae6..fa76d9c 100644
> > --- a/arch/arm/mach-omap2/prm44xx.h
> > +++ b/arch/arm/mach-omap2/prm44xx.h
> > @@ -771,6 +771,8 @@ extern void omap44xx_prm_ocp_barrier(void);
> > extern void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask);
> > extern void omap44xx_prm_restore_irqen(u32 *saved_mask);
> >
> > +extern bool omap4_pwrdm_lost_context_rff(s16 inst, s16 offset);
> we dont need to do this if we use arch_pwrdm->
> > +
> > # endif
> >
> > #endif
>
> ---
> Regards,
> Nishanth Menon
prev parent reply other threads:[~2012-05-31 6:50 UTC|newest]
Thread overview: 87+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-14 10:18 [PATCHv2 00/19] ARM: OMAP4: device off support Tero Kristo
2012-05-14 10:18 ` [PATCHv2 01/19] ARM: OMAP4: PM: powerdomain: Add HWSAR flag to L3INIT Tero Kristo
2012-05-16 18:27 ` Kevin Hilman
2012-05-14 10:18 ` [PATCHv2 02/19] ARM: OMAP4: Add SAR ROM base address Tero Kristo
2012-05-16 18:28 ` Kevin Hilman
2012-05-21 8:28 ` Tero Kristo
2012-05-14 10:18 ` [PATCHv2 03/19] ARM: OMAP4: PM: Add device-off support Tero Kristo
2012-05-16 22:36 ` Kevin Hilman
2012-05-17 7:10 ` Shilimkar, Santosh
2012-05-21 8:48 ` Tero Kristo
2012-05-21 14:05 ` Jean Pihet
2012-05-29 18:34 ` Kevin Hilman
2012-05-29 18:31 ` Kevin Hilman
2012-05-30 8:20 ` Tero Kristo
2012-05-14 10:18 ` [PATCHv2 04/19] ARM: OMAP4: PM: save/restore all DPLL settings in OFF mode Tero Kristo
2012-05-16 22:42 ` Kevin Hilman
2012-05-17 7:04 ` Shilimkar, Santosh
2012-05-17 8:52 ` Shilimkar, Santosh
2012-05-17 16:37 ` Kevin Hilman
2012-05-21 9:01 ` Tero Kristo
2012-05-29 19:46 ` Menon, Nishanth
2012-05-30 17:59 ` Kevin Hilman
2012-05-30 18:24 ` Menon, Nishanth
2012-05-30 22:09 ` Kevin Hilman
2012-05-31 2:38 ` Shilimkar, Santosh
2012-05-21 8:58 ` Tero Kristo
2012-05-14 10:18 ` [PATCHv2 05/19] ARM: OMAP4: PM: save/restore all CM1/2 " Tero Kristo
2012-05-16 22:48 ` Kevin Hilman
2012-05-17 7:05 ` Shilimkar, Santosh
2012-05-14 10:18 ` [PATCHv2 06/19] ARM: OMAP4: PM: Add SAR backup support towards device OFF Tero Kristo
2012-05-16 22:58 ` Kevin Hilman
2012-05-17 7:02 ` Shilimkar, Santosh
2012-05-17 16:42 ` Kevin Hilman
2012-05-18 5:53 ` Shilimkar, Santosh
2012-05-21 9:07 ` Tero Kristo
2012-05-14 10:18 ` [PATCHv2 07/19] ARM: OMAP4: Auto generate SAR layout contents Tero Kristo
2012-05-14 10:18 ` [PATCHv2 08/19] ARM: OMAP4: SAR: generate overwrite data based on SAR ROM contents Tero Kristo
2012-05-14 10:18 ` [PATCHv2 09/19] ARM: OMAP4: PM: add errata support Tero Kristo
2012-05-29 20:10 ` Menon, Nishanth
2012-05-30 8:32 ` Tero Kristo
2012-05-30 14:45 ` Menon, Nishanth
2012-05-14 10:18 ` [PATCHv2 10/19] ARM: OMAP4: PM: Work-around for ROM code BUG of IVAHD/TESLA Tero Kristo
2012-05-16 23:05 ` Kevin Hilman
2012-05-16 23:07 ` Kevin Hilman
2012-05-21 9:11 ` Tero Kristo
2012-05-29 20:13 ` Kevin Hilman
2012-05-17 6:52 ` Shilimkar, Santosh
2012-05-17 16:45 ` Kevin Hilman
2012-05-18 5:55 ` Shilimkar, Santosh
2012-05-14 10:18 ` [PATCHv2 11/19] ARM: OMAP4: PM: save/restore CM L3INSTR registers when MPU hits OSWR/OFF mode Tero Kristo
2012-05-16 23:17 ` Kevin Hilman
2012-05-17 6:53 ` Shilimkar, Santosh
2012-05-14 10:18 ` [PATCHv2 12/19] ARM: OMAP4: PM: update ROM return address for OSWR and OFF Tero Kristo
2012-05-16 23:36 ` Kevin Hilman
2012-05-21 9:29 ` Tero Kristo
2012-05-14 10:18 ` [PATCHv2 13/19] ARM: OMAP4: PM: Mark the PPI and SPI interrupts as non-secure for GP Tero Kristo
2012-05-16 23:48 ` Kevin Hilman
2012-05-21 9:32 ` Tero Kristo
2012-05-14 10:18 ` [PATCHv2 14/19] ARM: OMAP4: wakeupgen: enable clocks for save_secure_all Tero Kristo
2012-05-17 0:06 ` Kevin Hilman
2012-05-21 9:38 ` Tero Kristo
2012-05-21 9:43 ` Shilimkar, Santosh
2012-05-29 20:15 ` Kevin Hilman
2012-05-29 20:48 ` Menon, Nishanth
2012-05-30 8:44 ` Tero Kristo
2012-05-30 8:33 ` Tero Kristo
2012-05-17 0:17 ` Paul Walmsley
2012-05-21 9:35 ` Tero Kristo
2012-05-21 9:39 ` Shilimkar, Santosh
2012-05-14 10:18 ` [PATCHv2 15/19] ARM: OMAP4430: PM: workaround for DDR corruption on second CS Tero Kristo
2012-05-17 0:15 ` Kevin Hilman
2012-05-17 7:12 ` Shilimkar, Santosh
2012-05-17 16:47 ` Kevin Hilman
2012-05-18 5:55 ` Shilimkar, Santosh
2012-05-14 10:18 ` [PATCHv2 16/19] TEMP: ARM: OMAP4: prevent voltage transitions Tero Kristo
2012-05-14 10:18 ` [PATCHv2 17/19] ARM: OMAP4: put cpu1 back to sleep if no wake request Tero Kristo
2012-05-17 0:31 ` Kevin Hilman
2012-05-21 10:21 ` Tero Kristo
2012-05-21 10:40 ` Shilimkar, Santosh
2012-05-29 20:17 ` Kevin Hilman
2012-05-30 15:18 ` Menon, Nishanth
2012-05-14 10:18 ` [PATCHv2 18/19] ARM: OMAP4460: wakeupgen: set GIC_CPU0 backup status flag always Tero Kristo
2012-05-17 0:33 ` Kevin Hilman
2012-05-21 9:12 ` Tero Kristo
2012-05-14 10:18 ` [PATCHv2 19/19] ARM: OMAP4: powerdomain: update mpu / core off counters during device off Tero Kristo
2012-05-30 21:08 ` Menon, Nishanth
2012-05-31 6:50 ` Tero Kristo [this message]
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