From: s.hauer@pengutronix.de (Sascha Hauer)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/3] ARM i.MX53: Fix PLL4 base address
Date: Mon, 4 Jun 2012 15:27:46 +0200 [thread overview]
Message-ID: <1338816466-2365-3-git-send-email-s.hauer@pengutronix.de> (raw)
In-Reply-To: <1338816466-2365-1-git-send-email-s.hauer@pengutronix.de>
MX53_DPLL4_BASE accidently returned the base address of PLL3.
Fix this.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: stable at vger.kernel.org
---
arch/arm/mach-imx/crm-regs-imx5.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/crm-regs-imx5.h b/arch/arm/mach-imx/crm-regs-imx5.h
index 5e11ba7..5e3f1f0 100644
--- a/arch/arm/mach-imx/crm-regs-imx5.h
+++ b/arch/arm/mach-imx/crm-regs-imx5.h
@@ -23,7 +23,7 @@
#define MX53_DPLL1_BASE MX53_IO_ADDRESS(MX53_PLL1_BASE_ADDR)
#define MX53_DPLL2_BASE MX53_IO_ADDRESS(MX53_PLL2_BASE_ADDR)
#define MX53_DPLL3_BASE MX53_IO_ADDRESS(MX53_PLL3_BASE_ADDR)
-#define MX53_DPLL4_BASE MX53_IO_ADDRESS(MX53_PLL3_BASE_ADDR)
+#define MX53_DPLL4_BASE MX53_IO_ADDRESS(MX53_PLL4_BASE_ADDR)
/* PLL Register Offsets */
#define MXC_PLL_DP_CTL 0x00
--
1.7.10
prev parent reply other threads:[~2012-06-04 13:27 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-04 13:27 [PATCH 1/3] ARM i.MX pllv2: use standard register set unconditionally Sascha Hauer
2012-06-04 13:27 ` [PATCH 2/3] ARM i.MX pllv2: make round_rate accurate Sascha Hauer
2012-06-04 13:27 ` Sascha Hauer [this message]
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