* [PATCH 1/2] ARM: dts: update memory size on brownstone
@ 2012-06-05 9:55 Haojian Zhuang
2012-06-05 9:55 ` [PATCH 2/2] ARM: mmp: fix missing cascade_irq in irq handler Haojian Zhuang
0 siblings, 1 reply; 3+ messages in thread
From: Haojian Zhuang @ 2012-06-05 9:55 UTC (permalink / raw)
To: linux-arm-kernel
The memory size on brownstone should be 128MB, not 64MB.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
---
arch/arm/boot/dts/mmp2-brownstone.dts | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/mmp2-brownstone.dts b/arch/arm/boot/dts/mmp2-brownstone.dts
index 153a4b2..c9b4f27 100644
--- a/arch/arm/boot/dts/mmp2-brownstone.dts
+++ b/arch/arm/boot/dts/mmp2-brownstone.dts
@@ -11,7 +11,7 @@
/include/ "mmp2.dtsi"
/ {
- model = "Marvell MMP2 Aspenite Development Board";
+ model = "Marvell MMP2 Brownstone Development Board";
compatible = "mrvl,mmp2-brownstone", "mrvl,mmp2";
chosen {
@@ -19,7 +19,7 @@
};
memory {
- reg = <0x00000000 0x04000000>;
+ reg = <0x00000000 0x08000000>;
};
soc {
--
1.7.5.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 2/2] ARM: mmp: fix missing cascade_irq in irq handler
2012-06-05 9:55 [PATCH 1/2] ARM: dts: update memory size on brownstone Haojian Zhuang
@ 2012-06-05 9:55 ` Haojian Zhuang
2012-06-05 17:25 ` Chris Ball
0 siblings, 1 reply; 3+ messages in thread
From: Haojian Zhuang @ 2012-06-05 9:55 UTC (permalink / raw)
To: linux-arm-kernel
While supporting board in non-DT mode, icu_data[i]->cascade_irq isn't
assigned with correct value.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
---
arch/arm/mach-mmp/irq.c | 7 +++++++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-mmp/irq.c b/arch/arm/mach-mmp/irq.c
index fcfe0e3..e60c7d9 100644
--- a/arch/arm/mach-mmp/irq.c
+++ b/arch/arm/mach-mmp/irq.c
@@ -241,6 +241,7 @@ void __init mmp2_init_icu(void)
icu_data[1].clr_mfp_irq_base = IRQ_MMP2_PMIC_BASE;
icu_data[1].clr_mfp_hwirq = IRQ_MMP2_PMIC - IRQ_MMP2_PMIC_BASE;
icu_data[1].nr_irqs = 2;
+ icu_data[1].cascade_irq = 4;
icu_data[1].virq_base = IRQ_MMP2_PMIC_BASE;
icu_data[1].domain = irq_domain_add_legacy(NULL, icu_data[1].nr_irqs,
icu_data[1].virq_base, 0,
@@ -249,6 +250,7 @@ void __init mmp2_init_icu(void)
icu_data[2].reg_status = mmp_icu_base + 0x154;
icu_data[2].reg_mask = mmp_icu_base + 0x16c;
icu_data[2].nr_irqs = 2;
+ icu_data[2].cascade_irq = 5;
icu_data[2].virq_base = IRQ_MMP2_RTC_BASE;
icu_data[2].domain = irq_domain_add_legacy(NULL, icu_data[2].nr_irqs,
icu_data[2].virq_base, 0,
@@ -257,6 +259,7 @@ void __init mmp2_init_icu(void)
icu_data[3].reg_status = mmp_icu_base + 0x180;
icu_data[3].reg_mask = mmp_icu_base + 0x17c;
icu_data[3].nr_irqs = 3;
+ icu_data[3].cascade_irq = 9;
icu_data[3].virq_base = IRQ_MMP2_KEYPAD_BASE;
icu_data[3].domain = irq_domain_add_legacy(NULL, icu_data[3].nr_irqs,
icu_data[3].virq_base, 0,
@@ -265,6 +268,7 @@ void __init mmp2_init_icu(void)
icu_data[4].reg_status = mmp_icu_base + 0x158;
icu_data[4].reg_mask = mmp_icu_base + 0x170;
icu_data[4].nr_irqs = 5;
+ icu_data[4].cascade_irq = 17;
icu_data[4].virq_base = IRQ_MMP2_TWSI_BASE;
icu_data[4].domain = irq_domain_add_legacy(NULL, icu_data[4].nr_irqs,
icu_data[4].virq_base, 0,
@@ -273,6 +277,7 @@ void __init mmp2_init_icu(void)
icu_data[5].reg_status = mmp_icu_base + 0x15c;
icu_data[5].reg_mask = mmp_icu_base + 0x174;
icu_data[5].nr_irqs = 15;
+ icu_data[5].cascade_irq = 35;
icu_data[5].virq_base = IRQ_MMP2_MISC_BASE;
icu_data[5].domain = irq_domain_add_legacy(NULL, icu_data[5].nr_irqs,
icu_data[5].virq_base, 0,
@@ -281,6 +286,7 @@ void __init mmp2_init_icu(void)
icu_data[6].reg_status = mmp_icu_base + 0x160;
icu_data[6].reg_mask = mmp_icu_base + 0x178;
icu_data[6].nr_irqs = 2;
+ icu_data[6].cascade_irq = 51;
icu_data[6].virq_base = IRQ_MMP2_MIPI_HSI1_BASE;
icu_data[6].domain = irq_domain_add_legacy(NULL, icu_data[6].nr_irqs,
icu_data[6].virq_base, 0,
@@ -289,6 +295,7 @@ void __init mmp2_init_icu(void)
icu_data[7].reg_status = mmp_icu_base + 0x188;
icu_data[7].reg_mask = mmp_icu_base + 0x184;
icu_data[7].nr_irqs = 2;
+ icu_data[7].cascade_irq = 55;
icu_data[7].virq_base = IRQ_MMP2_MIPI_HSI0_BASE;
icu_data[7].domain = irq_domain_add_legacy(NULL, icu_data[7].nr_irqs,
icu_data[7].virq_base, 0,
--
1.7.5.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 2/2] ARM: mmp: fix missing cascade_irq in irq handler
2012-06-05 9:55 ` [PATCH 2/2] ARM: mmp: fix missing cascade_irq in irq handler Haojian Zhuang
@ 2012-06-05 17:25 ` Chris Ball
0 siblings, 0 replies; 3+ messages in thread
From: Chris Ball @ 2012-06-05 17:25 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On Tue, Jun 05 2012, Haojian Zhuang wrote:
> While supporting board in non-DT mode, icu_data[i]->cascade_irq isn't
> assigned with correct value.
>
> Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
> ---
> arch/arm/mach-mmp/irq.c | 7 +++++++
> 1 files changed, 7 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-mmp/irq.c b/arch/arm/mach-mmp/irq.c
> index fcfe0e3..e60c7d9 100644
> --- a/arch/arm/mach-mmp/irq.c
> +++ b/arch/arm/mach-mmp/irq.c
> @@ -241,6 +241,7 @@ void __init mmp2_init_icu(void)
> icu_data[1].clr_mfp_irq_base = IRQ_MMP2_PMIC_BASE;
> icu_data[1].clr_mfp_hwirq = IRQ_MMP2_PMIC - IRQ_MMP2_PMIC_BASE;
> icu_data[1].nr_irqs = 2;
> + icu_data[1].cascade_irq = 4;
> icu_data[1].virq_base = IRQ_MMP2_PMIC_BASE;
> icu_data[1].domain = irq_domain_add_legacy(NULL, icu_data[1].nr_irqs,
> icu_data[1].virq_base, 0,
> @@ -249,6 +250,7 @@ void __init mmp2_init_icu(void)
> icu_data[2].reg_status = mmp_icu_base + 0x154;
> icu_data[2].reg_mask = mmp_icu_base + 0x16c;
> icu_data[2].nr_irqs = 2;
> + icu_data[2].cascade_irq = 5;
> icu_data[2].virq_base = IRQ_MMP2_RTC_BASE;
> icu_data[2].domain = irq_domain_add_legacy(NULL, icu_data[2].nr_irqs,
> icu_data[2].virq_base, 0,
> @@ -257,6 +259,7 @@ void __init mmp2_init_icu(void)
> icu_data[3].reg_status = mmp_icu_base + 0x180;
> icu_data[3].reg_mask = mmp_icu_base + 0x17c;
> icu_data[3].nr_irqs = 3;
> + icu_data[3].cascade_irq = 9;
> icu_data[3].virq_base = IRQ_MMP2_KEYPAD_BASE;
> icu_data[3].domain = irq_domain_add_legacy(NULL, icu_data[3].nr_irqs,
> icu_data[3].virq_base, 0,
> @@ -265,6 +268,7 @@ void __init mmp2_init_icu(void)
> icu_data[4].reg_status = mmp_icu_base + 0x158;
> icu_data[4].reg_mask = mmp_icu_base + 0x170;
> icu_data[4].nr_irqs = 5;
> + icu_data[4].cascade_irq = 17;
> icu_data[4].virq_base = IRQ_MMP2_TWSI_BASE;
> icu_data[4].domain = irq_domain_add_legacy(NULL, icu_data[4].nr_irqs,
> icu_data[4].virq_base, 0,
> @@ -273,6 +277,7 @@ void __init mmp2_init_icu(void)
> icu_data[5].reg_status = mmp_icu_base + 0x15c;
> icu_data[5].reg_mask = mmp_icu_base + 0x174;
> icu_data[5].nr_irqs = 15;
> + icu_data[5].cascade_irq = 35;
> icu_data[5].virq_base = IRQ_MMP2_MISC_BASE;
> icu_data[5].domain = irq_domain_add_legacy(NULL, icu_data[5].nr_irqs,
> icu_data[5].virq_base, 0,
> @@ -281,6 +286,7 @@ void __init mmp2_init_icu(void)
> icu_data[6].reg_status = mmp_icu_base + 0x160;
> icu_data[6].reg_mask = mmp_icu_base + 0x178;
> icu_data[6].nr_irqs = 2;
> + icu_data[6].cascade_irq = 51;
> icu_data[6].virq_base = IRQ_MMP2_MIPI_HSI1_BASE;
> icu_data[6].domain = irq_domain_add_legacy(NULL, icu_data[6].nr_irqs,
> icu_data[6].virq_base, 0,
> @@ -289,6 +295,7 @@ void __init mmp2_init_icu(void)
> icu_data[7].reg_status = mmp_icu_base + 0x188;
> icu_data[7].reg_mask = mmp_icu_base + 0x184;
> icu_data[7].nr_irqs = 2;
> + icu_data[7].cascade_irq = 55;
> icu_data[7].virq_base = IRQ_MMP2_MIPI_HSI0_BASE;
> icu_data[7].domain = irq_domain_add_legacy(NULL, icu_data[7].nr_irqs,
> icu_data[7].virq_base, 0,
Thanks -- this patch fixes the boot crash regression that's present in
3.5-rc1 on our board:
Tested-by: Chris Ball <cjb@laptop.org>
- Chris.
--
Chris Ball <cjb@laptop.org> <http://printf.net/>
One Laptop Per Child
^ permalink raw reply [flat|nested] 3+ messages in thread
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2012-06-05 9:55 [PATCH 1/2] ARM: dts: update memory size on brownstone Haojian Zhuang
2012-06-05 9:55 ` [PATCH 2/2] ARM: mmp: fix missing cascade_irq in irq handler Haojian Zhuang
2012-06-05 17:25 ` Chris Ball
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