[RFC PATCHv2 0/2]arm: socfpga: Add initial support for Altera's SOCFPGA HW

[RFC PATCHv2 0/2]arm: socfpga: Add initial support for Altera's SOCFPGA HW

[dinguyen at altera.com]

From: Dinh Nguyen <dinguyen@altera.com>

This patch series add minimal support for Altera's SOCFPGA hardward.

Changes since v1:
- Incorporate changes suggested by Pavel Machek, Thommas Petazzoni,
  Arnd Bergmann, and Rob Herring
- Reduce the patch to a make as much use of DTS as possible


Dinh Nguyen (2):
  ARM: socfpga: initial support for Altera's SOCFPGA platform.
  ARM: socfpga: Add board support for Altera's SOCFPGA Cyclone 5 HW

-- 
1.7.9.5

[RFC PATCHv2 1/2] ARM: socfpga: initial support for Altera's SOCFPGA platform.

[dinguyen at altera.com]

From: Dinh Nguyen <dinguyen@altera.com>

Adding core definitions for Altera's SOCFPGA ARM platform.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
---
 MAINTAINERS                                      |    5 +++
 arch/arm/Kconfig                                 |   20 ++++++++++
 arch/arm/Makefile                                |    1 +
 arch/arm/mach-socfpga/clock.c                    |   45 ++++++++++++++++++++++
 arch/arm/mach-socfpga/common.h                   |   23 +++++++++++
 arch/arm/mach-socfpga/include/mach/debug-macro.S |   16 ++++++++
 arch/arm/mach-socfpga/include/mach/iomap.h       |   33 ++++++++++++++++
 arch/arm/mach-socfpga/include/mach/irqs.h        |   24 ++++++++++++
 arch/arm/mach-socfpga/include/mach/timex.h       |   19 +++++++++
 arch/arm/mach-socfpga/include/mach/uncompress.h  |    9 +++++
 10 files changed, 195 insertions(+)
 create mode 100644 arch/arm/mach-socfpga/clock.c
 create mode 100644 arch/arm/mach-socfpga/common.h
 create mode 100644 arch/arm/mach-socfpga/include/mach/debug-macro.S
 create mode 100644 arch/arm/mach-socfpga/include/mach/iomap.h
 create mode 100644 arch/arm/mach-socfpga/include/mach/irqs.h
 create mode 100644 arch/arm/mach-socfpga/include/mach/timex.h
 create mode 100644 arch/arm/mach-socfpga/include/mach/uncompress.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 03df1d1..af6cc9b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1103,6 +1103,11 @@ S:	Supported
 F:	arch/arm/mach-shmobile/
 F:	drivers/sh/
 
+ARM/SOCFPGA ARCHITECTURE
+M:	Dinh Nguyen <dinguyen@altera.com>
+S:	Supported
+F:	arch/arm/mach-socfpga/
+
 ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT
 M:	Lennert Buytenhek <kernel@wantstofly.org>
 L:	linux-arm-kernel at lists.infradead.org (moderated for non-subscribers)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 57eb6ef..01116e5 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -250,6 +250,24 @@ choice
 	prompt "ARM system type"
 	default ARCH_VERSATILE
 
+config ARCH_SOCFPGA
+	bool "Altera SOCFPGA family"
+	select ARCH_WANT_OPTIONAL_GPIOLIB
+	select ARM_AMBA
+	select ARM_GIC
+	select CACHE_L2X0
+	select CLKDEV_LOOKUP
+	select CPU_V7
+	select DW_APB_TIMER
+	select DW_APB_TIMER_OF
+	select GENERIC_CLOCKEVENTS
+	select GPIO_PL061 if GPIOLIB
+	select HAVE_ARM_SCU
+	select SPARSE_IRQ
+	select USE_OF
+	help
+	  This enables support for Altera SOCFPGA Cyclone V platform
+
 config ARCH_INTEGRATOR
 	bool "ARM Ltd. Integrator family"
 	select ARM_AMBA
@@ -1057,6 +1075,8 @@ source "arch/arm/mach-sa1100/Kconfig"
 source "arch/arm/plat-samsung/Kconfig"
 source "arch/arm/plat-s3c24xx/Kconfig"
 
+source "arch/arm/mach-socfpga/Kconfig"
+
 source "arch/arm/plat-spear/Kconfig"
 
 source "arch/arm/mach-s3c24xx/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 0298b00..1fe5702 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -193,6 +193,7 @@ machine-$(CONFIG_MACH_SPEAR310)		:= spear3xx
 machine-$(CONFIG_MACH_SPEAR320)		:= spear3xx
 machine-$(CONFIG_MACH_SPEAR600)		:= spear6xx
 machine-$(CONFIG_ARCH_ZYNQ)		:= zynq
+machine-$(CONFIG_ARCH_SOCFPGA) 	:= socfpga
 
 # Platform directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
diff --git a/arch/arm/mach-socfpga/clock.c b/arch/arm/mach-socfpga/clock.c
new file mode 100644
index 0000000..79f3890
--- /dev/null
+++ b/arch/arm/mach-socfpga/clock.c
@@ -0,0 +1,45 @@
+/*
+ *  Copyright (C) 2012 Altera Corporation <www.altera.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <linux/clkdev.h>
+
+#define SOCFPGA_MPU_PERIHCLK_FREQ_HZ			(800000000 / 4)
+#define SOCFPGA_L4_MAIN_CLK					(400000000)
+
+struct clk {
+	unsigned long		rate;
+};
+
+static struct clk apb_pclk = { .rate = 200000000};
+static struct clk i2c_clk = { .rate = 100000000};
+static struct clk spim_clk = { .rate = 100000000};
+static struct clk mpu_pclk = { .rate = SOCFPGA_MPU_PERIHCLK_FREQ_HZ};
+static struct clk l4_main_clk = { .rate = SOCFPGA_L4_MAIN_CLK};
+
+static struct clk_lookup lookups[] = {
+	{ .clk = &apb_pclk, .con_id = "apb_pclk", },
+	{ .clk = &i2c_clk, .dev_id = "ffc04000.i2c", },
+	{ .clk = &i2c_clk, .dev_id = "ffc05000.i2c", },
+	{ .clk = &spim_clk, .dev_id = "dw-spi-mmio.0", },
+	{ .clk = &spim_clk, .dev_id = "dw-spi-mmio.1", },
+	{ .clk = &mpu_pclk, .dev_id = "smp_twd", },
+	{ .clk = &l4_main_clk, .dev_id = "dma-pl330", },
+};
+
+void __init socfpga_init_clocks(void)
+{
+	clkdev_add_table(lookups, ARRAY_SIZE(lookups));
+}
diff --git a/arch/arm/mach-socfpga/common.h b/arch/arm/mach-socfpga/common.h
new file mode 100644
index 0000000..e66587f
--- /dev/null
+++ b/arch/arm/mach-socfpga/common.h
@@ -0,0 +1,23 @@
+/*
+ *  Copyright (C) 2012 Altera Corporation <www.altera.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __MACH_SOCFPGA_COMMON_H
+#define __MACH_SOCFPGA_COMMON_H
+
+extern struct sys_timer socfpga_timer;
+
+#endif
diff --git a/arch/arm/mach-socfpga/include/mach/debug-macro.S b/arch/arm/mach-socfpga/include/mach/debug-macro.S
new file mode 100644
index 0000000..d6f26d2
--- /dev/null
+++ b/arch/arm/mach-socfpga/include/mach/debug-macro.S
@@ -0,0 +1,16 @@
+/*
+ *  Copyright (C) 1994-1999 Russell King
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+		.macro	addruart, rp, rv, tmp
+		mov	\rp, #DEBUG_LL_UART_OFFSET
+		orr	\rp, \rp, #0x00c00000
+		orr	\rv, \rp, #0xfe000000	@ virtual base
+		orr	\rp, \rp, #0xff000000	@ physical base
+		.endm
+
diff --git a/arch/arm/mach-socfpga/include/mach/iomap.h b/arch/arm/mach-socfpga/include/mach/iomap.h
new file mode 100644
index 0000000..d5f8493
--- /dev/null
+++ b/arch/arm/mach-socfpga/include/mach/iomap.h
@@ -0,0 +1,33 @@
+/*
+ *  Copyright (C) 2012 Altera Corporation <www.altera.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef __MACH_SOCFPGA_IOMAP_H
+#define __MACH_SOCFPGA_IOMAP_H
+
+#include <asm/sizes.h>
+
+/* macro to get at IO space when running virtually */
+/*
+ * Statically mapped addresses:
+ *
+ * 10xx xxxx -> fbxx xxxx
+ * 1exx xxxx -> fdxx xxxx
+ * 1fxx xxxx -> fexx xxxx
+ */
+#define IO_ADDRESS(x)		(((x) & 0x03ffffff) + 0xfb000000)
+#define __io_address(n)		IOMEM(IO_ADDRESS(n))
+
+#endif
diff --git a/arch/arm/mach-socfpga/include/mach/irqs.h b/arch/arm/mach-socfpga/include/mach/irqs.h
new file mode 100644
index 0000000..5e344db
--- /dev/null
+++ b/arch/arm/mach-socfpga/include/mach/irqs.h
@@ -0,0 +1,24 @@
+/*
+ *  Copyright (C) 2012 Altera Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef __MACH_IRQS_H
+#define __MACH_IRQS_H
+
+#define IRQ_SOCFPGA_GIC_START	32
+#define IRQ_LOCALWDOG		30
+#define MAX_GIC_NR		1
+
+#endif	/* __MACH_IRQS_H */
diff --git a/arch/arm/mach-socfpga/include/mach/timex.h b/arch/arm/mach-socfpga/include/mach/timex.h
new file mode 100644
index 0000000..43df435
--- /dev/null
+++ b/arch/arm/mach-socfpga/include/mach/timex.h
@@ -0,0 +1,19 @@
+/*
+ *  Copyright (C) 2003 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#define CLOCK_TICK_RATE		(50000000 / 16)
diff --git a/arch/arm/mach-socfpga/include/mach/uncompress.h b/arch/arm/mach-socfpga/include/mach/uncompress.h
new file mode 100644
index 0000000..bbe20e6
--- /dev/null
+++ b/arch/arm/mach-socfpga/include/mach/uncompress.h
@@ -0,0 +1,9 @@
+#ifndef __MACH_UNCOMPRESS_H
+#define __MACH_UNCOMPRESS_H
+
+#define putc(c)
+#define flush()
+#define arch_decomp_setup()
+#define arch_decomp_wdog()
+
+#endif
-- 
1.7.9.5

[RFC PATCHv2 1/2] ARM: socfpga: initial support for Altera's SOCFPGA platform.

[Rob Herring]

On 07/12/2012 12:26 PM, dinguyen at altera.com wrote:
> From: Dinh Nguyen <dinguyen@altera.com>
> 
> Adding core definitions for Altera's SOCFPGA ARM platform.
> 
> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
> Reviewed-by: Pavel Machek <pavel@denx.de>

Two comments below, but otherwise:

Reviewed-by: Rob Herring <rob.herring@calxeda.com>

> diff --git a/arch/arm/mach-socfpga/include/mach/iomap.h b/arch/arm/mach-socfpga/include/mach/iomap.h
> new file mode 100644
> index 0000000..d5f8493
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/include/mach/iomap.h
> @@ -0,0 +1,33 @@
> +/*
> + *  Copyright (C) 2012 Altera Corporation <www.altera.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program.  If not, see <http://www.gnu.org/licenses/>.
> + */
> +#ifndef __MACH_SOCFPGA_IOMAP_H
> +#define __MACH_SOCFPGA_IOMAP_H
> +
> +#include <asm/sizes.h>
> +
> +/* macro to get at IO space when running virtually */
> +/*
> + * Statically mapped addresses:
> + *
> + * 10xx xxxx -> fbxx xxxx
> + * 1exx xxxx -> fdxx xxxx
> + * 1fxx xxxx -> fexx xxxx
> + */
> +#define IO_ADDRESS(x)		(((x) & 0x03ffffff) + 0xfb000000)
> +#define __io_address(n)		IOMEM(IO_ADDRESS(n))

Is this used anywhere?

> +
> +#endif
> diff --git a/arch/arm/mach-socfpga/include/mach/irqs.h b/arch/arm/mach-socfpga/include/mach/irqs.h
> new file mode 100644
> index 0000000..5e344db
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/include/mach/irqs.h
> @@ -0,0 +1,24 @@
> +/*
> + *  Copyright (C) 2012 Altera Corporation
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program.  If not, see <http://www.gnu.org/licenses/>.
> +*/
> +
> +#ifndef __MACH_IRQS_H
> +#define __MACH_IRQS_H
> +
> +#define IRQ_SOCFPGA_GIC_START	32
> +#define IRQ_LOCALWDOG		30
> +#define MAX_GIC_NR		1

This header should not be needed.

> +
> +#endif	/* __MACH_IRQS_H */
> diff --git a/arch/arm/mach-socfpga/include/mach/timex.h b/arch/arm/mach-socfpga/include/mach/timex.h
> new file mode 100644
> index 0000000..43df435
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/include/mach/timex.h
> @@ -0,0 +1,19 @@
> +/*
> + *  Copyright (C) 2003 ARM Limited
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
> + */
> +
> +#define CLOCK_TICK_RATE		(50000000 / 16)
> diff --git a/arch/arm/mach-socfpga/include/mach/uncompress.h b/arch/arm/mach-socfpga/include/mach/uncompress.h
> new file mode 100644
> index 0000000..bbe20e6
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/include/mach/uncompress.h
> @@ -0,0 +1,9 @@
> +#ifndef __MACH_UNCOMPRESS_H
> +#define __MACH_UNCOMPRESS_H
> +
> +#define putc(c)
> +#define flush()
> +#define arch_decomp_setup()
> +#define arch_decomp_wdog()
> +
> +#endif
> 

[RFC PATCHv2 1/2] ARM: socfpga: initial support for Altera's SOCFPGA platform.

[Arnd Bergmann]

On Thursday 12 July 2012, dinguyen at altera.com wrote:

> +config ARCH_SOCFPGA
> +	bool "Altera SOCFPGA family"
> +	select ARCH_WANT_OPTIONAL_GPIOLIB
> +	select ARM_AMBA
> +	select ARM_GIC
> +	select CACHE_L2X0
> +	select CLKDEV_LOOKUP
> +	select CPU_V7
> +	select DW_APB_TIMER
> +	select DW_APB_TIMER_OF
> +	select GENERIC_CLOCKEVENTS
> +	select GPIO_PL061 if GPIOLIB
> +	select HAVE_ARM_SCU
> +	select SPARSE_IRQ
> +	select USE_OF
> +	help
> +	  This enables support for Altera SOCFPGA Cyclone V platform

Please select COMMON_CLK as well to use the generic clock implementation.

> diff --git a/arch/arm/mach-socfpga/clock.c b/arch/arm/mach-socfpga/clock.c
> new file mode 100644
> index 0000000..79f3890
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/clock.c
> @@ -0,0 +1,45 @@

> +#include <linux/clkdev.h>
> +
> +#define SOCFPGA_MPU_PERIHCLK_FREQ_HZ			(800000000 / 4)
> +#define SOCFPGA_L4_MAIN_CLK					(400000000)
> +
> +struct clk {
> +	unsigned long		rate;
> +};
> +
> +static struct clk apb_pclk = { .rate = 200000000};
> +static struct clk i2c_clk = { .rate = 100000000};
> +static struct clk spim_clk = { .rate = 100000000};
> +static struct clk mpu_pclk = { .rate = SOCFPGA_MPU_PERIHCLK_FREQ_HZ};
> +static struct clk l4_main_clk = { .rate = SOCFPGA_L4_MAIN_CLK};

Then move this file into drivers/clk/ using that code.

> diff --git a/arch/arm/mach-socfpga/include/mach/iomap.h b/arch/arm/mach-socfpga/include/mach/iomap.h
> new file mode 100644
> index 0000000..d5f8493
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/include/mach/iomap.h
> @@ -0,0 +1,33 @@
> +/*
> + *  Copyright (C) 2012 Altera Corporation <www.altera.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program.  If not, see <http://www.gnu.org/licenses/>.
> + */
> +#ifndef __MACH_SOCFPGA_IOMAP_H
> +#define __MACH_SOCFPGA_IOMAP_H
> +
> +#include <asm/sizes.h>
> +
> +/* macro to get at IO space when running virtually */
> +/*
> + * Statically mapped addresses:
> + *
> + * 10xx xxxx -> fbxx xxxx
> + * 1exx xxxx -> fdxx xxxx
> + * 1fxx xxxx -> fexx xxxx
> + */
> +#define IO_ADDRESS(x)		(((x) & 0x03ffffff) + 0xfb000000)
> +#define __io_address(n)		IOMEM(IO_ADDRESS(n))
> +
> +#endif

This is unused, right? Just remove it.

> diff --git a/arch/arm/mach-socfpga/include/mach/irqs.h b/arch/arm/mach-socfpga/include/mach/irqs.h
> new file mode 100644
> index 0000000..5e344db
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/include/mach/irqs.h
> @@ -0,0 +1,24 @@
> +/*
> + *  Copyright (C) 2012 Altera Corporation
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program.  If not, see <http://www.gnu.org/licenses/>.
> +*/
> +
> +#ifndef __MACH_IRQS_H
> +#define __MACH_IRQS_H
> +
> +#define IRQ_SOCFPGA_GIC_START	32
> +#define IRQ_LOCALWDOG		30
> +#define MAX_GIC_NR		1
> +
> +#endif	/* __MACH_IRQS_H */

Same with this. Since you're using sparse IRQ, this file is not even included
anywhere.

	Arnd

[RFC PATCHv2 1/2] ARM: socfpga: initial support for Altera's SOCFPGA platform.

[Dinh.Nguyen]

On Tue, 2012-07-17 at 15:47 +0000, Arnd Bergmann wrote:
> On Thursday 12 July 2012, dinguyen at altera.com wrote:
> 
> > +config ARCH_SOCFPGA
> > +	bool "Altera SOCFPGA family"
> > +	select ARCH_WANT_OPTIONAL_GPIOLIB
> > +	select ARM_AMBA
> > +	select ARM_GIC
> > +	select CACHE_L2X0
> > +	select CLKDEV_LOOKUP
> > +	select CPU_V7
> > +	select DW_APB_TIMER
> > +	select DW_APB_TIMER_OF
> > +	select GENERIC_CLOCKEVENTS
> > +	select GPIO_PL061 if GPIOLIB
> > +	select HAVE_ARM_SCU
> > +	select SPARSE_IRQ
> > +	select USE_OF
> > +	help
> > +	  This enables support for Altera SOCFPGA Cyclone V platform
> 
> Please select COMMON_CLK as well to use the generic clock implementation.
> 
> > diff --git a/arch/arm/mach-socfpga/clock.c b/arch/arm/mach-socfpga/clock.c
> > new file mode 100644
> > index 0000000..79f3890
> > --- /dev/null
> > +++ b/arch/arm/mach-socfpga/clock.c
> > @@ -0,0 +1,45 @@
> 
> > +#include <linux/clkdev.h>
> > +
> > +#define SOCFPGA_MPU_PERIHCLK_FREQ_HZ			(800000000 / 4)
> > +#define SOCFPGA_L4_MAIN_CLK					(400000000)
> > +
> > +struct clk {
> > +	unsigned long		rate;
> > +};
> > +
> > +static struct clk apb_pclk = { .rate = 200000000};
> > +static struct clk i2c_clk = { .rate = 100000000};
> > +static struct clk spim_clk = { .rate = 100000000};
> > +static struct clk mpu_pclk = { .rate = SOCFPGA_MPU_PERIHCLK_FREQ_HZ};
> > +static struct clk l4_main_clk = { .rate = SOCFPGA_L4_MAIN_CLK};
> 
> Then move this file into drivers/clk/ using that code.

This doesn't quite make sense to me. You want me to move platform
specific information to drivers folder? I only see mxs and spear under
drivers/clk. Surely, you don't want me to create another socfpga folder
under there, or do you?

thanks,
Dinh
> 
> > diff --git a/arch/arm/mach-socfpga/include/mach/iomap.h b/arch/arm/mach-socfpga/include/mach/iomap.h
> > new file mode 100644
> > index 0000000..d5f8493
> > --- /dev/null
> > +++ b/arch/arm/mach-socfpga/include/mach/iomap.h
> > @@ -0,0 +1,33 @@
> > +/*
> > + *  Copyright (C) 2012 Altera Corporation <www.altera.com>
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License as published by
> > + * the Free Software Foundation; either version 2 of the License, or
> > + * (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > + * along with this program.  If not, see <http://www.gnu.org/licenses/>.
> > + */
> > +#ifndef __MACH_SOCFPGA_IOMAP_H
> > +#define __MACH_SOCFPGA_IOMAP_H
> > +
> > +#include <asm/sizes.h>
> > +
> > +/* macro to get at IO space when running virtually */
> > +/*
> > + * Statically mapped addresses:
> > + *
> > + * 10xx xxxx -> fbxx xxxx
> > + * 1exx xxxx -> fdxx xxxx
> > + * 1fxx xxxx -> fexx xxxx
> > + */
> > +#define IO_ADDRESS(x)		(((x) & 0x03ffffff) + 0xfb000000)
> > +#define __io_address(n)		IOMEM(IO_ADDRESS(n))
> > +
> > +#endif
> 
> This is unused, right? Just remove it.
> 
> > diff --git a/arch/arm/mach-socfpga/include/mach/irqs.h b/arch/arm/mach-socfpga/include/mach/irqs.h
> > new file mode 100644
> > index 0000000..5e344db
> > --- /dev/null
> > +++ b/arch/arm/mach-socfpga/include/mach/irqs.h
> > @@ -0,0 +1,24 @@
> > +/*
> > + *  Copyright (C) 2012 Altera Corporation
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License version 2 as
> > + * published by the Free Software Foundation.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > + * along with this program.  If not, see <http://www.gnu.org/licenses/>.
> > +*/
> > +
> > +#ifndef __MACH_IRQS_H
> > +#define __MACH_IRQS_H
> > +
> > +#define IRQ_SOCFPGA_GIC_START	32
> > +#define IRQ_LOCALWDOG		30
> > +#define MAX_GIC_NR		1
> > +
> > +#endif	/* __MACH_IRQS_H */
> 
> Same with this. Since you're using sparse IRQ, this file is not even included
> anywhere.
> 
> 	Arnd
> 

[RFC PATCHv2 1/2] ARM: socfpga: initial support for Altera's SOCFPGA platform.

[Arnd Bergmann]

On Tuesday 17 July 2012, Dinh.Nguyen wrote:
> > > +static struct clk apb_pclk = { .rate = 200000000};
> > > +static struct clk i2c_clk = { .rate = 100000000};
> > > +static struct clk spim_clk = { .rate = 100000000};
> > > +static struct clk mpu_pclk = { .rate = SOCFPGA_MPU_PERIHCLK_FREQ_HZ};
> > > +static struct clk l4_main_clk = { .rate = SOCFPGA_L4_MAIN_CLK};
> > 
> > Then move this file into drivers/clk/ using that code.
> 
> This doesn't quite make sense to me. You want me to move platform
> specific information to drivers folder? I only see mxs and spear under
> drivers/clk. Surely, you don't want me to create another socfpga folder
> under there, or do you?

Yes, that was the idea. We're in the process of moving most or all of
the clock drivers there, and the two that you see there are just the
start.

The distinction between "platform specific code" and "device driver"
is quite artificial anyway, and we're constantly moving it so that
we have less platform code.

	Arnd

[RFC PATCHv2 2/2] ARM: socfpga: Add board support for Altera's SOCFPGA Cyclone 5 HW

[dinguyen at altera.com]

From: Dinh Nguyen <dinguyen@altera.com>

- Mininum support for Altera's SOCFPGA Cyclone 5 hardware.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
---
 arch/arm/boot/dts/socfpga.dtsi           |   73 ++++++++++++++++++
 arch/arm/boot/dts/socfpga_cyclone5.dts   |  118 ++++++++++++++++++++++++++++++
 arch/arm/configs/socfpga_defconfig       |   83 +++++++++++++++++++++
 arch/arm/mach-socfpga/Kconfig            |    7 ++
 arch/arm/mach-socfpga/Makefile           |    6 ++
 arch/arm/mach-socfpga/Makefile.boot      |    1 +
 arch/arm/mach-socfpga/common.h           |    2 +-
 arch/arm/mach-socfpga/socfpga_cyclone5.c |   60 +++++++++++++++
 8 files changed, 349 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/socfpga.dtsi
 create mode 100644 arch/arm/boot/dts/socfpga_cyclone5.dts
 create mode 100644 arch/arm/configs/socfpga_defconfig
 create mode 100644 arch/arm/mach-socfpga/Kconfig
 create mode 100644 arch/arm/mach-socfpga/Makefile
 create mode 100644 arch/arm/mach-socfpga/Makefile.boot
 create mode 100644 arch/arm/mach-socfpga/socfpga_cyclone5.c

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
new file mode 100644
index 0000000..54489b5
--- /dev/null
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -0,0 +1,73 @@
+/*
+ *  Copyright (C) 2012 Altera <www.altera.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu at 0 {
+			compatible = "arm,cortex-a9";
+			device_type = "cpu";
+			reg = <0>;
+			next-level-cache = <&L2>;
+		};
+		cpu at 1 {
+			compatible = "arm,cortex-a9";
+			device_type = "cpu";
+			reg = <1>;
+			next-level-cache = <&L2>;
+		};
+	};
+
+	intc: intc at fffed000 {
+		compatible = "arm,cortex-a9-gic";
+		#interrupt-cells = <3>;
+		interrupt-controller;
+		reg = <0xfffed000 0x1000>,
+		      <0xfffec100 0x100>;
+	};
+
+	soc {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "simple-bus";
+		device_type = "soc";
+		interrupt-parent = <&intc>;
+		ranges;
+
+		/* Local timer */
+		timer at fffec600 {
+			compatible = "arm,cortex-a9-twd-timer";
+			reg = <0xfffec600 0x100>;
+			interrupts = <1 13 0xf04>;
+		};
+
+		L2: l2-cache at fffef000 {
+			compatible = "arm,pl310-cache";
+			reg = <0xfffef000 0x1000>;
+			interrupts = <0 38 0x04>;
+			cache-unified;
+			cache-level = <2>;
+		};
+	};
+};
diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dts b/arch/arm/boot/dts/socfpga_cyclone5.dts
new file mode 100644
index 0000000..710c773
--- /dev/null
+++ b/arch/arm/boot/dts/socfpga_cyclone5.dts
@@ -0,0 +1,118 @@
+/*
+ *  Copyright (C) 2012 Altera Corporation <www.altera.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/dts-v1/;
+/include/ "socfpga.dtsi"
+
+/ {
+	model = "Altera SOCFPGA Cyclone V";
+	compatible = "altr,socfpga-cyclone5";
+
+	aliases {
+		ethernet0 = &gmac0;
+		serial0 = &uart0;
+		serial1 = &uart1;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,57600";
+	};
+
+	memory {
+		name = "memory";
+		device_type = "memory";
+		reg = <0x0 0x10000000>; /* 256MB */
+	};
+
+	soc {
+		amba {
+			compatible = "arm,amba-bus";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			pdma: pdma at ffe01000 {
+				compatible = "arm,pl330", "arm,primecell";
+				reg = <0xffe01000 0x1000>;
+				interrupts = <0 180 4>;
+			};
+		};
+
+		apb_periphs {
+			compatible = "simple-bus";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			uart0: uart at ffc02000 {
+				compatible = "snps,dw-apb-uart";
+				reg = <0xffc02000 0x1000>;
+				clock-frequency = <7372800>;
+				interrupts = <0 162 4>;
+				reg-shift = <2>;
+				reg-io-width = <4>;
+			};
+
+		timer0: timer at ffc08000 {
+				compatible = "snps,dw-apb-timer-sp";
+				interrupts = <0 167 4>;
+				clock-frequency = <200000000>;
+				reg = <0xffc08000 0x1000>;
+			};
+
+		timer1: timer at ffc09000 {
+				compatible = "snps,dw-apb-timer-sp";
+				interrupts = <0 168 4>;
+				clock-frequency = <200000000>;
+				reg = <0xffc09000 0x1000>;
+			};
+
+		timer2: timer at ffd00000 {
+				compatible = "snps,dw-apb-timer-osc";
+				interrupts = <0 169 4>;
+				clock-frequency = <200000000>;
+				reg = <0xffd00000 0x1000>;
+			};
+
+		timer3: timer at ffd01000 {
+				compatible = "snps,dw-apb-timer-osc";
+				interrupts = <0 170 4>;
+				clock-frequency = <200000000>;
+				reg = <0xffd01000 0x1000>;
+			};
+
+			uart1: uart at ffc03000 {
+				compatible = "snps,dw-apb-uart";
+				reg = <0xffc03000 0x1000>;
+				clock-frequency = <7372800>;
+				interrupts = <0 163 4>;
+				reg-shift = <2>;
+				reg-io-width = <4>;
+			};
+
+         gmac0: stmmac at ff700000 {
+            compatible = "st,spear600-gmac";
+            reg = <0xff700000 0x2000>;
+            interrupts = <0 115 4>;
+            interrupt-names = "macirq";
+            mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
+            phy-mode = "gmii";
+            };
+
+		};
+	};
+};
diff --git a/arch/arm/configs/socfpga_defconfig b/arch/arm/configs/socfpga_defconfig
new file mode 100644
index 0000000..0ac1293
--- /dev/null
+++ b/arch/arm/configs/socfpga_defconfig
@@ -0,0 +1,83 @@
+CONFIG_EXPERIMENTAL=y
+CONFIG_SYSVIPC=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_CGROUPS=y
+CONFIG_CPUSETS=y
+CONFIG_NAMESPACES=y
+CONFIG_EMBEDDED=y
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_SOCFPGA=y
+CONFIG_MACH_SOCFPGA_CYCLONE5=y
+CONFIG_ARM_THUMBEE=y
+# CONFIG_CACHE_L2X0 is not set
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_VMSPLIT_2G=y
+CONFIG_NR_CPUS=2
+CONFIG_AEABI=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE=""
+CONFIG_VFP=y
+CONFIG_NEON=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_NET_KEY_MIGRATE=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_PROC_DEVICETREE=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=2
+CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_SCSI=y
+# CONFIG_SCSI_PROC_FS is not set
+CONFIG_BLK_DEV_SD=y
+# CONFIG_SCSI_LOWLEVEL is not set
+CONFIG_NETDEVICES=y
+CONFIG_STMMAC_ETH=y
+# CONFIG_STMMAC_PHY_ID_ZERO_WORKAROUND is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_SERIO_SERPORT is not set
+CONFIG_SERIO_AMBAKMI=y
+CONFIG_LEGACY_PTY_COUNT=16
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=2
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+CONFIG_SERIAL_8250_DW=y
+# CONFIG_RTC_HCTOSYS is not set
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
+CONFIG_VFAT_FS=y
+CONFIG_NTFS_FS=y
+CONFIG_NTFS_RW=y
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_SCHED_DEBUG is not set
+CONFIG_DEBUG_INFO=y
+CONFIG_ENABLE_DEFAULT_TRACERS=y
+CONFIG_DEBUG_USER=y
+CONFIG_XZ_DEC=y
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
new file mode 100644
index 0000000..133fc89
--- /dev/null
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -0,0 +1,7 @@
+config MACH_SOCFPGA_CYCLONE5
+       bool "SOCFPGA Cyclone5 platform"
+       select COMMON_CLK
+       select HAVE_SMP
+       select PLAT_SOCFPGA_ETH
+       help
+         Include support for the Altera(R) Cyclone5 development platform.
diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
new file mode 100644
index 0000000..c994b40
--- /dev/null
+++ b/arch/arm/mach-socfpga/Makefile
@@ -0,0 +1,6 @@
+#
+# Makefile for the linux kernel.
+#
+
+obj-y					:= clock.o
+obj-$(CONFIG_MACH_SOCFPGA_CYCLONE5)	+= socfpga_cyclone5.o
diff --git a/arch/arm/mach-socfpga/Makefile.boot b/arch/arm/mach-socfpga/Makefile.boot
new file mode 100644
index 0000000..dae9661
--- /dev/null
+++ b/arch/arm/mach-socfpga/Makefile.boot
@@ -0,0 +1 @@
+zreladdr-y	:= 0x00008000
diff --git a/arch/arm/mach-socfpga/common.h b/arch/arm/mach-socfpga/common.h
index e66587f..ba90e7a 100644
--- a/arch/arm/mach-socfpga/common.h
+++ b/arch/arm/mach-socfpga/common.h
@@ -18,6 +18,6 @@
 #ifndef __MACH_SOCFPGA_COMMON_H
 #define __MACH_SOCFPGA_COMMON_H
 
-extern struct sys_timer socfpga_timer;
+extern struct sys_timer dw_apb_timer;
 
 #endif
diff --git a/arch/arm/mach-socfpga/socfpga_cyclone5.c b/arch/arm/mach-socfpga/socfpga_cyclone5.c
new file mode 100644
index 0000000..e2748c7
--- /dev/null
+++ b/arch/arm/mach-socfpga/socfpga_cyclone5.c
@@ -0,0 +1,60 @@
+/*
+ *  Copyright (C) 2012 Altera Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <linux/dw_apb_timer.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/hardware/gic.h>
+#include <asm/mach/arch.h>
+
+#include "common.h"
+
+const static struct of_device_id irq_match[] = {
+	{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
+	{}
+};
+
+static void __init gic_init_irq(void)
+{
+	of_irq_init(irq_match);
+}
+
+static void socfpga_cyclone5_restart(char mode, const char *cmd)
+{
+	/* TODO: */
+}
+
+static void __init socfpga_cyclone5_init(void)
+{
+	l2x0_of_init(0, ~0UL);
+	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
+
+static const char *altera_dt_match[] = {
+	"altr,socfpga-cyclone5",
+	NULL
+};
+
+DT_MACHINE_START(SOCFPGA_CYCLONE5, "Altera SOCFPGA Cyclone V")
+	.init_irq	= gic_init_irq,
+	.handle_irq     = gic_handle_irq,
+	.timer		= &dw_apb_timer,
+	.init_machine	= socfpga_cyclone5_init,
+	.restart	= socfpga_cyclone5_restart,
+	.dt_compat	= altera_dt_match,
+MACHINE_END
-- 
1.7.9.5

[RFC PATCHv2 2/2] ARM: socfpga: Add board support for Altera's SOCFPGA Cyclone 5 HW

[Rob Herring]

On 07/12/2012 12:26 PM, dinguyen at altera.com wrote:
> From: Dinh Nguyen <dinguyen@altera.com>
> 
> - Mininum support for Altera's SOCFPGA Cyclone 5 hardware.
> 
> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
> Reviewed-by: Pavel Machek <pavel@denx.de>

Two comments below, but otherwise:

Reviewed-by: Rob Herring <rob.herring@calxeda.com>

> ---
>  arch/arm/boot/dts/socfpga.dtsi           |   73 ++++++++++++++++++
>  arch/arm/boot/dts/socfpga_cyclone5.dts   |  118 ++++++++++++++++++++++++++++++
>  arch/arm/configs/socfpga_defconfig       |   83 +++++++++++++++++++++
>  arch/arm/mach-socfpga/Kconfig            |    7 ++
>  arch/arm/mach-socfpga/Makefile           |    6 ++
>  arch/arm/mach-socfpga/Makefile.boot      |    1 +
>  arch/arm/mach-socfpga/common.h           |    2 +-
>  arch/arm/mach-socfpga/socfpga_cyclone5.c |   60 +++++++++++++++

I don't think this patch split makes too much sense. I would put all but
the dts files and defconfig in the first patch.


> diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
> new file mode 100644
> index 0000000..133fc89
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/Kconfig
> @@ -0,0 +1,7 @@
> +config MACH_SOCFPGA_CYCLONE5
> +       bool "SOCFPGA Cyclone5 platform"
> +       select COMMON_CLK
> +       select HAVE_SMP
> +       select PLAT_SOCFPGA_ETH
> +       help
> +         Include support for the Altera(R) Cyclone5 development platform.

You don't need a config option for a machine with DT.

Rob

[RFC PATCHv2 2/2] ARM: socfpga: Add board support for Altera's SOCFPGA Cyclone 5 HW

[Thomas Petazzoni]

Le Mon, 16 Jul 2012 17:43:34 -0500,
Rob Herring <robherring2@gmail.com> a ?crit :

> > diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
> > new file mode 100644
> > index 0000000..133fc89
> > --- /dev/null
> > +++ b/arch/arm/mach-socfpga/Kconfig
> > @@ -0,0 +1,7 @@
> > +config MACH_SOCFPGA_CYCLONE5
> > +       bool "SOCFPGA Cyclone5 platform"
> > +       select COMMON_CLK
> > +       select HAVE_SMP
> > +       select PLAT_SOCFPGA_ETH
> > +       help
> > +         Include support for the Altera(R) Cyclone5 development platform.
> 
> You don't need a config option for a machine with DT.

Ah, interesting, I was precisely going to send an e-mail today about
this, because we currently have different cases in tree:

 * In mach-tegra/Kconfig, there is one Kconfig option per-board, and
   then mach-tegra/Makefile.boot contains lines like
   dtb-$(CONFIG_MACH_<board>) += <board>.dtb. So there is one Kconfig
   option per-board, and a .dtb generation per-board.

 * In mach-at91/Kconfig, there is only one Kconfig option to support
   all DT-based platforms (CONFIG_MACH_AT91SAM_DT), and
   mach-at91/Makefile.boot generates the .dtb files for all boards as
   soon as CONFIG_MACH_AT91SAM_DT is enabled. So very different
   strategy from mach-tegra.

 * In mach-mxs/Kconfig, there is only one Kconfig option to support all
   DT-based platforms (MACH_MXS_DT), but the mach-mxs/Makefile.boot
   does not have any dtb-... += line.

Which approach is the correct one? My feeling would be that the
mach-at91 approach is the right one, because it doesn't make sense to
have one Kconfig option per board when we use the device tree. Is this
correct?

Best regards,

Thomas
-- 
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

[RFC PATCHv2 2/2] ARM: socfpga: Add board support for Altera's SOCFPGA Cyclone 5 HW

[Thomas Petazzoni]

Hello,

Le Thu, 12 Jul 2012 12:26:16 -0500,
<dinguyen@altera.com> a ?crit :

> diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dts b/arch/arm/boot/dts/socfpga_cyclone5.dts
> new file mode 100644
> index 0000000..710c773
> --- /dev/null
> +++ b/arch/arm/boot/dts/socfpga_cyclone5.dts
> @@ -0,0 +1,118 @@
> +/*
> + *  Copyright (C) 2012 Altera Corporation <www.altera.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program.  If not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +/dts-v1/;
> +/include/ "socfpga.dtsi"
> +
> +/ {
> +	model = "Altera SOCFPGA Cyclone V";
> +	compatible = "altr,socfpga-cyclone5";
> +
> +	aliases {
> +		ethernet0 = &gmac0;
> +		serial0 = &uart0;
> +		serial1 = &uart1;
> +	};
> +
> +	chosen {
> +		bootargs = "console=ttyS0,57600";
> +	};
> +
> +	memory {
> +		name = "memory";
> +		device_type = "memory";
> +		reg = <0x0 0x10000000>; /* 256MB */
> +	};
> +
> +	soc {
> +		amba {
> +			compatible = "arm,amba-bus";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			ranges;
> +
> +			pdma: pdma at ffe01000 {
> +				compatible = "arm,pl330", "arm,primecell";
> +				reg = <0xffe01000 0x1000>;
> +				interrupts = <0 180 4>;
> +			};
> +		};
> +
> +		apb_periphs {
> +			compatible = "simple-bus";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			ranges;
> +
> +			uart0: uart at ffc02000 {
> +				compatible = "snps,dw-apb-uart";
> +				reg = <0xffc02000 0x1000>;
> +				clock-frequency = <7372800>;
> +				interrupts = <0 162 4>;
> +				reg-shift = <2>;
> +				reg-io-width = <4>;
> +			};
> +
> +		timer0: timer at ffc08000 {
> +				compatible = "snps,dw-apb-timer-sp";
> +				interrupts = <0 167 4>;
> +				clock-frequency = <200000000>;
> +				reg = <0xffc08000 0x1000>;
> +			};

There is an indentation problem here, the timer0 (and the following)
should be at the same level as uart0.

Also, are all those peripherals (uarts, timers) really board-specific?
I.e, are they synthesized on the FPGA part, or are they part of the ARM
SoC, in which case they should be listed in the .dtsi and not in
the .dts.

Best regards,

Thomas
-- 
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

[RFC PATCHv2 2/2] ARM: socfpga: Add board support for Altera's SOCFPGA Cyclone 5 HW

[Dinh.Nguyen]

On Tue, 2012-07-17 at 09:13 +0200, Thomas Petazzoni wrote:
> Hello,
> 
> Le Thu, 12 Jul 2012 12:26:16 -0500,
> <dinguyen@altera.com> a ?crit :
> 
> > diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dts b/arch/arm/boot/dts/socfpga_cyclone5.dts
> > new file mode 100644
> > index 0000000..710c773
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/socfpga_cyclone5.dts
> > @@ -0,0 +1,118 @@
> > +/*
> > + *  Copyright (C) 2012 Altera Corporation <www.altera.com>
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License as published by
> > + * the Free Software Foundation; either version 2 of the License, or
> > + * (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > + * along with this program.  If not, see <http://www.gnu.org/licenses/>.
> > + */
> > +
> > +/dts-v1/;
> > +/include/ "socfpga.dtsi"
> > +
> > +/ {
> > +	model = "Altera SOCFPGA Cyclone V";
> > +	compatible = "altr,socfpga-cyclone5";
> > +
> > +	aliases {
> > +		ethernet0 = &gmac0;
> > +		serial0 = &uart0;
> > +		serial1 = &uart1;
> > +	};
> > +
> > +	chosen {
> > +		bootargs = "console=ttyS0,57600";
> > +	};
> > +
> > +	memory {
> > +		name = "memory";
> > +		device_type = "memory";
> > +		reg = <0x0 0x10000000>; /* 256MB */
> > +	};
> > +
> > +	soc {
> > +		amba {
> > +			compatible = "arm,amba-bus";
> > +			#address-cells = <1>;
> > +			#size-cells = <1>;
> > +			ranges;
> > +
> > +			pdma: pdma at ffe01000 {
> > +				compatible = "arm,pl330", "arm,primecell";
> > +				reg = <0xffe01000 0x1000>;
> > +				interrupts = <0 180 4>;
> > +			};
> > +		};
> > +
> > +		apb_periphs {
> > +			compatible = "simple-bus";
> > +			#address-cells = <1>;
> > +			#size-cells = <1>;
> > +			ranges;
> > +
> > +			uart0: uart at ffc02000 {
> > +				compatible = "snps,dw-apb-uart";
> > +				reg = <0xffc02000 0x1000>;
> > +				clock-frequency = <7372800>;
> > +				interrupts = <0 162 4>;
> > +				reg-shift = <2>;
> > +				reg-io-width = <4>;
> > +			};
> > +
> > +		timer0: timer at ffc08000 {
> > +				compatible = "snps,dw-apb-timer-sp";
> > +				interrupts = <0 167 4>;
> > +				clock-frequency = <200000000>;
> > +				reg = <0xffc08000 0x1000>;
> > +			};
> 
> There is an indentation problem here, the timer0 (and the following)
> should be at the same level as uart0.

Will fix..

> 
> Also, are all those peripherals (uarts, timers) really board-specific?
> I.e, are they synthesized on the FPGA part, or are they part of the ARM
> SoC, in which case they should be listed in the .dtsi and not in
> the .dts.

Agreed. The peripherals are just part of the ARM SoC. 
> 
> Best regards,
> 
> Thomas

[RFC PATCHv2 2/2] ARM: socfpga: Add board support for Altera's SOCFPGA Cyclone 5 HW

[Arnd Bergmann]

On Thursday 12 July 2012, dinguyen at altera.com wrote:

> diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
> new file mode 100644
> index 0000000..133fc89
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/Kconfig
> @@ -0,0 +1,7 @@
> +config MACH_SOCFPGA_CYCLONE5
> +       bool "SOCFPGA Cyclone5 platform"
> +       select COMMON_CLK
> +       select HAVE_SMP
> +       select PLAT_SOCFPGA_ETH
> +       help
> +         Include support for the Altera(R) Cyclone5 development platform.

Ah, so you actually select COMMON_CLK already. I wonder why that works,
since you are also defining your own "struct clk" that gets passed into
the clk_lookup table. I guess there is a bug somewhere.

> diff --git a/arch/arm/mach-socfpga/common.h b/arch/arm/mach-socfpga/common.h
> index e66587f..ba90e7a 100644
> --- a/arch/arm/mach-socfpga/common.h
> +++ b/arch/arm/mach-socfpga/common.h
> @@ -18,6 +18,6 @@
>  #ifndef __MACH_SOCFPGA_COMMON_H
>  #define __MACH_SOCFPGA_COMMON_H
>  
> -extern struct sys_timer socfpga_timer;
> +extern struct sys_timer dw_apb_timer;
>  
>  #endif

This should get folded into the first patch.

> +static const char *altera_dt_match[] = {
> +	"altr,socfpga-cyclone5",
> +	NULL
> +};
> +
> +DT_MACHINE_START(SOCFPGA_CYCLONE5, "Altera SOCFPGA Cyclone V")
> +	.init_irq	= gic_init_irq,
> +	.handle_irq     = gic_handle_irq,
> +	.timer		= &dw_apb_timer,
> +	.init_machine	= socfpga_cyclone5_init,
> +	.restart	= socfpga_cyclone5_restart,
> +	.dt_compat	= altera_dt_match,
> +MACHINE_END

I think you should not require more than one such file per platform,
so I would either name the entire platform cyclone5 instead of socfpga,
or if you expect this to all stay compatible with future products,
remove the cyclone5 name here and just call it all socfpga. The dt_match
array can still list multiple compatible strings, one for each family
or so.

	Arnd

[RFC PATCHv2 0/2]arm: socfpga: Add initial support for Altera's SOCFPGA HW

[Pavel Machek]

Hi!

Arnd, do you think this is good enough to go to the next tree? It
is new architecture, it should not break anything, I believe we
addressed all the issues raised in the review, and noone is reporting
new ones.

Plus, if we could make initial support into 3.6, that would be very
nice :-).

Thanks,
									Pavel

On Thu 2012-07-12 12:26:14, dinguyen at altera.com wrote:
> From: Dinh Nguyen <dinguyen@altera.com>
> 
> This patch series add minimal support for Altera's SOCFPGA hardward.
> 
> Changes since v1:
> - Incorporate changes suggested by Pavel Machek, Thommas Petazzoni,
>   Arnd Bergmann, and Rob Herring
> - Reduce the patch to a make as much use of DTS as possible
> 
> 
> Dinh Nguyen (2):
>   ARM: socfpga: initial support for Altera's SOCFPGA platform.
>   ARM: socfpga: Add board support for Altera's SOCFPGA Cyclone 5 HW
> 

-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

[RFC PATCHv2 0/2]arm: socfpga: Add initial support for Altera's SOCFPGA HW

[Arnd Bergmann]

On Monday 16 July 2012, Pavel Machek wrote:
> Arnd, do you think this is good enough to go to the next tree? It
> is new architecture, it should not break anything, I believe we
> addressed all the issues raised in the review, and noone is reporting
> new ones.
> 
> Plus, if we could make initial support into 3.6, that would be very
> nice :-).

I think we can make it for v3.6, but it's very late for that and I
haven't looked at it enough in the past. I have a few small
comments, so if you can address them quickly we can take it.

	Arnd

[RFC PATCHv2 0/2]arm: socfpga: Add initial support for Altera's SOCFPGA HW

[Dinh.Nguyen]

On Tue, 2012-07-17 at 15:43 +0000, Arnd Bergmann wrote:
> On Monday 16 July 2012, Pavel Machek wrote:
> > Arnd, do you think this is good enough to go to the next tree? It
> > is new architecture, it should not break anything, I believe we
> > addressed all the issues raised in the review, and noone is reporting
> > new ones.
> > 
> > Plus, if we could make initial support into 3.6, that would be very
> > nice :-).
> 
> I think we can make it for v3.6, but it's very late for that and I
> haven't looked at it enough in the past. I have a few small
> comments, so if you can address them quickly we can take it.

Hi Arnd. Thanks, please fire away your comments.
Dinh
> 
> 	Arnd
> 

[RFC PATCHv2 0/2]arm: socfpga: Add initial support for Altera's SOCFPGA HW

[Pavel Machek]

Hi!

> > > Arnd, do you think this is good enough to go to the next tree? It
> > > is new architecture, it should not break anything, I believe we
> > > addressed all the issues raised in the review, and noone is reporting
> > > new ones.
> > > 
> > > Plus, if we could make initial support into 3.6, that would be very
> > > nice :-).
> > 
> > I think we can make it for v3.6, but it's very late for that and I
> > haven't looked at it enough in the past. I have a few small
> > comments, so if you can address them quickly we can take it.
> 
> Hi Arnd. Thanks, please fire away your comments.

Arnd wanted quick reactions, so I took liberty of creating
PATCHv4. (You are marked in From: so you'll still get the credit
:-). I hope that is not a big problem.

I'm now pushing for-altera-0718 with the PATCHv4 (+ .config file).

Now, I guess at this point it would be useful to make our repository
public? 

(Oh, and cross the fingers for us so that it finally gets merged :-).

									Pavel
-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

[RFC PATCHv2 0/2]arm: socfpga: Add initial support for Altera's SOCFPGA HW

[Pavel Machek]

On Wed 2012-07-18 12:35:31, Pavel Machek wrote:
> Hi!
> 
> > > > Arnd, do you think this is good enough to go to the next tree? It
> > > > is new architecture, it should not break anything, I believe we
> > > > addressed all the issues raised in the review, and noone is reporting
> > > > new ones.
> > > > 
> > > > Plus, if we could make initial support into 3.6, that would be very
> > > > nice :-).
> > > 
> > > I think we can make it for v3.6, but it's very late for that and I
> > > haven't looked at it enough in the past. I have a few small
> > > comments, so if you can address them quickly we can take it.
> > 
> > Hi Arnd. Thanks, please fire away your comments.
> 
> Arnd wanted quick reactions, so I took liberty of creating
> PATCHv4. (You are marked in From: so you'll still get the credit
> :-). I hope that is not a big problem.
> 
> I'm now pushing for-altera-0718 with the PATCHv4 (+ .config file).
> 
> Now, I guess at this point it would be useful to make our repository
> public? 
> 
> (Oh, and cross the fingers for us so that it finally gets merged :-).

Ooops, this was not supposed to go to the lists. Sorry for the spam
:-(.
									Pavel
-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html