From mboxrd@z Thu Jan 1 00:00:00 1970 From: lee.jones@linaro.org (Lee Jones) Date: Thu, 22 Nov 2012 12:07:47 +0000 Subject: [PATCH 1/1] ARM: cache-l2x0: Fix compile time warnings when !CONFIG_OF Message-ID: <1353586067-9989-1-git-send-email-lee.jones@linaro.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Introduced by: 07bd005ed2457876f653fda12981708d737543df ARM: 7547/1: cache-l2x0: add support for Aurora L2 cache ctrl arch/arm/mm/cache-l2x0.c:37:12: warning: ?l2_wt_override? defined but not used arch/arm/mm/cache-l2x0.c:292:22: warning: ?calc_range_end? defined but not used arch/arm/mm/cache-l2x0.c:315:13: warning: ?aurora_pa_range? defined but not used arch/arm/mm/cache-l2x0.c:328:13: warning: ?aurora_inv_range? defined but not used arch/arm/mm/cache-l2x0.c:347:13: warning: ?aurora_clean_range? defined but not used arch/arm/mm/cache-l2x0.c:365:13: warning: ?aurora_flush_range? defined but not used Cc: Russell King Cc: Gregory CLEMENT Signed-off-by: Lee Jones --- arch/arm/mm/cache-l2x0.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index bfb5986..25a9226 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -34,7 +34,6 @@ static DEFINE_RAW_SPINLOCK(l2x0_lock); static u32 l2x0_way_mask; /* Bitmask of active ways */ static u32 l2x0_size; static unsigned long sync_reg_offset = L2X0_CACHE_SYNC; -static int l2_wt_override; /* Aurora don't have the cache ID register available, so we have to * pass it though the device tree */ @@ -284,6 +283,10 @@ static void l2x0_flush_range(unsigned long start, unsigned long end) raw_spin_unlock_irqrestore(&l2x0_lock, flags); } +#ifdef CONFIG_OF + +static int l2_wt_override; + /* * Note that the end addresses passed to Linux primitives are * noninclusive, while the hardware cache range operations use @@ -375,6 +378,7 @@ static void aurora_flush_range(unsigned long start, unsigned long end) } } } +#endif static void l2x0_disable(void) { -- 1.7.9.5