* [PATCH 1/7] dmaengine: ste_dma40: reset priority bit for logical channels
2012-12-12 9:37 [PATCH 0/7] various ste_dma40 fixes Fabio Baltieri
@ 2012-12-12 9:37 ` Fabio Baltieri
2012-12-12 9:37 ` [PATCH 2/7] dmaengine: ste_dma40: use writel_relaxed for lcxa Fabio Baltieri
` (6 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Fabio Baltieri @ 2012-12-12 9:37 UTC (permalink / raw)
To: linux-arm-kernel
From: Narayanan G <narayanan.gopalakrishnan@stericsson.com>
This patch sets the SSCFG/SDCFG bit[7] PRI only for physical channel
requests with high priority. For logical channels, this bit will be
zero.
Signed-off-by: Narayanan G <narayanan.gopalakrishnan@stericsson.com>
Reviewed-by: Rabin Vincent <rabin.vincent@stericsson.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
---
drivers/dma/ste_dma40_ll.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/dma/ste_dma40_ll.c b/drivers/dma/ste_dma40_ll.c
index cad9e1d..536e848 100644
--- a/drivers/dma/ste_dma40_ll.c
+++ b/drivers/dma/ste_dma40_ll.c
@@ -102,17 +102,18 @@ void d40_phy_cfg(struct stedma40_chan_cfg *cfg,
src |= cfg->src_info.data_width << D40_SREG_CFG_ESIZE_POS;
dst |= cfg->dst_info.data_width << D40_SREG_CFG_ESIZE_POS;
+ /* Set the priority bit to high for the physical channel */
+ if (cfg->high_priority) {
+ src |= 1 << D40_SREG_CFG_PRI_POS;
+ dst |= 1 << D40_SREG_CFG_PRI_POS;
+ }
+
} else {
/* Logical channel */
dst |= 1 << D40_SREG_CFG_LOG_GIM_POS;
src |= 1 << D40_SREG_CFG_LOG_GIM_POS;
}
- if (cfg->high_priority) {
- src |= 1 << D40_SREG_CFG_PRI_POS;
- dst |= 1 << D40_SREG_CFG_PRI_POS;
- }
-
if (cfg->src_info.big_endian)
src |= 1 << D40_SREG_CFG_LBE_POS;
if (cfg->dst_info.big_endian)
--
1.7.12.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 2/7] dmaengine: ste_dma40: use writel_relaxed for lcxa
2012-12-12 9:37 [PATCH 0/7] various ste_dma40 fixes Fabio Baltieri
2012-12-12 9:37 ` [PATCH 1/7] dmaengine: ste_dma40: reset priority bit for logical channels Fabio Baltieri
@ 2012-12-12 9:37 ` Fabio Baltieri
2012-12-12 9:37 ` [PATCH 3/7] dmaengine: ste_dma40: set dma max seg size Fabio Baltieri
` (5 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Fabio Baltieri @ 2012-12-12 9:37 UTC (permalink / raw)
To: linux-arm-kernel
From: Per Forlin <per.forlin@stericsson.com>
lcpa and lcla are written often and the cache_sync() overhead in writel
is costly, especially for wlan where every single network packet (in RX
mode) corresponds to a separate DMA transfer.
Signed-off-by: Per Forlin <per.forlin@stericsson.com>
Reviewed-by: Narayanan Gopalakrishnan <narayanan.gopalakrishnan@stericsson.com>
Reviewed-by: Rabin Vincent <rabin.vincent@stericsson.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
---
drivers/dma/ste_dma40_ll.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/dma/ste_dma40_ll.c b/drivers/dma/ste_dma40_ll.c
index 536e848..c0781ae 100644
--- a/drivers/dma/ste_dma40_ll.c
+++ b/drivers/dma/ste_dma40_ll.c
@@ -332,10 +332,10 @@ void d40_log_lli_lcpa_write(struct d40_log_lli_full *lcpa,
{
d40_log_lli_link(lli_dst, lli_src, next, flags);
- writel(lli_src->lcsp02, &lcpa[0].lcsp0);
- writel(lli_src->lcsp13, &lcpa[0].lcsp1);
- writel(lli_dst->lcsp02, &lcpa[0].lcsp2);
- writel(lli_dst->lcsp13, &lcpa[0].lcsp3);
+ writel_relaxed(lli_src->lcsp02, &lcpa[0].lcsp0);
+ writel_relaxed(lli_src->lcsp13, &lcpa[0].lcsp1);
+ writel_relaxed(lli_dst->lcsp02, &lcpa[0].lcsp2);
+ writel_relaxed(lli_dst->lcsp13, &lcpa[0].lcsp3);
}
void d40_log_lli_lcla_write(struct d40_log_lli *lcla,
@@ -345,10 +345,10 @@ void d40_log_lli_lcla_write(struct d40_log_lli *lcla,
{
d40_log_lli_link(lli_dst, lli_src, next, flags);
- writel(lli_src->lcsp02, &lcla[0].lcsp02);
- writel(lli_src->lcsp13, &lcla[0].lcsp13);
- writel(lli_dst->lcsp02, &lcla[1].lcsp02);
- writel(lli_dst->lcsp13, &lcla[1].lcsp13);
+ writel_relaxed(lli_src->lcsp02, &lcla[0].lcsp02);
+ writel_relaxed(lli_src->lcsp13, &lcla[0].lcsp13);
+ writel_relaxed(lli_dst->lcsp02, &lcla[1].lcsp02);
+ writel_relaxed(lli_dst->lcsp13, &lcla[1].lcsp13);
}
static void d40_log_fill_lli(struct d40_log_lli *lli,
--
1.7.12.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 3/7] dmaengine: ste_dma40: set dma max seg size
2012-12-12 9:37 [PATCH 0/7] various ste_dma40 fixes Fabio Baltieri
2012-12-12 9:37 ` [PATCH 1/7] dmaengine: ste_dma40: reset priority bit for logical channels Fabio Baltieri
2012-12-12 9:37 ` [PATCH 2/7] dmaengine: ste_dma40: use writel_relaxed for lcxa Fabio Baltieri
@ 2012-12-12 9:37 ` Fabio Baltieri
2012-12-12 9:37 ` [PATCH 4/7] dmaengine: ste_dma40: limit burst size to 16 Fabio Baltieri
` (4 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Fabio Baltieri @ 2012-12-12 9:37 UTC (permalink / raw)
To: linux-arm-kernel
From: Per Forlin <per.forlin@stericsson.com>
Maximum DMA seg size is (0xffff x data_width). If max seg
size is not set it deafults to 64k. This results in failure
if transferring 64k in byte mode.
Large seg sizes may be supported by splitting large transfer.
Signed-off-by: Per Forlin <per.forlin@stericsson.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
---
drivers/dma/ste_dma40.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index ae55091..16c96f5 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -345,6 +345,7 @@ struct d40_base {
int irq;
int num_phy_chans;
int num_log_chans;
+ struct device_dma_parameters dma_parms;
struct dma_device dma_both;
struct dma_device dma_slave;
struct dma_device dma_memcpy;
@@ -3363,6 +3364,13 @@ static int __init d40_probe(struct platform_device *pdev)
if (err)
goto failure;
+ base->dev->dma_parms = &base->dma_parms;
+ err = dma_set_max_seg_size(base->dev, STEDMA40_MAX_SEG_SIZE);
+ if (err) {
+ d40_err(&pdev->dev, "Failed to set dma max seg size\n");
+ goto failure;
+ }
+
d40_hw_init(base);
dev_info(base->dev, "initialized\n");
--
1.7.12.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 4/7] dmaengine: ste_dma40: limit burst size to 16
2012-12-12 9:37 [PATCH 0/7] various ste_dma40 fixes Fabio Baltieri
` (2 preceding siblings ...)
2012-12-12 9:37 ` [PATCH 3/7] dmaengine: ste_dma40: set dma max seg size Fabio Baltieri
@ 2012-12-12 9:37 ` Fabio Baltieri
2012-12-12 9:37 ` [PATCH 5/7] dmaengine: ste_dma40: don't check for pm_runtime_suspended() Fabio Baltieri
` (3 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Fabio Baltieri @ 2012-12-12 9:37 UTC (permalink / raw)
To: linux-arm-kernel
From: Per Forlin <per.forlin@stericsson.com>
The client is not aware of the maximum burst size in the dma driver. If
the size exceeds 16 set max to 16.
Signed-off-by: Per Forlin <per.forlin@stericsson.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
---
drivers/dma/ste_dma40.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index 16c96f5..0b80ee9 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -2579,6 +2579,14 @@ static int d40_set_runtime_config(struct dma_chan *chan,
return -EINVAL;
}
+ if (src_maxburst > 16) {
+ src_maxburst = 16;
+ dst_maxburst = src_maxburst * src_addr_width / dst_addr_width;
+ } else if (dst_maxburst > 16) {
+ dst_maxburst = 16;
+ src_maxburst = dst_maxburst * dst_addr_width / src_addr_width;
+ }
+
ret = dma40_config_to_halfchannel(d40c, &cfg->src_info,
src_addr_width,
src_maxburst);
--
1.7.12.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 5/7] dmaengine: ste_dma40: don't check for pm_runtime_suspended()
2012-12-12 9:37 [PATCH 0/7] various ste_dma40 fixes Fabio Baltieri
` (3 preceding siblings ...)
2012-12-12 9:37 ` [PATCH 4/7] dmaengine: ste_dma40: limit burst size to 16 Fabio Baltieri
@ 2012-12-12 9:37 ` Fabio Baltieri
2012-12-12 9:37 ` [PATCH 6/7] dmaengine: ste_dma40: don't allow high priority dest event lines Fabio Baltieri
` (2 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Fabio Baltieri @ 2012-12-12 9:37 UTC (permalink / raw)
To: linux-arm-kernel
From: Narayanan G <narayanan.gopalakrishnan@stericsson.com>
The check for runtime suspend is not needed during a regular suspend, as
the framework takes care of this. This fixes the issue of DMA driver
not letting the system to go to deepsleep in the first attempt.
Signed-off-by: Narayanan G <narayanan.gopalakrishnan@stericsson.com>
Reviewed-by: Rabin Vincent <rabin.vincent@stericsson.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
---
drivers/dma/ste_dma40.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index 0b80ee9..d8d58d9 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -2783,8 +2783,6 @@ static int dma40_pm_suspend(struct device *dev)
struct platform_device *pdev = to_platform_device(dev);
struct d40_base *base = platform_get_drvdata(pdev);
int ret = 0;
- if (!pm_runtime_suspended(dev))
- return -EBUSY;
if (base->lcpa_regulator)
ret = regulator_disable(base->lcpa_regulator);
--
1.7.12.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 6/7] dmaengine: ste_dma40: don't allow high priority dest event lines
2012-12-12 9:37 [PATCH 0/7] various ste_dma40 fixes Fabio Baltieri
` (4 preceding siblings ...)
2012-12-12 9:37 ` [PATCH 5/7] dmaengine: ste_dma40: don't check for pm_runtime_suspended() Fabio Baltieri
@ 2012-12-12 9:37 ` Fabio Baltieri
2012-12-12 9:37 ` [PATCH 7/7] dmaengine: ste_dma40: support fixed physical channel allocation Fabio Baltieri
2012-12-12 10:16 ` [PATCH 0/7] various ste_dma40 fixes Fabio Baltieri
7 siblings, 0 replies; 9+ messages in thread
From: Fabio Baltieri @ 2012-12-12 9:37 UTC (permalink / raw)
To: linux-arm-kernel
From: Rabin Vincent <rabin.vincent@stericsson.com>
Hardware bug: when a logical channel is triggerred by a high priority
destination event line, an extra packet transaction is generated in case
of important data write response latency on previous logical channel A
and if the source transfer of current logical channel B is already
completed and if no other channel with a higher priority than B is
waiting for execution.
Software workaround: do not set the high priority level for the
destination event lines that trigger logical channels.
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Reviewed-by: Shreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
---
drivers/dma/ste_dma40.c | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index d8d58d9..f871df6 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -2181,11 +2181,24 @@ static void __d40_set_prio_rt(struct d40_chan *d40c, int dev_type, bool src)
{
bool realtime = d40c->dma_cfg.realtime;
bool highprio = d40c->dma_cfg.high_priority;
- u32 prioreg = highprio ? D40_DREG_PSEG1 : D40_DREG_PCEG1;
u32 rtreg = realtime ? D40_DREG_RSEG1 : D40_DREG_RCEG1;
u32 event = D40_TYPE_TO_EVENT(dev_type);
u32 group = D40_TYPE_TO_GROUP(dev_type);
u32 bit = 1 << event;
+ u32 prioreg;
+
+ /*
+ * Due to a hardware bug, in some cases a logical channel triggered by
+ * a high priority destination event line can generate extra packet
+ * transactions.
+ *
+ * The workaround is to not set the high priority level for the
+ * destination event lines that trigger logical channels.
+ */
+ if (!src && chan_is_logical(d40c))
+ highprio = false;
+
+ prioreg = highprio ? D40_DREG_PSEG1 : D40_DREG_PCEG1;
/* Destination event lines are stored in the upper halfword */
if (!src)
--
1.7.12.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 7/7] dmaengine: ste_dma40: support fixed physical channel allocation
2012-12-12 9:37 [PATCH 0/7] various ste_dma40 fixes Fabio Baltieri
` (5 preceding siblings ...)
2012-12-12 9:37 ` [PATCH 6/7] dmaengine: ste_dma40: don't allow high priority dest event lines Fabio Baltieri
@ 2012-12-12 9:37 ` Fabio Baltieri
2012-12-12 10:16 ` [PATCH 0/7] various ste_dma40 fixes Fabio Baltieri
7 siblings, 0 replies; 9+ messages in thread
From: Fabio Baltieri @ 2012-12-12 9:37 UTC (permalink / raw)
To: linux-arm-kernel
From: Gerald Baeza <gerald.baeza@stericsson.com>
This patch makes existing use_fixed_channel field (of stedma40_chan_cfg
structure) applicable to physical channels.
Signed-off-by: Gerald Baeza <gerald.baeza@stericsson.com>
Tested-by: Yannick Fertre <yannick.fertre@stericsson.com>
Reviewed-by: Per Forlin <per.forlin@stericsson.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
---
drivers/dma/ste_dma40.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index f871df6..efe8be7 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -1712,10 +1712,12 @@ static int d40_allocate_channel(struct d40_chan *d40c, bool *first_phy_user)
int i;
int j;
int log_num;
+ int num_phy_chans;
bool is_src;
bool is_log = d40c->dma_cfg.mode == STEDMA40_MODE_LOGICAL;
phys = d40c->base->phy_res;
+ num_phy_chans = d40c->base->num_phy_chans;
if (d40c->dma_cfg.dir == STEDMA40_PERIPH_TO_MEM) {
dev_type = d40c->dma_cfg.src_dev_type;
@@ -1736,12 +1738,19 @@ static int d40_allocate_channel(struct d40_chan *d40c, bool *first_phy_user)
if (!is_log) {
if (d40c->dma_cfg.dir == STEDMA40_MEM_TO_MEM) {
/* Find physical half channel */
- for (i = 0; i < d40c->base->num_phy_chans; i++) {
-
+ if (d40c->dma_cfg.use_fixed_channel) {
+ i = d40c->dma_cfg.phy_channel;
if (d40_alloc_mask_set(&phys[i], is_src,
0, is_log,
first_phy_user))
goto found_phy;
+ } else {
+ for (i = 0; i < num_phy_chans; i++) {
+ if (d40_alloc_mask_set(&phys[i], is_src,
+ 0, is_log,
+ first_phy_user))
+ goto found_phy;
+ }
}
} else
for (j = 0; j < d40c->base->num_phy_chans; j += 8) {
--
1.7.12.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 0/7] various ste_dma40 fixes
2012-12-12 9:37 [PATCH 0/7] various ste_dma40 fixes Fabio Baltieri
` (6 preceding siblings ...)
2012-12-12 9:37 ` [PATCH 7/7] dmaengine: ste_dma40: support fixed physical channel allocation Fabio Baltieri
@ 2012-12-12 10:16 ` Fabio Baltieri
7 siblings, 0 replies; 9+ messages in thread
From: Fabio Baltieri @ 2012-12-12 10:16 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Dec 12, 2012 at 10:37:14AM +0100, Fabio Baltieri wrote:
> this patch set contains some fixes for the ste_dma40 driver.
Adding DMA maintainers to the thread. Want me to resend the whole set?
Thanks,
Fabio
--
Fabio Baltieri
^ permalink raw reply [flat|nested] 9+ messages in thread