* [PATCH 1/6] ARM: dts: add device_type prop to cpu nodes on Calxeda platforms
2012-12-30 16:15 [PATCH 0/6] highbank fixes for 3.8 Rob Herring
@ 2012-12-30 16:15 ` Rob Herring
2012-12-30 16:15 ` [PATCH 2/6] ARM: dts: fix highbank cpu mpidr values Rob Herring
` (5 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Rob Herring @ 2012-12-30 16:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
While device_type is considered deprecated, it is still needed for tools
like lshw to identify cpu nodes.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
arch/arm/boot/dts/ecx-2000.dts | 4 ++++
arch/arm/boot/dts/highbank.dts | 4 ++++
2 files changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts
index 46477ac..139b40c 100644
--- a/arch/arm/boot/dts/ecx-2000.dts
+++ b/arch/arm/boot/dts/ecx-2000.dts
@@ -32,6 +32,7 @@
cpu at 0 {
compatible = "arm,cortex-a15";
+ device_type = "cpu";
reg = <0>;
clocks = <&a9pll>;
clock-names = "cpu";
@@ -39,6 +40,7 @@
cpu at 1 {
compatible = "arm,cortex-a15";
+ device_type = "cpu";
reg = <1>;
clocks = <&a9pll>;
clock-names = "cpu";
@@ -46,6 +48,7 @@
cpu at 2 {
compatible = "arm,cortex-a15";
+ device_type = "cpu";
reg = <2>;
clocks = <&a9pll>;
clock-names = "cpu";
@@ -53,6 +56,7 @@
cpu at 3 {
compatible = "arm,cortex-a15";
+ device_type = "cpu";
reg = <3>;
clocks = <&a9pll>;
clock-names = "cpu";
diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts
index a9ae5d3..81e0bfa 100644
--- a/arch/arm/boot/dts/highbank.dts
+++ b/arch/arm/boot/dts/highbank.dts
@@ -32,6 +32,7 @@
cpu at 0 {
compatible = "arm,cortex-a9";
+ device_type = "cpu";
reg = <0>;
next-level-cache = <&L2>;
clocks = <&a9pll>;
@@ -40,6 +41,7 @@
cpu at 1 {
compatible = "arm,cortex-a9";
+ device_type = "cpu";
reg = <1>;
next-level-cache = <&L2>;
clocks = <&a9pll>;
@@ -48,6 +50,7 @@
cpu at 2 {
compatible = "arm,cortex-a9";
+ device_type = "cpu";
reg = <2>;
next-level-cache = <&L2>;
clocks = <&a9pll>;
@@ -56,6 +59,7 @@
cpu at 3 {
compatible = "arm,cortex-a9";
+ device_type = "cpu";
reg = <3>;
next-level-cache = <&L2>;
clocks = <&a9pll>;
--
1.7.10.4
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 2/6] ARM: dts: fix highbank cpu mpidr values
2012-12-30 16:15 [PATCH 0/6] highbank fixes for 3.8 Rob Herring
2012-12-30 16:15 ` [PATCH 1/6] ARM: dts: add device_type prop to cpu nodes on Calxeda platforms Rob Herring
@ 2012-12-30 16:15 ` Rob Herring
2013-01-06 2:10 ` Shawn Guo
2012-12-30 16:15 ` [PATCH 3/6] ARM: highbank: fix typos with hignbank in power request functions Rob Herring
` (4 subsequent siblings)
6 siblings, 1 reply; 9+ messages in thread
From: Rob Herring @ 2012-12-30 16:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
With the addition of commit a0ae0240 (ARM: kernel: add device tree init
map function), the cpu reg values must match the cpu mpidr register or we'll
get warnings. For some reason, the CLUSTERID on highbank is 9, so the reg
value needs to be 0x90n to quiet the warnings.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
arch/arm/boot/dts/highbank.dts | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts
index 81e0bfa..5927a8d 100644
--- a/arch/arm/boot/dts/highbank.dts
+++ b/arch/arm/boot/dts/highbank.dts
@@ -30,37 +30,37 @@
#address-cells = <1>;
#size-cells = <0>;
- cpu at 0 {
+ cpu at 900 {
compatible = "arm,cortex-a9";
device_type = "cpu";
- reg = <0>;
+ reg = <0x900>;
next-level-cache = <&L2>;
clocks = <&a9pll>;
clock-names = "cpu";
};
- cpu at 1 {
+ cpu at 901 {
compatible = "arm,cortex-a9";
device_type = "cpu";
- reg = <1>;
+ reg = <0x901>;
next-level-cache = <&L2>;
clocks = <&a9pll>;
clock-names = "cpu";
};
- cpu at 2 {
+ cpu at 902 {
compatible = "arm,cortex-a9";
device_type = "cpu";
- reg = <2>;
+ reg = <0x902>;
next-level-cache = <&L2>;
clocks = <&a9pll>;
clock-names = "cpu";
};
- cpu at 3 {
+ cpu at 903 {
compatible = "arm,cortex-a9";
device_type = "cpu";
- reg = <3>;
+ reg = <0x903>;
next-level-cache = <&L2>;
clocks = <&a9pll>;
clock-names = "cpu";
--
1.7.10.4
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 2/6] ARM: dts: fix highbank cpu mpidr values
2012-12-30 16:15 ` [PATCH 2/6] ARM: dts: fix highbank cpu mpidr values Rob Herring
@ 2013-01-06 2:10 ` Shawn Guo
0 siblings, 0 replies; 9+ messages in thread
From: Shawn Guo @ 2013-01-06 2:10 UTC (permalink / raw)
To: linux-arm-kernel
On Sun, Dec 30, 2012 at 10:15:03AM -0600, Rob Herring wrote:
> From: Rob Herring <rob.herring@calxeda.com>
>
> With the addition of commit a0ae0240 (ARM: kernel: add device tree init
> map function), the cpu reg values must match the cpu mpidr register or we'll
> get warnings. For some reason, the CLUSTERID on highbank is 9, so the reg
> value needs to be 0x90n to quiet the warnings.
>
> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
> ---
> arch/arm/boot/dts/highbank.dts | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts
> index 81e0bfa..5927a8d 100644
> --- a/arch/arm/boot/dts/highbank.dts
> +++ b/arch/arm/boot/dts/highbank.dts
> @@ -30,37 +30,37 @@
> #address-cells = <1>;
> #size-cells = <0>;
>
> - cpu at 0 {
> + cpu at 900 {
Just a reminder - this change will break highbank cpufreq driver that
Mark is submitting.
Shawn
> compatible = "arm,cortex-a9";
> device_type = "cpu";
> - reg = <0>;
> + reg = <0x900>;
> next-level-cache = <&L2>;
> clocks = <&a9pll>;
> clock-names = "cpu";
> };
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 3/6] ARM: highbank: fix typos with hignbank in power request functions
2012-12-30 16:15 [PATCH 0/6] highbank fixes for 3.8 Rob Herring
2012-12-30 16:15 ` [PATCH 1/6] ARM: dts: add device_type prop to cpu nodes on Calxeda platforms Rob Herring
2012-12-30 16:15 ` [PATCH 2/6] ARM: dts: fix highbank cpu mpidr values Rob Herring
@ 2012-12-30 16:15 ` Rob Herring
2012-12-30 16:15 ` [PATCH 4/6] ARM: highbank: fix secondary boot and hotplug Rob Herring
` (3 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Rob Herring @ 2012-12-30 16:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
s/hignbank/highbank/
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
arch/arm/mach-highbank/highbank.c | 2 +-
arch/arm/mach-highbank/pm.c | 2 +-
arch/arm/mach-highbank/sysregs.h | 8 ++++----
arch/arm/mach-highbank/system.c | 4 ++--
4 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index dc24816..981dc1e 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -135,7 +135,7 @@ static struct sys_timer highbank_timer = {
static void highbank_power_off(void)
{
- hignbank_set_pwr_shutdown();
+ highbank_set_pwr_shutdown();
while (1)
cpu_do_idle();
diff --git a/arch/arm/mach-highbank/pm.c b/arch/arm/mach-highbank/pm.c
index 74aa135..0f4ffd6 100644
--- a/arch/arm/mach-highbank/pm.c
+++ b/arch/arm/mach-highbank/pm.c
@@ -32,7 +32,7 @@ static int highbank_suspend_finish(unsigned long val)
static int highbank_pm_enter(suspend_state_t state)
{
- hignbank_set_pwr_suspend();
+ highbank_set_pwr_suspend();
highbank_set_cpu_jump(0, cpu_resume);
cpu_suspend(0, highbank_suspend_finish);
diff --git a/arch/arm/mach-highbank/sysregs.h b/arch/arm/mach-highbank/sysregs.h
index e13e8ea..707cfd3 100644
--- a/arch/arm/mach-highbank/sysregs.h
+++ b/arch/arm/mach-highbank/sysregs.h
@@ -44,25 +44,25 @@ static inline void highbank_set_core_pwr(void)
writel_relaxed(1, sregs_base + SREG_CPU_PWR_CTRL(cpu));
}
-static inline void hignbank_set_pwr_suspend(void)
+static inline void highbank_set_pwr_suspend(void)
{
writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ);
highbank_set_core_pwr();
}
-static inline void hignbank_set_pwr_shutdown(void)
+static inline void highbank_set_pwr_shutdown(void)
{
writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ);
highbank_set_core_pwr();
}
-static inline void hignbank_set_pwr_soft_reset(void)
+static inline void highbank_set_pwr_soft_reset(void)
{
writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
highbank_set_core_pwr();
}
-static inline void hignbank_set_pwr_hard_reset(void)
+static inline void highbank_set_pwr_hard_reset(void)
{
writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
highbank_set_core_pwr();
diff --git a/arch/arm/mach-highbank/system.c b/arch/arm/mach-highbank/system.c
index aed96ad..37d8384 100644
--- a/arch/arm/mach-highbank/system.c
+++ b/arch/arm/mach-highbank/system.c
@@ -22,9 +22,9 @@
void highbank_restart(char mode, const char *cmd)
{
if (mode == 'h')
- hignbank_set_pwr_hard_reset();
+ highbank_set_pwr_hard_reset();
else
- hignbank_set_pwr_soft_reset();
+ highbank_set_pwr_soft_reset();
while (1)
cpu_do_idle();
--
1.7.10.4
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 4/6] ARM: highbank: fix secondary boot and hotplug
2012-12-30 16:15 [PATCH 0/6] highbank fixes for 3.8 Rob Herring
` (2 preceding siblings ...)
2012-12-30 16:15 ` [PATCH 3/6] ARM: highbank: fix typos with hignbank in power request functions Rob Herring
@ 2012-12-30 16:15 ` Rob Herring
2012-12-30 16:15 ` [PATCH 5/6] ARM: highbank: add a power request clear Rob Herring
` (2 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Rob Herring @ 2012-12-30 16:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
With commit 384a290 (ARM: gic: use a private mapping for CPU target
interfaces), wake-up IPIs now go to all cores as the gic cpu interface
numbering may not follow core numbering. This broke secondary boot on
highbank since the boot address was already set for all secondary cores,
this caused all cores to boot before the kernel was ready.
Fix this by moving the setting of the jump address to
highbank_boot_secondary instead of highbank_smp_prepare_cpus and
highbank_cpu_die. Also, clear the address when we boot. This prevents
cores from booting before they are actually triggered and is also necessary
to get suspend/resume to work.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Nicolas Pitre <nicolas.pitre@linaro.org>
---
arch/arm/mach-highbank/hotplug.c | 2 +-
arch/arm/mach-highbank/platsmp.c | 12 +-----------
2 files changed, 2 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-highbank/hotplug.c b/arch/arm/mach-highbank/hotplug.c
index 7b60fac..f30c528 100644
--- a/arch/arm/mach-highbank/hotplug.c
+++ b/arch/arm/mach-highbank/hotplug.c
@@ -30,7 +30,7 @@ void __ref highbank_cpu_die(unsigned int cpu)
{
flush_cache_all();
- highbank_set_cpu_jump(cpu, secondary_startup);
+ highbank_set_cpu_jump(cpu, phys_to_virt(0));
highbank_set_core_pwr();
cpu_do_idle();
diff --git a/arch/arm/mach-highbank/platsmp.c b/arch/arm/mach-highbank/platsmp.c
index 1129957..4ecc864 100644
--- a/arch/arm/mach-highbank/platsmp.c
+++ b/arch/arm/mach-highbank/platsmp.c
@@ -32,6 +32,7 @@ static void __cpuinit highbank_secondary_init(unsigned int cpu)
static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
+ highbank_set_cpu_jump(cpu, secondary_startup);
gic_raise_softirq(cpumask_of(cpu), 0);
return 0;
}
@@ -61,19 +62,8 @@ static void __init highbank_smp_init_cpus(void)
static void __init highbank_smp_prepare_cpus(unsigned int max_cpus)
{
- int i;
-
if (scu_base_addr)
scu_enable(scu_base_addr);
-
- /*
- * Write the address of secondary startup into the jump table
- * The cores are in wfi and wait until they receive a soft interrupt
- * and a non-zero value to jump to. Then the secondary CPU branches
- * to this address.
- */
- for (i = 1; i < max_cpus; i++)
- highbank_set_cpu_jump(i, secondary_startup);
}
struct smp_operations highbank_smp_ops __initdata = {
--
1.7.10.4
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 5/6] ARM: highbank: add a power request clear
2012-12-30 16:15 [PATCH 0/6] highbank fixes for 3.8 Rob Herring
` (3 preceding siblings ...)
2012-12-30 16:15 ` [PATCH 4/6] ARM: highbank: fix secondary boot and hotplug Rob Herring
@ 2012-12-30 16:15 ` Rob Herring
2012-12-30 16:15 ` [PATCH 6/6] ARM: highbank: save and restore L2 cache and GIC on suspend Rob Herring
2013-01-02 20:39 ` [PATCH 0/6] highbank fixes for 3.8 Olof Johansson
6 siblings, 0 replies; 9+ messages in thread
From: Rob Herring @ 2012-12-30 16:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
When we fail to power down, we need to clear out the power request.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
arch/arm/mach-highbank/sysregs.h | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/mach-highbank/sysregs.h b/arch/arm/mach-highbank/sysregs.h
index 707cfd3..70af9d1 100644
--- a/arch/arm/mach-highbank/sysregs.h
+++ b/arch/arm/mach-highbank/sysregs.h
@@ -44,6 +44,15 @@ static inline void highbank_set_core_pwr(void)
writel_relaxed(1, sregs_base + SREG_CPU_PWR_CTRL(cpu));
}
+static inline void highbank_clear_core_pwr(void)
+{
+ int cpu = cpu_logical_map(smp_processor_id());
+ if (scu_base_addr)
+ scu_power_mode(scu_base_addr, SCU_PM_NORMAL);
+ else
+ writel_relaxed(0, sregs_base + SREG_CPU_PWR_CTRL(cpu));
+}
+
static inline void highbank_set_pwr_suspend(void)
{
writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ);
@@ -68,4 +77,10 @@ static inline void highbank_set_pwr_hard_reset(void)
highbank_set_core_pwr();
}
+static inline void highbank_clear_pwr_request(void)
+{
+ writel(~0UL, sregs_base + HB_SREG_A9_PWR_REQ);
+ highbank_clear_core_pwr();
+}
+
#endif
--
1.7.10.4
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 6/6] ARM: highbank: save and restore L2 cache and GIC on suspend
2012-12-30 16:15 [PATCH 0/6] highbank fixes for 3.8 Rob Herring
` (4 preceding siblings ...)
2012-12-30 16:15 ` [PATCH 5/6] ARM: highbank: add a power request clear Rob Herring
@ 2012-12-30 16:15 ` Rob Herring
2013-01-02 20:39 ` [PATCH 0/6] highbank fixes for 3.8 Olof Johansson
6 siblings, 0 replies; 9+ messages in thread
From: Rob Herring @ 2012-12-30 16:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
This fixes suspend to RAM adding necessary save and restore of L2 and GIC.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
arch/arm/mach-highbank/pm.c | 19 ++++++++++++++++++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-highbank/pm.c b/arch/arm/mach-highbank/pm.c
index 0f4ffd6..04eddb4 100644
--- a/arch/arm/mach-highbank/pm.c
+++ b/arch/arm/mach-highbank/pm.c
@@ -14,10 +14,12 @@
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
+#include <linux/cpu_pm.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/suspend.h>
+#include <asm/cacheflush.h>
#include <asm/proc-fns.h>
#include <asm/suspend.h>
@@ -26,16 +28,31 @@
static int highbank_suspend_finish(unsigned long val)
{
+ outer_flush_all();
+ outer_disable();
+
+ highbank_set_pwr_suspend();
+
cpu_do_idle();
+
+ highbank_clear_pwr_request();
return 0;
}
static int highbank_pm_enter(suspend_state_t state)
{
- highbank_set_pwr_suspend();
+ cpu_pm_enter();
+ cpu_cluster_pm_enter();
+
highbank_set_cpu_jump(0, cpu_resume);
cpu_suspend(0, highbank_suspend_finish);
+ cpu_cluster_pm_exit();
+ cpu_pm_exit();
+
+ highbank_smc1(0x102, 0x1);
+ if (scu_base_addr)
+ scu_enable(scu_base_addr);
return 0;
}
--
1.7.10.4
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 0/6] highbank fixes for 3.8
2012-12-30 16:15 [PATCH 0/6] highbank fixes for 3.8 Rob Herring
` (5 preceding siblings ...)
2012-12-30 16:15 ` [PATCH 6/6] ARM: highbank: save and restore L2 cache and GIC on suspend Rob Herring
@ 2013-01-02 20:39 ` Olof Johansson
6 siblings, 0 replies; 9+ messages in thread
From: Olof Johansson @ 2013-01-02 20:39 UTC (permalink / raw)
To: linux-arm-kernel
On Sun, Dec 30, 2012 at 10:15:01AM -0600, Rob Herring wrote:
> From: Rob Herring <rob.herring@calxeda.com>
>
> This series fixes secondary boot/hotplug, some boot warnings and
> suspend/resume for highbank. Arguably, suspend fixes are 3.9 material,
> but I'm including it here as the same fix needed for suspend/resume is
> needed to fix secondary core boot on 3.8.
>
> Also, the Nico's gic change (ARM: gic: use a private mapping for CPU target
> interfaces) breaks QEMU which does not initialize the cpu target registers
> correctly.
>
> Rob
>
> Rob Herring (6):
> ARM: dts: add device_type prop to cpu nodes on Calxeda platforms
> ARM: dts: fix highbank cpu mpidr values
> ARM: highbank: fix typos with hignbank in power request functions
> ARM: highbank: fix secondary boot and hotplug
> ARM: highbank: add a power request clear
> ARM: highbank: save and restore L2 cache and GIC on suspend
All applied to arm-soc fixes. Thanks!
-Olof
^ permalink raw reply [flat|nested] 9+ messages in thread