[PATCH v3 0/7] arm64: ARMv8 RTSM model SoC support

[PATCH v3 0/7] arm64: ARMv8 RTSM model SoC support

[Catalin Marinas]

Hi,

That's the third version of the patch series adding support for the
ARMv8 RTSM model (vexpress-like) to the AArch64 kernel. There is no
SoC-specific code under arch/arm64/ as the kernel makes use of the
vexpress support already under drivers/ (apart from dts, defconfig and
some Kconfig changes).

The patches here can be found on this branch:

git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64.git soc-armv8-experimental

In addition, there are two patches from Ryan and Tixy adding DT support
for CLCD, together with my patches for CLCD support on the ARMv8 RTSM
model (full, not the foundation one). My understanding is that Pawel
will push an updated patch for CLCD/DT support, so I won't worry about
it.

I'll push the arch/arm64/ patches myself but I expect the other patches
to go in via the arm-soc tree (sp810.h, vexpress clk/sysreg). I'll send
a pull request for the latter to arm-soc once Pawel is back from holiday
acks them.

Catalin


Catalin Marinas (6):
  arm: Move sp810.h to include/linux/amba/
  vexpress: Match the "arm,sp810" DT entry for clock initialisation
  vexpress: Allow vexpress-sysreg to self-initialise
  arm64: Populate the platform devices
  arm64: Enable ARMv8 RTSM model (SoC) support
  arm64: Add simple earlyprintk support

Pawel Moll (1):
  arm64: Add dts files for the ARMv8 RTSM model

 Documentation/arm64/memory.txt                     |   2 +
 arch/arm/plat-spear/restart.c                      |   2 +-
 arch/arm64/Kconfig                                 |  12 +-
 arch/arm64/Kconfig.debug                           |   9 +
 arch/arm64/boot/dts/Makefile                       |   2 +
 arch/arm64/boot/dts/rtsm_ve-aemv8a.dts             | 154 ++++++++++++++
 arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi       | 234 +++++++++++++++++++++
 arch/arm64/boot/dts/skeleton.dtsi                  |  13 ++
 arch/arm64/configs/vexpress_defconfig              |  90 ++++++++
 arch/arm64/include/asm/io.h                        |   3 +
 arch/arm64/include/asm/memory.h                    |   1 +
 arch/arm64/include/asm/mmu.h                       |   1 +
 arch/arm64/kernel/Makefile                         |   1 +
 arch/arm64/kernel/early_printk.c                   | 118 +++++++++++
 arch/arm64/kernel/head.S                           |  12 +-
 arch/arm64/kernel/setup.c                          |   8 +
 arch/arm64/mm/mmu.c                                |  42 ++++
 drivers/clk/versatile/clk-vexpress.c               |  31 +--
 drivers/mfd/vexpress-sysreg.c                      |   8 +-
 drivers/net/ethernet/smsc/Kconfig                  |   4 +-
 .../asm/hardware => include/linux/amba}/sp810.h    |   0
 include/linux/vexpress.h                           |   2 +-
 22 files changed, 727 insertions(+), 22 deletions(-)
 create mode 100644 arch/arm64/boot/dts/rtsm_ve-aemv8a.dts
 create mode 100644 arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi
 create mode 100644 arch/arm64/boot/dts/skeleton.dtsi
 create mode 100644 arch/arm64/configs/vexpress_defconfig
 create mode 100644 arch/arm64/kernel/early_printk.c
 rename {arch/arm/include/asm/hardware => include/linux/amba}/sp810.h (100%)

[PATCH v3 1/7] arm: Move sp810.h to include/linux/amba/

[Catalin Marinas]

Since it is now used by code under drivers/clk/ it makes sense for this
file to be in a more generic location. This is required for building
vexpress support on arm64.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Pawel Moll <pawel.moll@arm.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Russell King <linux@arm.linux.org.uk>
---
 arch/arm/plat-spear/restart.c                                 | 2 +-
 drivers/clk/versatile/clk-vexpress.c                          | 3 +--
 {arch/arm/include/asm/hardware => include/linux/amba}/sp810.h | 0
 3 files changed, 2 insertions(+), 3 deletions(-)
 rename {arch/arm/include/asm/hardware => include/linux/amba}/sp810.h (100%)

diff --git a/arch/arm/plat-spear/restart.c b/arch/arm/plat-spear/restart.c
index 4f99011..7d4616d 100644
--- a/arch/arm/plat-spear/restart.c
+++ b/arch/arm/plat-spear/restart.c
@@ -11,8 +11,8 @@
  * warranty of any kind, whether express or implied.
  */
 #include <linux/io.h>
+#include <linux/amba/sp810.h>
 #include <asm/system_misc.h>
-#include <asm/hardware/sp810.h>
 #include <mach/spear.h>
 #include <mach/generic.h>
 
diff --git a/drivers/clk/versatile/clk-vexpress.c b/drivers/clk/versatile/clk-vexpress.c
index c742ac7..4f83ff9 100644
--- a/drivers/clk/versatile/clk-vexpress.c
+++ b/drivers/clk/versatile/clk-vexpress.c
@@ -11,6 +11,7 @@
  * Copyright (C) 2012 ARM Limited
  */
 
+#include <linux/amba/sp810.h>
 #include <linux/clkdev.h>
 #include <linux/clk-provider.h>
 #include <linux/err.h>
@@ -18,8 +19,6 @@
 #include <linux/of_address.h>
 #include <linux/vexpress.h>
 
-#include <asm/hardware/sp810.h>
-
 static struct clk *vexpress_sp810_timerclken[4];
 static DEFINE_SPINLOCK(vexpress_sp810_lock);
 
diff --git a/arch/arm/include/asm/hardware/sp810.h b/include/linux/amba/sp810.h
similarity index 100%
rename from arch/arm/include/asm/hardware/sp810.h
rename to include/linux/amba/sp810.h

[PATCH v3 2/7] vexpress: Match the "arm, sp810" DT entry for clock initialisation

[Catalin Marinas]

Currently the clk-vexpress.c implementation relies on the vexpress code
to call the vexpress_clk_of_init() function which performs the SP810
initialisation. This patch adds "arm,sp810" to the clock DT match array
allowing of_clk_init() to call the vexpress_sp810_of_setup() function.
In case of CONFIG_ARM64, make vexpress_clk_of_init() an arch_initcall().

Note that SP810 requires the fixed clocks to be already registered.
Since the clock subsystem does not handle DT dependencies, the
corresponding DT entries must be in the correct order.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Pawel Moll <pawel.moll@arm.com>
---
 drivers/clk/versatile/clk-vexpress.c | 28 +++++++++++++++++-----------
 include/linux/vexpress.h             |  2 +-
 2 files changed, 18 insertions(+), 12 deletions(-)

diff --git a/drivers/clk/versatile/clk-vexpress.c b/drivers/clk/versatile/clk-vexpress.c
index 4f83ff9..a3754e7 100644
--- a/drivers/clk/versatile/clk-vexpress.c
+++ b/drivers/clk/versatile/clk-vexpress.c
@@ -98,21 +98,11 @@ struct clk *vexpress_sp810_of_get(struct of_phandle_args *clkspec, void *data)
 	return vexpress_sp810_timerclken[clkspec->args[0]];
 }
 
-static const __initconst struct of_device_id vexpress_fixed_clk_match[] = {
-	{ .compatible = "fixed-clock", .data = of_fixed_clk_setup, },
-	{ .compatible = "arm,vexpress-osc", .data = vexpress_osc_of_setup, },
-	{}
-};
-
-void __init vexpress_clk_of_init(void)
+static void __init vexpress_sp810_of_setup(struct device_node *node)
 {
-	struct device_node *node;
 	struct clk *clk;
 	struct clk *refclk, *timclk;
 
-	of_clk_init(vexpress_fixed_clk_match);
-
-	node = of_find_compatible_node(NULL, NULL, "arm,sp810");
 	vexpress_sp810_init(of_iomap(node, 0));
 	of_clk_add_provider(node, vexpress_sp810_of_get, NULL);
 
@@ -138,4 +128,20 @@ void __init vexpress_clk_of_init(void)
 				"v2m-timer1", "sp804"));
 }
 
+static const __initconst struct of_device_id vexpress_clk_match[] = {
+	{ .compatible = "fixed-clock", .data = of_fixed_clk_setup, },
+	{ .compatible = "arm,vexpress-osc", .data = vexpress_osc_of_setup, },
+	{ .compatible = "arm,sp810", .data = vexpress_sp810_of_setup, },
+	{}
+};
+
+int __init vexpress_clk_of_init(void)
+{
+	of_clk_init(vexpress_clk_match);
+	return 0;
+}
+#ifdef CONFIG_ARM64
+arch_initcall(vexpress_clk_of_init);
+#endif
+
 #endif
diff --git a/include/linux/vexpress.h b/include/linux/vexpress.h
index c52215f..b55ae6a 100644
--- a/include/linux/vexpress.h
+++ b/include/linux/vexpress.h
@@ -116,6 +116,6 @@ struct clk *vexpress_osc_setup(struct device *dev);
 void vexpress_osc_of_setup(struct device_node *node);
 
 void vexpress_clk_init(void __iomem *sp810_base);
-void vexpress_clk_of_init(void);
+int vexpress_clk_of_init(void);
 
 #endif

[PATCH v3 3/7] vexpress: Allow vexpress-sysreg to self-initialise

[Catalin Marinas]

The vexpress_sysreg_init() is a core_initcall() already and it can
trigger the early initialisation if a matching node is found. This patch
allows the SoC code to avoid calling vexpress_sysreg_of_early_init()
explicitly.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Pawel Moll <pawel.moll@arm.com>
---
 drivers/mfd/vexpress-sysreg.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/mfd/vexpress-sysreg.c b/drivers/mfd/vexpress-sysreg.c
index 733c06b..ff5d16c 100644
--- a/drivers/mfd/vexpress-sysreg.c
+++ b/drivers/mfd/vexpress-sysreg.c
@@ -318,8 +318,9 @@ void __init vexpress_sysreg_early_init(void __iomem *base)
 	struct device_node *node = of_find_compatible_node(NULL, NULL,
 			"arm,vexpress-sysreg");
 
-	if (node)
-		base = of_iomap(node, 0);
+	if (!node)
+		return;
+	base = of_iomap(node, 0);
 
 	if (WARN_ON(!base))
 		return;
@@ -338,6 +339,8 @@ void __init vexpress_sysreg_early_init(void __iomem *base)
 
 void __init vexpress_sysreg_of_early_init(void)
 {
+	if (vexpress_sysreg_base)
+		return;
 	vexpress_sysreg_early_init(NULL);
 }
 
@@ -470,6 +473,7 @@ static struct platform_driver vexpress_sysreg_driver = {
 
 static int __init vexpress_sysreg_init(void)
 {
+	vexpress_sysreg_of_early_init();
 	return platform_driver_register(&vexpress_sysreg_driver);
 }
 core_initcall(vexpress_sysreg_init);

[PATCH v3 4/7] arm64: Populate the platform devices

[Catalin Marinas]

This patch add a device_initcall() to populate the platform devices
(of_default_bus_match_table). This allows SoC implementations that do
not require earlier initcalls to avoid any platform-specific code under
arch/arm64.

GIC and generic timer initialisation is done via FDT and CPU notifiers
independently of the SoC code.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
---
 arch/arm64/kernel/setup.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c
index 7665a9b..894c1e5 100644
--- a/arch/arm64/kernel/setup.c
+++ b/arch/arm64/kernel/setup.c
@@ -39,6 +39,7 @@
 #include <linux/proc_fs.h>
 #include <linux/memblock.h>
 #include <linux/of_fdt.h>
+#include <linux/of_platform.h>
 
 #include <asm/cputype.h>
 #include <asm/elf.h>
@@ -289,6 +290,13 @@ static int __init topology_init(void)
 }
 subsys_initcall(topology_init);
 
+static int __init arm64_device_probe(void)
+{
+	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+	return 0;
+}
+device_initcall(arm64_device_probe);
+
 static const char *hwcap_str[] = {
 	"fp",
 	"asimd",

[PATCH v3 5/7] arm64: Add dts files for the ARMv8 RTSM model

[Catalin Marinas]

From: Pawel Moll <Pawel.Moll@arm.com>

Signed-off-by: Pawel Moll <Pawel.Moll@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
---
 arch/arm64/boot/dts/Makefile                 |   2 +
 arch/arm64/boot/dts/rtsm_ve-aemv8a.dts       | 154 ++++++++++++++++++
 arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi | 234 +++++++++++++++++++++++++++
 arch/arm64/boot/dts/skeleton.dtsi            |  13 ++
 4 files changed, 403 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rtsm_ve-aemv8a.dts
 create mode 100644 arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi
 create mode 100644 arch/arm64/boot/dts/skeleton.dtsi

diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index 801e2d7..6d9a147 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -1,3 +1,5 @@
+dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb
+
 targets += dtbs
 
 dtbs: $(addprefix $(obj)/, $(dtb-y))
diff --git a/arch/arm64/boot/dts/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/rtsm_ve-aemv8a.dts
new file mode 100644
index 0000000..15df04c
--- /dev/null
+++ b/arch/arm64/boot/dts/rtsm_ve-aemv8a.dts
@@ -0,0 +1,154 @@
+/*
+ * ARM Ltd. Fast Models
+ *
+ * Architecture Envelope Model (AEM) ARMv8-A
+ * ARMAEMv8AMPCT
+ *
+ * RTSM_VE_AEMv8A.lisa
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x80000000 0x00010000;
+
+/ {
+	model = "RTSM_VE_AEMv8A";
+	compatible = "arm,rtsm_ve,aemv8a", "arm,vexpress";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	chosen { };
+
+	aliases {
+		serial0 = &v2m_serial0;
+		serial1 = &v2m_serial1;
+		serial2 = &v2m_serial2;
+		serial3 = &v2m_serial3;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu at 0 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x8000fff8>;
+		};
+		cpu at 1 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <1>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x8000fff8>;
+		};
+		cpu at 2 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <2>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x8000fff8>;
+		};
+		cpu at 3 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <3>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x8000fff8>;
+		};
+	};
+
+	memory at 80000000 {
+		device_type = "memory";
+		reg = <0x00000000 0x80000000 0 0x80000000>,
+		      <0x00000008 0x80000000 0 0x80000000>;
+	};
+
+	gic: interrupt-controller at 2c001000 {
+		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+		#interrupt-cells = <3>;
+		#address-cells = <0>;
+		interrupt-controller;
+		reg = <0 0x2c001000 0 0x1000>,
+		      <0 0x2c002000 0 0x100>;
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <1 14 0xff01>;
+		clock-frequency = <100000000>;
+	};
+
+	pmu {
+		compatible = "arm,armv8-pmuv3";
+		interrupts = <0 60 4>,
+			     <0 61 4>,
+			     <0 62 4>,
+			     <0 63 4>;
+	};
+
+	smb {
+		compatible = "simple-bus";
+
+		#address-cells = <2>;
+		#size-cells = <1>;
+		ranges = <0 0 0 0x08000000 0x04000000>,
+			 <1 0 0 0x14000000 0x04000000>,
+			 <2 0 0 0x18000000 0x04000000>,
+			 <3 0 0 0x1c000000 0x04000000>,
+			 <4 0 0 0x0c000000 0x04000000>,
+			 <5 0 0 0x10000000 0x04000000>;
+
+		#interrupt-cells = <1>;
+		interrupt-map-mask = <0 0 63>;
+		interrupt-map = <0 0  0 &gic 0  0 4>,
+				<0 0  1 &gic 0  1 4>,
+				<0 0  2 &gic 0  2 4>,
+				<0 0  3 &gic 0  3 4>,
+				<0 0  4 &gic 0  4 4>,
+				<0 0  5 &gic 0  5 4>,
+				<0 0  6 &gic 0  6 4>,
+				<0 0  7 &gic 0  7 4>,
+				<0 0  8 &gic 0  8 4>,
+				<0 0  9 &gic 0  9 4>,
+				<0 0 10 &gic 0 10 4>,
+				<0 0 11 &gic 0 11 4>,
+				<0 0 12 &gic 0 12 4>,
+				<0 0 13 &gic 0 13 4>,
+				<0 0 14 &gic 0 14 4>,
+				<0 0 15 &gic 0 15 4>,
+				<0 0 16 &gic 0 16 4>,
+				<0 0 17 &gic 0 17 4>,
+				<0 0 18 &gic 0 18 4>,
+				<0 0 19 &gic 0 19 4>,
+				<0 0 20 &gic 0 20 4>,
+				<0 0 21 &gic 0 21 4>,
+				<0 0 22 &gic 0 22 4>,
+				<0 0 23 &gic 0 23 4>,
+				<0 0 24 &gic 0 24 4>,
+				<0 0 25 &gic 0 25 4>,
+				<0 0 26 &gic 0 26 4>,
+				<0 0 27 &gic 0 27 4>,
+				<0 0 28 &gic 0 28 4>,
+				<0 0 29 &gic 0 29 4>,
+				<0 0 30 &gic 0 30 4>,
+				<0 0 31 &gic 0 31 4>,
+				<0 0 32 &gic 0 32 4>,
+				<0 0 33 &gic 0 33 4>,
+				<0 0 34 &gic 0 34 4>,
+				<0 0 35 &gic 0 35 4>,
+				<0 0 36 &gic 0 36 4>,
+				<0 0 37 &gic 0 37 4>,
+				<0 0 38 &gic 0 38 4>,
+				<0 0 39 &gic 0 39 4>,
+				<0 0 40 &gic 0 40 4>,
+				<0 0 41 &gic 0 41 4>,
+				<0 0 42 &gic 0 42 4>;
+
+		/include/ "rtsm_ve-motherboard.dtsi"
+	};
+};
+
diff --git a/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi
new file mode 100644
index 0000000..b45e5f3
--- /dev/null
+++ b/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi
@@ -0,0 +1,234 @@
+/*
+ * ARM Ltd. Fast Models
+ *
+ * Versatile Express (VE) system model
+ * Motherboard component
+ *
+ * VEMotherBoard.lisa
+ */
+
+	motherboard {
+		arm,v2m-memory-map = "rs1";
+		compatible = "arm,vexpress,v2m-p1", "simple-bus";
+		#address-cells = <2>; /* SMB chipselect number and offset */
+		#size-cells = <1>;
+		#interrupt-cells = <1>;
+		ranges;
+
+		flash at 0,00000000 {
+			compatible = "arm,vexpress-flash", "cfi-flash";
+			reg = <0 0x00000000 0x04000000>,
+			      <4 0x00000000 0x04000000>;
+			bank-width = <4>;
+		};
+
+		vram at 2,00000000 {
+			compatible = "arm,vexpress-vram";
+			reg = <2 0x00000000 0x00800000>;
+		};
+
+		ethernet at 2,02000000 {
+			compatible = "smsc,lan91c111";
+			reg = <2 0x02000000 0x10000>;
+			interrupts = <15>;
+		};
+
+		v2m_clk24mhz: clk24mhz {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <24000000>;
+			clock-output-names = "v2m:clk24mhz";
+		};
+
+		v2m_refclk1mhz: refclk1mhz {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <1000000>;
+			clock-output-names = "v2m:refclk1mhz";
+		};
+
+		v2m_refclk32khz: refclk32khz {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <32768>;
+			clock-output-names = "v2m:refclk32khz";
+		};
+
+		iofpga at 3,00000000 {
+			compatible = "arm,amba-bus", "simple-bus";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 3 0 0x200000>;
+
+			v2m_sysreg: sysreg at 010000 {
+				compatible = "arm,vexpress-sysreg";
+				reg = <0x010000 0x1000>;
+				gpio-controller;
+				#gpio-cells = <2>;
+			};
+
+			v2m_sysctl: sysctl at 020000 {
+				compatible = "arm,sp810", "arm,primecell";
+				reg = <0x020000 0x1000>;
+				clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&v2m_clk24mhz>;
+				clock-names = "refclk", "timclk", "apb_pclk";
+				#clock-cells = <1>;
+				clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
+			};
+
+			aaci at 040000 {
+				compatible = "arm,pl041", "arm,primecell";
+				reg = <0x040000 0x1000>;
+				interrupts = <11>;
+				clocks = <&v2m_clk24mhz>;
+				clock-names = "apb_pclk";
+			};
+
+			mmci at 050000 {
+				compatible = "arm,pl180", "arm,primecell";
+				reg = <0x050000 0x1000>;
+				interrupts = <9 10>;
+				cd-gpios = <&v2m_sysreg 0 0>;
+				wp-gpios = <&v2m_sysreg 1 0>;
+				max-frequency = <12000000>;
+				vmmc-supply = <&v2m_fixed_3v3>;
+				clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
+				clock-names = "mclk", "apb_pclk";
+			};
+
+			kmi at 060000 {
+				compatible = "arm,pl050", "arm,primecell";
+				reg = <0x060000 0x1000>;
+				interrupts = <12>;
+				clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
+				clock-names = "KMIREFCLK", "apb_pclk";
+			};
+
+			kmi at 070000 {
+				compatible = "arm,pl050", "arm,primecell";
+				reg = <0x070000 0x1000>;
+				interrupts = <13>;
+				clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
+				clock-names = "KMIREFCLK", "apb_pclk";
+			};
+
+			v2m_serial0: uart at 090000 {
+				compatible = "arm,pl011", "arm,primecell";
+				reg = <0x090000 0x1000>;
+				interrupts = <5>;
+				clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
+				clock-names = "uartclk", "apb_pclk";
+			};
+
+			v2m_serial1: uart at 0a0000 {
+				compatible = "arm,pl011", "arm,primecell";
+				reg = <0x0a0000 0x1000>;
+				interrupts = <6>;
+				clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
+				clock-names = "uartclk", "apb_pclk";
+			};
+
+			v2m_serial2: uart at 0b0000 {
+				compatible = "arm,pl011", "arm,primecell";
+				reg = <0x0b0000 0x1000>;
+				interrupts = <7>;
+				clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
+				clock-names = "uartclk", "apb_pclk";
+			};
+
+			v2m_serial3: uart at 0c0000 {
+				compatible = "arm,pl011", "arm,primecell";
+				reg = <0x0c0000 0x1000>;
+				interrupts = <8>;
+				clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
+				clock-names = "uartclk", "apb_pclk";
+			};
+
+			wdt at 0f0000 {
+				compatible = "arm,sp805", "arm,primecell";
+				reg = <0x0f0000 0x1000>;
+				interrupts = <0>;
+				clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>;
+				clock-names = "wdogclk", "apb_pclk";
+			};
+
+			v2m_timer01: timer at 110000 {
+				compatible = "arm,sp804", "arm,primecell";
+				reg = <0x110000 0x1000>;
+				interrupts = <2>;
+				clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_clk24mhz>;
+				clock-names = "timclken1", "timclken2", "apb_pclk";
+			};
+
+			v2m_timer23: timer at 120000 {
+				compatible = "arm,sp804", "arm,primecell";
+				reg = <0x120000 0x1000>;
+				interrupts = <3>;
+				clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&v2m_clk24mhz>;
+				clock-names = "timclken1", "timclken2", "apb_pclk";
+			};
+
+			rtc at 170000 {
+				compatible = "arm,pl031", "arm,primecell";
+				reg = <0x170000 0x1000>;
+				interrupts = <4>;
+				clocks = <&v2m_clk24mhz>;
+				clock-names = "apb_pclk";
+			};
+
+			clcd at 1f0000 {
+				compatible = "arm,pl111", "arm,primecell";
+				reg = <0x1f0000 0x1000>;
+				interrupts = <14>;
+				clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>;
+				clock-names = "clcdclk", "apb_pclk";
+			};
+		};
+
+		v2m_fixed_3v3: fixedregulator at 0 {
+			compatible = "regulator-fixed";
+			regulator-name = "3V3";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-always-on;
+		};
+
+		mcc {
+			compatible = "arm,vexpress,config-bus", "simple-bus";
+			arm,vexpress,config-bridge = <&v2m_sysreg>;
+
+			v2m_oscclk1: osc at 1 {
+				/* CLCD clock */
+				compatible = "arm,vexpress-osc";
+				arm,vexpress-sysreg,func = <1 1>;
+				freq-range = <23750000 63500000>;
+				#clock-cells = <0>;
+				clock-output-names = "v2m:oscclk1";
+			};
+
+			reset at 0 {
+				compatible = "arm,vexpress-reset";
+				arm,vexpress-sysreg,func = <5 0>;
+			};
+
+			muxfpga at 0 {
+				compatible = "arm,vexpress-muxfpga";
+				arm,vexpress-sysreg,func = <7 0>;
+			};
+
+			shutdown at 0 {
+				compatible = "arm,vexpress-shutdown";
+				arm,vexpress-sysreg,func = <8 0>;
+			};
+
+			reboot at 0 {
+				compatible = "arm,vexpress-reboot";
+				arm,vexpress-sysreg,func = <9 0>;
+			};
+
+			dvimode at 0 {
+				compatible = "arm,vexpress-dvimode";
+				arm,vexpress-sysreg,func = <11 0>;
+			};
+		};
+	};
diff --git a/arch/arm64/boot/dts/skeleton.dtsi b/arch/arm64/boot/dts/skeleton.dtsi
new file mode 100644
index 0000000..38ead82
--- /dev/null
+++ b/arch/arm64/boot/dts/skeleton.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Skeleton device tree; the bare minimum needed to boot; just include and
+ * add a compatible value.  The bootloader will typically populate the memory
+ * node.
+ */
+
+/ {
+	#address-cells = <2>;
+	#size-cells = <1>;
+	chosen { };
+	aliases { };
+	memory { device_type = "memory"; reg = <0 0 0>; };
+};

[PATCH v3 6/7] arm64: Enable ARMv8 RTSM model (SoC) support

[Catalin Marinas]

This patch adds the necessary Kconfig entries to enable support for the
ARMv8 software model (Versatile Express platform) together with
vexpress_defconfig.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
---
 arch/arm64/Kconfig                    | 12 ++++-
 arch/arm64/configs/vexpress_defconfig | 90 +++++++++++++++++++++++++++++++++++
 drivers/net/ethernet/smsc/Kconfig     |  4 +-
 3 files changed, 103 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm64/configs/vexpress_defconfig

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 87912dd..ae8cd1f 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -98,7 +98,17 @@ source "init/Kconfig"
 
 source "kernel/Kconfig.freezer"
 
-menu "System Type"
+menu "Platform selection"
+
+config ARCH_VEXPRESS
+	bool "ARMv8 software model (Versatile Express)"
+	select ARCH_REQUIRE_GPIOLIB
+	select ARM_GIC
+	select COMMON_CLK_VERSATILE
+	select VEXPRESS_CONFIG
+	help
+	  This enables support for the ARMv8 software model (Versatile
+	  Express).
 
 endmenu
 
diff --git a/arch/arm64/configs/vexpress_defconfig b/arch/arm64/configs/vexpress_defconfig
new file mode 100644
index 0000000..c1ee86d
--- /dev/null
+++ b/arch/arm64/configs/vexpress_defconfig
@@ -0,0 +1,90 @@
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
+CONFIG_SCHED_AUTOGROUP=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_PROFILING=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_ARCH_VEXPRESS=y
+CONFIG_SMP=y
+CONFIG_PREEMPT_VOLUNTARY=y
+CONFIG_CMDLINE="console=ttyAMA0"
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_COMPAT=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_INET_LRO is not set
+# CONFIG_IPV6 is not set
+# CONFIG_WIRELESS is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+# CONFIG_BLK_DEV is not set
+CONFIG_SCSI=y
+# CONFIG_SCSI_PROC_FS is not set
+CONFIG_BLK_DEV_SD=y
+# CONFIG_SCSI_LOWLEVEL is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NET_CADENCE is not set
+CONFIG_SMC91X=y
+# CONFIG_WLAN is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_SERIO_I8042 is not set
+# CONFIG_SERIO_SERPORT is not set
+CONFIG_SERIO_AMBAKMI=y
+CONFIG_LEGACY_PTY_COUNT=16
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+# CONFIG_HWMON is not set
+CONFIG_FB=y
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+# CONFIG_EXT3_FS_XATTR is not set
+CONFIG_FUSE_FS=y
+CONFIG_CUSE=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+# CONFIG_MISC_FILESYSTEMS is not set
+CONFIG_NFS_FS=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_FS=y
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_SCHED_DEBUG is not set
+CONFIG_DEBUG_INFO=y
+CONFIG_RCU_CPU_STALL_TIMEOUT=60
+# CONFIG_FTRACE is not set
+CONFIG_ATOMIC64_SELFTEST=y
+CONFIG_DEBUG_ERRORS=y
diff --git a/drivers/net/ethernet/smsc/Kconfig b/drivers/net/ethernet/smsc/Kconfig
index 5a689af..bb4c167 100644
--- a/drivers/net/ethernet/smsc/Kconfig
+++ b/drivers/net/ethernet/smsc/Kconfig
@@ -5,7 +5,7 @@
 config NET_VENDOR_SMSC
 	bool "SMC (SMSC)/Western Digital devices"
 	default y
-	depends on ARM || ISA || MAC || ARM || MIPS || M32R || SUPERH || \
+	depends on ARM || ISA || MAC || ARM64 || MIPS || M32R || SUPERH || \
 		BLACKFIN || MN10300 || COLDFIRE || PCI || PCMCIA
 	---help---
 	  If you have a network (Ethernet) card belonging to this class, say Y
@@ -40,7 +40,7 @@ config SMC91X
 	select NET_CORE
 	select MII
 	depends on (ARM || M32R || SUPERH || MIPS || BLACKFIN || \
-		    MN10300 || COLDFIRE)
+		    MN10300 || COLDFIRE || ARM64)
 	---help---
 	  This is a driver for SMC's 91x series of Ethernet chipsets,
 	  including the SMC91C94 and the SMC91C111. Say Y if you want it

[PATCH v3 7/7] arm64: Add simple earlyprintk support

[Catalin Marinas]

This patch adds support for "earlyprintk=" parameter on the kernel
command line. The format is:

  earlyprintk=<name>[,<addr>][,<options>]

where <name> is the name of the (UART) device, e.g. "pl011", <addr> is
the I/O address. The <options> aren't currently used.

The mapping of the earlyprintk device is done very early during kernel
boot and there are restrictions on which functions it can call. A
special early_io_map() function is added which creates the mapping from
the pre-defined EARLY_IOBASE to the device I/O address passed via the
kernel parameter. The pgd entry corresponding to EARLY_IOBASE is
pre-populated in head.S during kernel boot.

Only PL011 is currently supported and it is assumed that the interface
is already initialised by the boot loader before the kernel is started.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
---
 Documentation/arm64/memory.txt   |   2 +
 arch/arm64/Kconfig.debug         |   9 +++
 arch/arm64/include/asm/io.h      |   3 +
 arch/arm64/include/asm/memory.h  |   1 +
 arch/arm64/include/asm/mmu.h     |   1 +
 arch/arm64/kernel/Makefile       |   1 +
 arch/arm64/kernel/early_printk.c | 118 +++++++++++++++++++++++++++++++++++++++
 arch/arm64/kernel/head.S         |  12 +++-
 arch/arm64/mm/mmu.c              |  42 ++++++++++++++
 9 files changed, 187 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm64/kernel/early_printk.c

diff --git a/Documentation/arm64/memory.txt b/Documentation/arm64/memory.txt
index d758702..5f583af 100644
--- a/Documentation/arm64/memory.txt
+++ b/Documentation/arm64/memory.txt
@@ -35,6 +35,8 @@ ffffffbc00000000	ffffffbdffffffff	   8GB		vmemmap
 
 ffffffbe00000000	ffffffbffbbfffff	  ~8GB		[guard, future vmmemap]
 
+ffffffbffbc00000	ffffffbffbdfffff	   2MB		earlyprintk device
+
 ffffffbffbe00000	ffffffbffbe0ffff	  64KB		PCI I/O space
 
 ffffffbbffff0000	ffffffbcffffffff	  ~2MB		[guard]
diff --git a/arch/arm64/Kconfig.debug b/arch/arm64/Kconfig.debug
index d7553f2..79871cd 100644
--- a/arch/arm64/Kconfig.debug
+++ b/arch/arm64/Kconfig.debug
@@ -24,4 +24,13 @@ config DEBUG_STACK_USAGE
 	  Enables the display of the minimum amount of free stack which each
 	  task has ever had available in the sysrq-T output.
 
+config EARLY_PRINTK
+	bool "Early printk support"
+	default y
+	help
+	  Say Y here if you want to have an early console using the
+	  earlyprintk=<name>[,<addr>][,<options>] kernel parameter. It
+	  is assumed that the early console device has been initialised
+	  by the boot loader prior to starting the Linux kernel.
+
 endmenu
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
index d2f05a6..57f12c9 100644
--- a/arch/arm64/include/asm/io.h
+++ b/arch/arm64/include/asm/io.h
@@ -230,6 +230,9 @@ extern void __iounmap(volatile void __iomem *addr);
 #define ioremap_wc(addr, size)		__ioremap((addr), (size), __pgprot(PROT_NORMAL_NC))
 #define iounmap				__iounmap
 
+#define PROT_SECT_DEFAULT	(PMD_TYPE_SECT | PMD_SECT_AF)
+#define PROT_SECT_DEVICE_nGnRE	(PROT_SECT_DEFAULT | PTE_PXN | PTE_UXN | PMD_ATTRINDX(MT_DEVICE_nGnRE))
+
 #define ARCH_HAS_IOREMAP_WC
 #include <asm-generic/iomap.h>
 
diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index 1cac16a..381f556 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -43,6 +43,7 @@
 #define PAGE_OFFSET		UL(0xffffffc000000000)
 #define MODULES_END		(PAGE_OFFSET)
 #define MODULES_VADDR		(MODULES_END - SZ_64M)
+#define EARLYCON_IOBASE		(MODULES_VADDR - SZ_4M)
 #define VA_BITS			(39)
 #define TASK_SIZE_64		(UL(1) << VA_BITS)
 
diff --git a/arch/arm64/include/asm/mmu.h b/arch/arm64/include/asm/mmu.h
index d4f7fd5..2494fc0 100644
--- a/arch/arm64/include/asm/mmu.h
+++ b/arch/arm64/include/asm/mmu.h
@@ -26,5 +26,6 @@ typedef struct {
 
 extern void paging_init(void);
 extern void setup_mm_for_reboot(void);
+extern void __iomem *early_io_map(phys_addr_t phys, unsigned long virt);
 
 #endif
diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
index 74239c3..a1cace4 100644
--- a/arch/arm64/kernel/Makefile
+++ b/arch/arm64/kernel/Makefile
@@ -17,6 +17,7 @@ arm64-obj-$(CONFIG_MODULES)		+= arm64ksyms.o module.o
 arm64-obj-$(CONFIG_SMP)			+= smp.o
 arm64-obj-$(CONFIG_HW_PERF_EVENTS)	+= perf_event.o
 arm64-obj-$(CONFIG_HAVE_HW_BREAKPOINT)+= hw_breakpoint.o
+arm64-obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
 
 obj-y					+= $(arm64-obj-y) vdso/
 obj-m					+= $(arm64-obj-m)
diff --git a/arch/arm64/kernel/early_printk.c b/arch/arm64/kernel/early_printk.c
new file mode 100644
index 0000000..7e320a2
--- /dev/null
+++ b/arch/arm64/kernel/early_printk.c
@@ -0,0 +1,118 @@
+/*
+ * Earlyprintk support.
+ *
+ * Copyright (C) 2012 ARM Ltd.
+ * Author: Catalin Marinas <catalin.marinas@arm.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <linux/kernel.h>
+#include <linux/console.h>
+#include <linux/init.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/io.h>
+
+#include <linux/amba/serial.h>
+
+static void __iomem *early_base;
+static void (*printch)(char ch);
+
+/*
+ * PL011 single character TX.
+ */
+static void pl011_printch(char ch)
+{
+	while (readl_relaxed(early_base + UART01x_FR) & UART01x_FR_TXFF)
+		;
+	writeb_relaxed(ch, early_base + UART01x_DR);
+	while (readl_relaxed(early_base + UART01x_FR) & UART01x_FR_BUSY)
+		;
+}
+
+struct earlycon_match {
+	const char *name;
+	void (*printch)(char ch);
+};
+
+static const struct earlycon_match earlycon_match[] __initconst = {
+	{ .name = "pl011", .printch = pl011_printch, },
+	{}
+};
+
+static void early_write(struct console *con, const char *s, unsigned n)
+{
+	while (n-- > 0) {
+		if (*s == '\n')
+			printch('\r');
+		printch(*s);
+		s++;
+	}
+}
+
+static struct console early_console = {
+	.name =		"earlycon",
+	.write =	early_write,
+	.flags =	CON_PRINTBUFFER | CON_BOOT,
+	.index =	-1,
+};
+
+/*
+ * Parse earlyprintk=... parameter in the format:
+ *
+ *   <name>[,<addr>][,<options>]
+ *
+ * and register the early console. It is assumed that the UART has been
+ * initialised by the bootloader already.
+ */
+static int __init setup_early_printk(char *buf)
+{
+	const struct earlycon_match *match = earlycon_match;
+	phys_addr_t paddr = 0;
+
+	if (!buf) {
+		pr_warning("No earlyprintk arguments passed.\n");
+		return 0;
+	}
+
+	while (match->name) {
+		size_t len = strlen(match->name);
+		if (!strncmp(buf, match->name, len)) {
+			buf += len;
+			break;
+		}
+		match++;
+	}
+	if (!match->name) {
+		pr_warning("Unknown earlyprintk arguments: %s\n", buf);
+		return 0;
+	}
+
+	/* I/O address */
+	if (!strncmp(buf, ",0x", 3)) {
+		char *e;
+		paddr = simple_strtoul(buf + 1, &e, 16);
+		buf = e;
+	}
+	/* no options parsing yet */
+
+	if (paddr)
+		early_base = early_io_map(paddr, EARLYCON_IOBASE);
+
+	printch = match->printch;
+	register_console(&early_console);
+
+	return 0;
+}
+
+early_param("earlyprintk", setup_early_printk);
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 368ad1f..0a0a497 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -82,10 +82,8 @@
 
 #ifdef CONFIG_ARM64_64K_PAGES
 #define MM_MMUFLAGS	PTE_ATTRINDX(MT_NORMAL) | PTE_FLAGS
-#define IO_MMUFLAGS	PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_XN | PTE_FLAGS
 #else
 #define MM_MMUFLAGS	PMD_ATTRINDX(MT_NORMAL) | PMD_FLAGS
-#define IO_MMUFLAGS	PMD_ATTRINDX(MT_DEVICE_nGnRE) | PMD_SECT_XN | PMD_FLAGS
 #endif
 
 /*
@@ -368,6 +366,7 @@ ENDPROC(__calc_phys_offset)
  *   - identity mapping to enable the MMU (low address, TTBR0)
  *   - first few MB of the kernel linear mapping to jump to once the MMU has
  *     been enabled, including the FDT blob (TTBR1)
+ *   - UART mapping if CONFIG_EARLY_PRINTK is enabled (TTBR1)
  */
 __create_page_tables:
 	pgtbl	x25, x26, x24			// idmap_pg_dir and swapper_pg_dir addresses
@@ -420,6 +419,15 @@ __create_page_tables:
 	sub	x6, x6, #1			// inclusive range
 	create_block_map x0, x7, x3, x5, x6
 1:
+#ifdef CONFIG_EARLY_PRINTK
+	/*
+	 * Create the pgd entry for the UART mapping. The full mapping is done
+	 * later based earlyprintk kernel parameter.
+	 */
+	ldr	x5, =EARLYCON_IOBASE		// UART virtual address
+	add	x0, x26, #2 * PAGE_SIZE		// section table address
+	create_pgd_entry x26, x0, x5, x6, x7
+#endif
 	ret
 ENDPROC(__create_page_tables)
 	.ltorg
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index a6885d8..f4dd585 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -25,6 +25,7 @@
 #include <linux/nodemask.h>
 #include <linux/memblock.h>
 #include <linux/fs.h>
+#include <linux/io.h>
 
 #include <asm/cputype.h>
 #include <asm/sections.h>
@@ -251,6 +252,47 @@ static void __init create_mapping(phys_addr_t phys, unsigned long virt,
 	} while (pgd++, addr = next, addr != end);
 }
 
+#ifdef CONFIG_EARLY_PRINTK
+/*
+ * Create an early I/O mapping using the pgd/pmd entries already populated
+ * in head.S as this function is called too early to allocated any memory. The
+ * mapping size is 2MB with 4KB pages or 64KB or 64KB pages.
+ */
+void __iomem * __init early_io_map(phys_addr_t phys, unsigned long virt)
+{
+	unsigned long size, mask;
+	bool page64k = IS_ENABLED(ARM64_64K_PAGES);
+	pgd_t *pgd;
+	pud_t *pud;
+	pmd_t *pmd;
+	pte_t *pte;
+
+	/*
+	 * No early pte entries with !ARM64_64K_PAGES configuration, so using
+	 * sections (pmd).
+	 */
+	size = page64k ? PAGE_SIZE : SECTION_SIZE;
+	mask = ~(size - 1);
+
+	pgd = pgd_offset_k(virt);
+	pud = pud_offset(pgd, virt);
+	if (pud_none(*pud))
+		return NULL;
+	pmd = pmd_offset(pud, virt);
+
+	if (page64k) {
+		if (pmd_none(*pmd))
+			return NULL;
+		pte = pte_offset_kernel(pmd, virt);
+		set_pte(pte, __pte((phys & mask) | PROT_DEVICE_nGnRE));
+	} else {
+		set_pmd(pmd, __pmd((phys & mask) | PROT_SECT_DEVICE_nGnRE));
+	}
+
+	return (void __iomem *)((virt & mask) + (phys & ~mask));
+}
+#endif
+
 static void __init map_mem(void)
 {
 	struct memblock_region *reg;

[PATCH v3 0/7] arm64: ARMv8 RTSM model SoC support

[Arnd Bergmann]

On Friday 04 January 2013, Catalin Marinas wrote:
> That's the third version of the patch series adding support for the
> ARMv8 RTSM model (vexpress-like) to the AArch64 kernel. There is no
> SoC-specific code under arch/arm64/ as the kernel makes use of the
> vexpress support already under drivers/ (apart from dts, defconfig and
> some Kconfig changes).


Whole series:

Acked-by: Arnd Bergmann <arnd@arndb.de>

[PATCH v3 2/7] vexpress: Match the "arm, sp810" DT entry for clock initialisation

[Christopher Covington]

Hi Catalin,

On 01/04/2013 09:17 AM, Catalin Marinas wrote:
> Currently the clk-vexpress.c implementation relies on the vexpress code
> to call the vexpress_clk_of_init() function which performs the SP810
> initialisation. This patch adds "arm,sp810" to the clock DT match array
> allowing of_clk_init() to call the vexpress_sp810_of_setup() function.
> In case of CONFIG_ARM64, make vexpress_clk_of_init() an arch_initcall().
> 
> Note that SP810 requires the fixed clocks to be already registered.
> Since the clock subsystem does not handle DT dependencies, the
> corresponding DT entries must be in the correct order.
> 
> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Pawel Moll <pawel.moll@arm.com>
> ---
>  drivers/clk/versatile/clk-vexpress.c | 28 +++++++++++++++++-----------
>  include/linux/vexpress.h             |  2 +-
>  2 files changed, 18 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/clk/versatile/clk-vexpress.c b/drivers/clk/versatile/clk-vexpress.c
> index 4f83ff9..a3754e7 100644
> --- a/drivers/clk/versatile/clk-vexpress.c
> +++ b/drivers/clk/versatile/clk-vexpress.c

[...]

> @@ -138,4 +128,20 @@ void __init vexpress_clk_of_init(void)
>  				"v2m-timer1", "sp804"));
>  }
>  
> +static const __initconst struct of_device_id vexpress_clk_match[] = {
> +	{ .compatible = "fixed-clock", .data = of_fixed_clk_setup, },
> +	{ .compatible = "arm,vexpress-osc", .data = vexpress_osc_of_setup, },
> +	{ .compatible = "arm,sp810", .data = vexpress_sp810_of_setup, },
> +	{}
> +};
> +
> +int __init vexpress_clk_of_init(void)
> +{
> +	of_clk_init(vexpress_clk_match);
> +	return 0;
> +}
> +#ifdef CONFIG_ARM64
> +arch_initcall(vexpress_clk_of_init);
> +#endif

Any way to avoid the ifdef? Is it intended to be a temporarily solution?

Thanks,
Christopher

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by
the Linux Foundation

[PATCH v3 2/7] vexpress: Match the "arm, sp810" DT entry for clock initialisation

[Catalin Marinas]

On Fri, Jan 04, 2013 at 03:37:37PM +0000, Christopher Covington wrote:
> On 01/04/2013 09:17 AM, Catalin Marinas wrote:
> > Currently the clk-vexpress.c implementation relies on the vexpress code
> > to call the vexpress_clk_of_init() function which performs the SP810
> > initialisation. This patch adds "arm,sp810" to the clock DT match array
> > allowing of_clk_init() to call the vexpress_sp810_of_setup() function.
> > In case of CONFIG_ARM64, make vexpress_clk_of_init() an arch_initcall().
> > 
> > Note that SP810 requires the fixed clocks to be already registered.
> > Since the clock subsystem does not handle DT dependencies, the
> > corresponding DT entries must be in the correct order.
> > 
> > Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
> > Cc: Pawel Moll <pawel.moll@arm.com>
> > ---
> >  drivers/clk/versatile/clk-vexpress.c | 28 +++++++++++++++++-----------
> >  include/linux/vexpress.h             |  2 +-
> >  2 files changed, 18 insertions(+), 12 deletions(-)
> > 
> > diff --git a/drivers/clk/versatile/clk-vexpress.c b/drivers/clk/versatile/clk-vexpress.c
> > index 4f83ff9..a3754e7 100644
> > --- a/drivers/clk/versatile/clk-vexpress.c
> > +++ b/drivers/clk/versatile/clk-vexpress.c
> 
> [...]
> 
> > @@ -138,4 +128,20 @@ void __init vexpress_clk_of_init(void)
> >  				"v2m-timer1", "sp804"));
> >  }
> >  
> > +static const __initconst struct of_device_id vexpress_clk_match[] = {
> > +	{ .compatible = "fixed-clock", .data = of_fixed_clk_setup, },
> > +	{ .compatible = "arm,vexpress-osc", .data = vexpress_osc_of_setup, },
> > +	{ .compatible = "arm,sp810", .data = vexpress_sp810_of_setup, },
> > +	{}
> > +};
> > +
> > +int __init vexpress_clk_of_init(void)
> > +{
> > +	of_clk_init(vexpress_clk_match);
> > +	return 0;
> > +}
> > +#ifdef CONFIG_ARM64
> > +arch_initcall(vexpress_clk_of_init);
> > +#endif
> 
> Any way to avoid the ifdef? Is it intended to be a temporarily solution?

It's harder since ARMv7 vexpress needs to initialise the clocks earlier
(v2m_dt_timer_init). On ARMv8 we always have the architected timers and
can afford an arch_initcall() here.

-- 
Catalin

[PATCH v3 0/7] arm64: ARMv8 RTSM model SoC support

[Christopher Covington]

Hi Catalin,

On 01/04/2013 09:17 AM, Catalin Marinas wrote:
> Hi,
> 
> That's the third version of the patch series adding support for the
> ARMv8 RTSM model (vexpress-like) to the AArch64 kernel. There is no
> SoC-specific code under arch/arm64/ as the kernel makes use of the
> vexpress support already under drivers/ (apart from dts, defconfig and
> some Kconfig changes).
> 
> The patches here can be found on this branch:
> 
> git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64.git soc-armv8-experimental

In case you weren't aware:

git checkout catalin/soc-armv8-experimental
ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabi- make vexpress_defconfig
ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabi- make Image

  CC      drivers/irqchip/gic.o
drivers/irqchip/gic.c: In function 'gic_init':
drivers/irqchip/gic.c:399:2: error: 'handle_arch_irq' undeclared (first use in this function)
drivers/irqchip/gic.c:399:2: note: each undeclared identifier is reported only once for each function it appears in

arm64 builds fine for me. I haven't tried merging Rob Herring's GIC
stuff. I may just postpone further poking around until those changes
land.

Regards,
Christopher

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by the Linux Foundation

[PATCH v3 0/7] arm64: ARMv8 RTSM model SoC support

[Catalin Marinas]

Hi Christopher,

On 4 January 2013 16:16, Christopher Covington <cov@codeaurora.org> wrote:
> On 01/04/2013 09:17 AM, Catalin Marinas wrote:
>> That's the third version of the patch series adding support for the
>> ARMv8 RTSM model (vexpress-like) to the AArch64 kernel. There is no
>> SoC-specific code under arch/arm64/ as the kernel makes use of the
>> vexpress support already under drivers/ (apart from dts, defconfig and
>> some Kconfig changes).
>>
>> The patches here can be found on this branch:
>>
>> git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64.git soc-armv8-experimental
>
> In case you weren't aware:
>
> git checkout catalin/soc-armv8-experimental
> ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabi- make vexpress_defconfig
> ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabi- make Image
>
>   CC      drivers/irqchip/gic.o
> drivers/irqchip/gic.c: In function 'gic_init':
> drivers/irqchip/gic.c:399:2: error: 'handle_arch_irq' undeclared (first use in this function)
> drivers/irqchip/gic.c:399:2: note: each undeclared identifier is reported only once for each function it appears in
>
> arm64 builds fine for me. I haven't tried merging Rob Herring's GIC
> stuff. I may just postpone further poking around until those changes
> land.

I am aware of this, I have a temporary patch adding GIC support under
drivers/irqchip/ (I should have named the config option ARM64_GIC to
avoid building it with CONFIG_ARM). But the right approach is Rob's
patches moving the GIC out of arch/arm/, so once they get into -next
I'll drop mine.

-- 
Catalin

[PATCH v3 2/7] vexpress: Match the "arm, sp810" DT entry for clock initialisation

[Jon Medhurst (Tixy)]

On Fri, 2013-01-04 at 14:17 +0000, Catalin Marinas wrote:
> Currently the clk-vexpress.c implementation relies on the vexpress code
> to call the vexpress_clk_of_init() function which performs the SP810
> initialisation. This patch adds "arm,sp810" to the clock DT match array
> allowing of_clk_init() to call the vexpress_sp810_of_setup() function.
> In case of CONFIG_ARM64, make vexpress_clk_of_init() an arch_initcall().
> 
> Note that SP810 requires the fixed clocks to be already registered.
> Since the clock subsystem does not handle DT dependencies, the
> corresponding DT entries must be in the correct order.

Which they aren't on 32-bit vexpress ;-) leading to:

  ERROR: could not get clock /smb/motherboard/iofpga at 3,00000000/sysctl at 020000:refclk(0)
  ERROR: could not get clock /smb/motherboard/iofpga at 3,00000000/sysctl at 020000:timclk(1)
  ------------[ cut here ]------------
  WARNING: at drivers/clk/versatile/clk-vexpress.c:112 vexpress_sp810_of_setup+0x43/0xc8()
  Modules linked in:
  [<c0011cbd>] (unwind_backtrace+0x1/0x9c) from [<c001c1a9>] (warn_slowpath_common+0x39/0x50)
  [<c001c1a9>] (warn_slowpath_common+0x39/0x50) from [<c001c1d7>] (warn_slowpath_null+0x17/0x1c)
  [<c001c1d7>] (warn_slowpath_null+0x17/0x1c) from [<c05b4fab>] (vexpress_sp810_of_setup+0x43/0xc8)
  [<c05b4fab>] (vexpress_sp810_of_setup+0x43/0xc8) from [<c05b4e67>] (of_clk_init+0x1f/0x34)
  [<c05b4e67>] (of_clk_init+0x1f/0x34) from [<c05b515d>] (vexpress_clk_of_init+0x9/0x10)
  [<c05b515d>] (vexpress_clk_of_init+0x9/0x10) from [<c05a7d2b>] (v2m_dt_timer_init+0x7/0x78)
  [<c05a7d2b>] (v2m_dt_timer_init+0x7/0x78) from [<c05a4d09>] (time_init+0x11/0x20)
  [<c05a4d09>] (time_init+0x11/0x20) from [<c05a24fb>] (start_kernel+0x113/0x214)
  [<c05a24fb>] (start_kernel+0x113/0x214) from [<8000807f>] (0x8000807f)
  ---[ end trace 1b75b31a2719ed1c ]---

After moving all "fixed-clock" nodes to be the first devices in
arch/arm/boot/dts/vexpress-v2m{-rs1,}.dtsi then all appears well. (I am
only trying out patches 1-3 of this set at the moment).

-- 
Tixy

> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Pawel Moll <pawel.moll@arm.com>
> ---
>  drivers/clk/versatile/clk-vexpress.c | 28 +++++++++++++++++-----------
>  include/linux/vexpress.h             |  2 +-
>  2 files changed, 18 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/clk/versatile/clk-vexpress.c b/drivers/clk/versatile/clk-vexpress.c
> index 4f83ff9..a3754e7 100644
> --- a/drivers/clk/versatile/clk-vexpress.c
> +++ b/drivers/clk/versatile/clk-vexpress.c
> @@ -98,21 +98,11 @@ struct clk *vexpress_sp810_of_get(struct of_phandle_args *clkspec, void *data)
>  	return vexpress_sp810_timerclken[clkspec->args[0]];
>  }
>  
> -static const __initconst struct of_device_id vexpress_fixed_clk_match[] = {
> -	{ .compatible = "fixed-clock", .data = of_fixed_clk_setup, },
> -	{ .compatible = "arm,vexpress-osc", .data = vexpress_osc_of_setup, },
> -	{}
> -};
> -
> -void __init vexpress_clk_of_init(void)
> +static void __init vexpress_sp810_of_setup(struct device_node *node)
>  {
> -	struct device_node *node;
>  	struct clk *clk;
>  	struct clk *refclk, *timclk;
>  
> -	of_clk_init(vexpress_fixed_clk_match);
> -
> -	node = of_find_compatible_node(NULL, NULL, "arm,sp810");
>  	vexpress_sp810_init(of_iomap(node, 0));
>  	of_clk_add_provider(node, vexpress_sp810_of_get, NULL);
>  
> @@ -138,4 +128,20 @@ void __init vexpress_clk_of_init(void)
>  				"v2m-timer1", "sp804"));
>  }
>  
> +static const __initconst struct of_device_id vexpress_clk_match[] = {
> +	{ .compatible = "fixed-clock", .data = of_fixed_clk_setup, },
> +	{ .compatible = "arm,vexpress-osc", .data = vexpress_osc_of_setup, },
> +	{ .compatible = "arm,sp810", .data = vexpress_sp810_of_setup, },
> +	{}
> +};
> +
> +int __init vexpress_clk_of_init(void)
> +{
> +	of_clk_init(vexpress_clk_match);
> +	return 0;
> +}
> +#ifdef CONFIG_ARM64
> +arch_initcall(vexpress_clk_of_init);
> +#endif
> +
>  #endif
> diff --git a/include/linux/vexpress.h b/include/linux/vexpress.h
> index c52215f..b55ae6a 100644
> --- a/include/linux/vexpress.h
> +++ b/include/linux/vexpress.h
> @@ -116,6 +116,6 @@ struct clk *vexpress_osc_setup(struct device *dev);
>  void vexpress_osc_of_setup(struct device_node *node);
>  
>  void vexpress_clk_init(void __iomem *sp810_base);
> -void vexpress_clk_of_init(void);
> +int vexpress_clk_of_init(void);
>  
>  #endif
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH v3 2/7] vexpress: Match the "arm, sp810" DT entry for clock initialisation

[Catalin Marinas]

On Tue, Jan 08, 2013 at 05:29:07PM +0000, Jon Medhurst (Tixy) wrote:
> On Fri, 2013-01-04 at 14:17 +0000, Catalin Marinas wrote:
> > Currently the clk-vexpress.c implementation relies on the vexpress code
> > to call the vexpress_clk_of_init() function which performs the SP810
> > initialisation. This patch adds "arm,sp810" to the clock DT match array
> > allowing of_clk_init() to call the vexpress_sp810_of_setup() function.
> > In case of CONFIG_ARM64, make vexpress_clk_of_init() an arch_initcall().
> > 
> > Note that SP810 requires the fixed clocks to be already registered.
> > Since the clock subsystem does not handle DT dependencies, the
> > corresponding DT entries must be in the correct order.
> 
> Which they aren't on 32-bit vexpress ;-) leading to:
> 
>   ERROR: could not get clock /smb/motherboard/iofpga at 3,00000000/sysctl at 020000:refclk(0)
>   ERROR: could not get clock /smb/motherboard/iofpga at 3,00000000/sysctl at 020000:timclk(1)
>   ------------[ cut here ]------------
>   WARNING: at drivers/clk/versatile/clk-vexpress.c:112 vexpress_sp810_of_setup+0x43/0xc8()
>   Modules linked in:
>   [<c0011cbd>] (unwind_backtrace+0x1/0x9c) from [<c001c1a9>] (warn_slowpath_common+0x39/0x50)
>   [<c001c1a9>] (warn_slowpath_common+0x39/0x50) from [<c001c1d7>] (warn_slowpath_null+0x17/0x1c)
>   [<c001c1d7>] (warn_slowpath_null+0x17/0x1c) from [<c05b4fab>] (vexpress_sp810_of_setup+0x43/0xc8)
>   [<c05b4fab>] (vexpress_sp810_of_setup+0x43/0xc8) from [<c05b4e67>] (of_clk_init+0x1f/0x34)
>   [<c05b4e67>] (of_clk_init+0x1f/0x34) from [<c05b515d>] (vexpress_clk_of_init+0x9/0x10)
>   [<c05b515d>] (vexpress_clk_of_init+0x9/0x10) from [<c05a7d2b>] (v2m_dt_timer_init+0x7/0x78)
>   [<c05a7d2b>] (v2m_dt_timer_init+0x7/0x78) from [<c05a4d09>] (time_init+0x11/0x20)
>   [<c05a4d09>] (time_init+0x11/0x20) from [<c05a24fb>] (start_kernel+0x113/0x214)
>   [<c05a24fb>] (start_kernel+0x113/0x214) from [<8000807f>] (0x8000807f)
>   ---[ end trace 1b75b31a2719ed1c ]---
> 
> After moving all "fixed-clock" nodes to be the first devices in
> arch/arm/boot/dts/vexpress-v2m{-rs1,}.dtsi then all appears well. (I am
> only trying out patches 1-3 of this set at the moment).

I'm waiting for Pawel's feedback (he's still on holiday). He may have a
better solution for the vexpress code than relying on the dts order but
for now the simples fix is to change the dts. An even better solution
would be for the of_clk_init() code to track dependencies.

-- 
Catalin

[PATCH v3 2/7] vexpress: Match the "arm, sp810" DT entry for clock initialisation

[Jon Medhurst (Tixy)]

On Wed, 2013-01-09 at 11:36 +0000, Catalin Marinas wrote:
> On Tue, Jan 08, 2013 at 05:29:07PM +0000, Jon Medhurst (Tixy) wrote:
> > On Fri, 2013-01-04 at 14:17 +0000, Catalin Marinas wrote:
> > > Currently the clk-vexpress.c implementation relies on the vexpress code
> > > to call the vexpress_clk_of_init() function which performs the SP810
> > > initialisation. This patch adds "arm,sp810" to the clock DT match array
> > > allowing of_clk_init() to call the vexpress_sp810_of_setup() function.
> > > In case of CONFIG_ARM64, make vexpress_clk_of_init() an arch_initcall().
> > > 
> > > Note that SP810 requires the fixed clocks to be already registered.
> > > Since the clock subsystem does not handle DT dependencies, the
> > > corresponding DT entries must be in the correct order.
> > 
> > Which they aren't on 32-bit vexpress ;-) leading to:
> > 
> >   ERROR: could not get clock /smb/motherboard/iofpga at 3,00000000/sysctl at 020000:refclk(0)
> >   ERROR: could not get clock /smb/motherboard/iofpga at 3,00000000/sysctl at 020000:timclk(1)
> >   ------------[ cut here ]------------
> >   WARNING: at drivers/clk/versatile/clk-vexpress.c:112 vexpress_sp810_of_setup+0x43/0xc8()
> >   Modules linked in:
> >   [<c0011cbd>] (unwind_backtrace+0x1/0x9c) from [<c001c1a9>] (warn_slowpath_common+0x39/0x50)
> >   [<c001c1a9>] (warn_slowpath_common+0x39/0x50) from [<c001c1d7>] (warn_slowpath_null+0x17/0x1c)
> >   [<c001c1d7>] (warn_slowpath_null+0x17/0x1c) from [<c05b4fab>] (vexpress_sp810_of_setup+0x43/0xc8)
> >   [<c05b4fab>] (vexpress_sp810_of_setup+0x43/0xc8) from [<c05b4e67>] (of_clk_init+0x1f/0x34)
> >   [<c05b4e67>] (of_clk_init+0x1f/0x34) from [<c05b515d>] (vexpress_clk_of_init+0x9/0x10)
> >   [<c05b515d>] (vexpress_clk_of_init+0x9/0x10) from [<c05a7d2b>] (v2m_dt_timer_init+0x7/0x78)
> >   [<c05a7d2b>] (v2m_dt_timer_init+0x7/0x78) from [<c05a4d09>] (time_init+0x11/0x20)
> >   [<c05a4d09>] (time_init+0x11/0x20) from [<c05a24fb>] (start_kernel+0x113/0x214)
> >   [<c05a24fb>] (start_kernel+0x113/0x214) from [<8000807f>] (0x8000807f)
> >   ---[ end trace 1b75b31a2719ed1c ]---
> > 
> > After moving all "fixed-clock" nodes to be the first devices in
> > arch/arm/boot/dts/vexpress-v2m{-rs1,}.dtsi then all appears well. (I am
> > only trying out patches 1-3 of this set at the moment).
> 
> I'm waiting for Pawel's feedback (he's still on holiday). He may have a
> better solution for the vexpress code than relying on the dts order but
> for now the simples fix is to change the dts.

Fair enough. But if the patch series gets used as is then another patch
will need to be added to it to fix the device-trees.

-- 
Tixy

[PATCH v3 2/7] vexpress: Match the "arm, sp810" DT entry for clock initialisation

[Catalin Marinas]

On Wed, Jan 09, 2013 at 11:50:14AM +0000, Jon Medhurst (Tixy) wrote:
> On Wed, 2013-01-09 at 11:36 +0000, Catalin Marinas wrote:
> > On Tue, Jan 08, 2013 at 05:29:07PM +0000, Jon Medhurst (Tixy) wrote:
> > > On Fri, 2013-01-04 at 14:17 +0000, Catalin Marinas wrote:
> > > > Currently the clk-vexpress.c implementation relies on the vexpress code
> > > > to call the vexpress_clk_of_init() function which performs the SP810
> > > > initialisation. This patch adds "arm,sp810" to the clock DT match array
> > > > allowing of_clk_init() to call the vexpress_sp810_of_setup() function.
> > > > In case of CONFIG_ARM64, make vexpress_clk_of_init() an arch_initcall().
> > > > 
> > > > Note that SP810 requires the fixed clocks to be already registered.
> > > > Since the clock subsystem does not handle DT dependencies, the
> > > > corresponding DT entries must be in the correct order.
> > > 
> > > Which they aren't on 32-bit vexpress ;-) leading to:
> > > 
> > >   ERROR: could not get clock /smb/motherboard/iofpga at 3,00000000/sysctl at 020000:refclk(0)
> > >   ERROR: could not get clock /smb/motherboard/iofpga at 3,00000000/sysctl at 020000:timclk(1)
> > >   ------------[ cut here ]------------
> > >   WARNING: at drivers/clk/versatile/clk-vexpress.c:112 vexpress_sp810_of_setup+0x43/0xc8()
> > >   Modules linked in:
> > >   [<c0011cbd>] (unwind_backtrace+0x1/0x9c) from [<c001c1a9>] (warn_slowpath_common+0x39/0x50)
> > >   [<c001c1a9>] (warn_slowpath_common+0x39/0x50) from [<c001c1d7>] (warn_slowpath_null+0x17/0x1c)
> > >   [<c001c1d7>] (warn_slowpath_null+0x17/0x1c) from [<c05b4fab>] (vexpress_sp810_of_setup+0x43/0xc8)
> > >   [<c05b4fab>] (vexpress_sp810_of_setup+0x43/0xc8) from [<c05b4e67>] (of_clk_init+0x1f/0x34)
> > >   [<c05b4e67>] (of_clk_init+0x1f/0x34) from [<c05b515d>] (vexpress_clk_of_init+0x9/0x10)
> > >   [<c05b515d>] (vexpress_clk_of_init+0x9/0x10) from [<c05a7d2b>] (v2m_dt_timer_init+0x7/0x78)
> > >   [<c05a7d2b>] (v2m_dt_timer_init+0x7/0x78) from [<c05a4d09>] (time_init+0x11/0x20)
> > >   [<c05a4d09>] (time_init+0x11/0x20) from [<c05a24fb>] (start_kernel+0x113/0x214)
> > >   [<c05a24fb>] (start_kernel+0x113/0x214) from [<8000807f>] (0x8000807f)
> > >   ---[ end trace 1b75b31a2719ed1c ]---
> > > 
> > > After moving all "fixed-clock" nodes to be the first devices in
> > > arch/arm/boot/dts/vexpress-v2m{-rs1,}.dtsi then all appears well. (I am
> > > only trying out patches 1-3 of this set at the moment).
> > 
> > I'm waiting for Pawel's feedback (he's still on holiday). He may have a
> > better solution for the vexpress code than relying on the dts order but
> > for now the simples fix is to change the dts.
> 
> Fair enough. But if the patch series gets used as is then another patch
> will need to be added to it to fix the device-trees.

Yes, indeed. I won't break 32-bit support ;)

-- 
Catalin