From: nicolas.pitre@linaro.org (Nicolas Pitre)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 02/16] ARM: b.L: introduce the CPU/cluster power API
Date: Wed, 09 Jan 2013 19:20:37 -0500 [thread overview]
Message-ID: <1357777251-13541-3-git-send-email-nicolas.pitre@linaro.org> (raw)
In-Reply-To: <1357777251-13541-1-git-send-email-nicolas.pitre@linaro.org>
This is the basic API used to handle the powering up/down of individual
CPUs in a big.LITTLE system. The platform specific backend implementation
has the responsibility to also handle the cluster level power as well when
the first/last CPU in a cluster is brought up/down.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
---
arch/arm/common/bL_entry.c | 88 +++++++++++++++++++++++++++++++++++++++
arch/arm/include/asm/bL_entry.h | 92 +++++++++++++++++++++++++++++++++++++++++
2 files changed, 180 insertions(+)
diff --git a/arch/arm/common/bL_entry.c b/arch/arm/common/bL_entry.c
index 80fff49417..41de0622de 100644
--- a/arch/arm/common/bL_entry.c
+++ b/arch/arm/common/bL_entry.c
@@ -11,11 +11,13 @@
#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/irqflags.h>
#include <asm/bL_entry.h>
#include <asm/barrier.h>
#include <asm/proc-fns.h>
#include <asm/cacheflush.h>
+#include <asm/idmap.h>
extern volatile unsigned long bL_entry_vectors[BL_NR_CLUSTERS][BL_CPUS_PER_CLUSTER];
@@ -28,3 +30,89 @@ void bL_set_entry_vector(unsigned cpu, unsigned cluster, void *ptr)
outer_clean_range(__pa(&bL_entry_vectors[cluster][cpu]),
__pa(&bL_entry_vectors[cluster][cpu + 1]));
}
+
+static const struct bL_platform_power_ops *platform_ops;
+
+int __init bL_platform_power_register(const struct bL_platform_power_ops *ops)
+{
+ if (platform_ops)
+ return -EBUSY;
+ platform_ops = ops;
+ return 0;
+}
+
+int bL_cpu_power_up(unsigned int cpu, unsigned int cluster)
+{
+ if (!platform_ops)
+ return -EUNATCH;
+ might_sleep();
+ return platform_ops->power_up(cpu, cluster);
+}
+
+typedef void (*phys_reset_t)(unsigned long);
+
+void bL_cpu_power_down(void)
+{
+ phys_reset_t phys_reset;
+
+ BUG_ON(!platform_ops);
+ BUG_ON(!irqs_disabled());
+
+ /*
+ * Do this before calling into the power_down method,
+ * as it might not always be safe to do afterwards.
+ */
+ setup_mm_for_reboot();
+
+ platform_ops->power_down();
+
+ /*
+ * It is possible for a power_up request to happen concurrently
+ * with a power_down request for the same CPU. In this case the
+ * power_down method might not be able to actually enter a
+ * powered down state with the WFI instruction if the power_up
+ * method has removed the required reset condition. The
+ * power_down method is then allowed to return. We must perform
+ * a re-entry in the kernel as if the power_up method just had
+ * deasserted reset on the CPU.
+ *
+ * To simplify race issues, the platform specific implementation
+ * must accommodate for the possibility of unordered calls to
+ * power_down and power_up with a usage count. Therefore, if a
+ * call to power_up is issued for a CPU that is not down, then
+ * the next call to power_down must not attempt a full shutdown
+ * but only do the minimum (normally disabling L1 cache and CPU
+ * coherency) and return just as if a concurrent power_up request
+ * had happened as described above.
+ */
+
+ phys_reset = (phys_reset_t)(unsigned long)virt_to_phys(cpu_reset);
+ phys_reset(virt_to_phys(bL_entry_point));
+
+ /* should never get here */
+ BUG();
+}
+
+void bL_cpu_suspend(u64 expected_residency)
+{
+ phys_reset_t phys_reset;
+
+ BUG_ON(!platform_ops);
+ BUG_ON(!irqs_disabled());
+
+ /* Very similar to bL_cpu_power_down() */
+ setup_mm_for_reboot();
+ platform_ops->suspend(expected_residency);
+ phys_reset = (phys_reset_t)(unsigned long)virt_to_phys(cpu_reset);
+ phys_reset(virt_to_phys(bL_entry_point));
+ BUG();
+}
+
+int bL_cpu_powered_up(void)
+{
+ if (!platform_ops)
+ return -EUNATCH;
+ if (platform_ops->powered_up)
+ platform_ops->powered_up();
+ return 0;
+}
diff --git a/arch/arm/include/asm/bL_entry.h b/arch/arm/include/asm/bL_entry.h
index ff623333a1..942d7f9f19 100644
--- a/arch/arm/include/asm/bL_entry.h
+++ b/arch/arm/include/asm/bL_entry.h
@@ -31,5 +31,97 @@ extern void bL_entry_point(void);
*/
void bL_set_entry_vector(unsigned cpu, unsigned cluster, void *ptr);
+/*
+ * CPU/cluster power operations API for higher subsystems to use.
+ */
+
+/**
+ * bL_cpu_power_up - make given CPU in given cluster runable
+ *
+ * @cpu: CPU number within given cluster
+ * @cluster: cluster number for the CPU
+ *
+ * The identified CPU is brought out of reset. If the cluster was powered
+ * down then it is brought up as well, taking care not to let the other CPUs
+ * in the cluster run, and ensuring appropriate cluster setup.
+ *
+ * Caller must ensure the appropriate entry vector is initialized with
+ * bL_set_entry_vector() prior to calling this.
+ *
+ * This must be called in a sleepable context. However, the implementation
+ * is strongly encouraged to return early and let the operation happen
+ * asynchronously, especially when significant delays are expected.
+ *
+ * If the operation cannot be performed then an error code is returned.
+ */
+int bL_cpu_power_up(unsigned int cpu, unsigned int cluster);
+
+/**
+ * bL_cpu_power_down - power the calling CPU down
+ *
+ * The calling CPU is powered down.
+ *
+ * If this CPU is found to be the "last man standing" in the cluster
+ * then the cluster is prepared for power-down too.
+ *
+ * This must be called with interrupts disabled.
+ *
+ * This does not return. Re-entry in the kernel is expected via
+ * bL_entry_point.
+ */
+void bL_cpu_power_down(void);
+
+/**
+ * bL_cpu_suspend - bring the calling CPU in a suspended state
+ *
+ * @expected_residency: duration in microseconds the CPU is expected
+ * to remain suspended, or 0 if unknown/infinity.
+ *
+ * The calling CPU is suspended. The expected residency argument is used
+ * as a hint by the platform specific backend to implement the appropriate
+ * sleep state level according to the knowledge it has on wake-up latency
+ * for the given hardware.
+ *
+ * If this CPU is found to be the "last man standing" in the cluster
+ * then the cluster may be prepared for power-down too, if the expected
+ * residency makes it worthwhile.
+ *
+ * This must be called with interrupts disabled.
+ *
+ * This does not return. Re-entry in the kernel is expected via
+ * bL_entry_point.
+ */
+void bL_cpu_suspend(u64 expected_residency);
+
+/**
+ * bL_cpu_powered_up - housekeeping workafter a CPU has been powered up
+ *
+ * This lets the platform specific backend code perform needed housekeeping
+ * work. This must be called by the newly activated CPU as soon as it is
+ * fully operational in kernel space, before it enables interrupts.
+ *
+ * If the operation cannot be performed then an error code is returned.
+ */
+int bL_cpu_powered_up(void);
+
+/*
+ * Platform specific methods used in the implementation of the above API.
+ */
+struct bL_platform_power_ops {
+ int (*power_up)(unsigned int cpu, unsigned int cluster);
+ void (*power_down)(void);
+ void (*suspend)(u64);
+ void (*powered_up)(void);
+};
+
+/**
+ * bL_platform_power_register - register platform specific power methods
+ *
+ * @ops: bL_platform_power_ops structure to register
+ *
+ * An error is returned if the registration has been done previously.
+ */
+int __init bL_platform_power_register(const struct bL_platform_power_ops *ops);
+
#endif /* ! __ASSEMBLY__ */
#endif
--
1.8.0
next prev parent reply other threads:[~2013-01-10 0:20 UTC|newest]
Thread overview: 132+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-01-10 0:20 [PATCH 00/16] big.LITTLE low-level CPU and cluster power management Nicolas Pitre
2013-01-10 0:20 ` [PATCH 01/16] ARM: b.L: secondary kernel entry code Nicolas Pitre
2013-01-10 7:12 ` Stephen Boyd
2013-01-10 15:30 ` Nicolas Pitre
2013-01-10 15:34 ` Catalin Marinas
2013-01-10 16:47 ` Nicolas Pitre
2013-01-11 11:45 ` Catalin Marinas
2013-01-11 12:05 ` Lorenzo Pieralisi
2013-01-11 12:19 ` Dave Martin
2013-01-10 23:05 ` Will Deacon
2013-01-11 1:26 ` Nicolas Pitre
2013-01-11 10:55 ` Will Deacon
2013-01-11 11:35 ` Dave Martin
2013-01-11 17:16 ` Santosh Shilimkar
2013-01-11 18:10 ` Nicolas Pitre
2013-01-11 18:30 ` Santosh Shilimkar
2013-03-07 7:37 ` Pavel Machek
2013-03-07 8:57 ` Nicolas Pitre
2013-01-10 0:20 ` Nicolas Pitre [this message]
2013-01-10 23:08 ` [PATCH 02/16] ARM: b.L: introduce the CPU/cluster power API Will Deacon
2013-01-11 2:30 ` Nicolas Pitre
2013-01-11 10:58 ` Will Deacon
2013-01-11 11:29 ` Dave Martin
2013-01-11 17:26 ` Santosh Shilimkar
2013-01-11 18:33 ` Nicolas Pitre
2013-01-11 18:41 ` Santosh Shilimkar
2013-01-11 19:54 ` Nicolas Pitre
2013-01-10 0:20 ` [PATCH 03/16] ARM: b.L: introduce helpers for platform coherency exit/setup Nicolas Pitre
2013-01-10 12:01 ` Dave Martin
2013-01-10 19:04 ` Nicolas Pitre
2013-01-11 11:30 ` Dave Martin
2013-01-10 16:53 ` Catalin Marinas
2013-01-10 17:59 ` Nicolas Pitre
2013-01-10 21:50 ` Catalin Marinas
2013-01-10 22:31 ` Nicolas Pitre
2013-01-11 10:36 ` Dave Martin
2013-01-10 22:32 ` Nicolas Pitre
2013-01-10 23:13 ` Will Deacon
2013-01-11 1:50 ` Nicolas Pitre
2013-01-11 11:09 ` Dave Martin
2013-01-11 17:46 ` Santosh Shilimkar
2013-01-11 18:07 ` Dave Martin
2013-01-11 18:34 ` Santosh Shilimkar
2013-01-14 17:08 ` Dave Martin
2013-01-14 17:15 ` Catalin Marinas
2013-01-14 18:10 ` Dave Martin
2013-01-14 21:34 ` Catalin Marinas
2013-01-10 0:20 ` [PATCH 04/16] ARM: b.L: Add baremetal voting mutexes Nicolas Pitre
2013-01-10 23:18 ` Will Deacon
2013-01-11 3:15 ` Nicolas Pitre
2013-01-11 11:03 ` Will Deacon
2013-01-11 16:57 ` Dave Martin
2013-01-10 0:20 ` [PATCH 05/16] ARM: bL_head: vlock-based first man election Nicolas Pitre
2013-01-10 0:20 ` [PATCH 06/16] ARM: b.L: generic SMP secondary bringup and hotplug support Nicolas Pitre
2013-01-11 18:02 ` Santosh Shilimkar
2013-01-14 18:05 ` Achin Gupta
2013-01-15 6:32 ` Santosh Shilimkar
2013-01-15 11:18 ` Achin Gupta
2013-01-15 11:26 ` Santosh Shilimkar
2013-01-15 18:53 ` Dave Martin
2013-01-14 16:35 ` Will Deacon
2013-01-14 16:51 ` Nicolas Pitre
2013-01-15 19:09 ` Dave Martin
2013-01-10 0:20 ` [PATCH 07/16] ARM: bL_platsmp.c: close the kernel entry gate before hot-unplugging a CPU Nicolas Pitre
2013-01-14 16:37 ` Will Deacon
2013-01-14 16:53 ` Nicolas Pitre
2013-01-14 17:00 ` Will Deacon
2013-01-14 17:11 ` Catalin Marinas
2013-01-14 17:15 ` Nicolas Pitre
2013-01-14 17:23 ` Will Deacon
2013-01-14 18:26 ` Russell King - ARM Linux
2013-01-14 18:49 ` Nicolas Pitre
2013-01-15 18:40 ` Dave Martin
2013-01-16 16:06 ` Catalin Marinas
2013-01-10 0:20 ` [PATCH 08/16] ARM: bL_platsmp.c: make sure the GIC interface of a dying CPU is disabled Nicolas Pitre
2013-01-11 18:07 ` Santosh Shilimkar
2013-01-11 19:07 ` Nicolas Pitre
2013-01-12 6:50 ` Santosh Shilimkar
2013-01-12 16:47 ` Nicolas Pitre
2013-01-13 4:37 ` Santosh Shilimkar
2013-01-14 17:53 ` Lorenzo Pieralisi
2013-01-14 16:39 ` Will Deacon
2013-01-14 16:54 ` Nicolas Pitre
2013-01-14 17:02 ` Will Deacon
2013-01-14 17:18 ` Nicolas Pitre
2013-01-14 17:24 ` Will Deacon
2013-01-14 17:56 ` Lorenzo Pieralisi
2013-01-10 0:20 ` [PATCH 09/16] ARM: vexpress: Select the correct SMP operations at run-time Nicolas Pitre
2013-01-10 0:20 ` [PATCH 10/16] ARM: vexpress: introduce DCSCB support Nicolas Pitre
2013-01-11 18:12 ` Santosh Shilimkar
2013-01-11 19:13 ` Nicolas Pitre
2013-01-12 6:52 ` Santosh Shilimkar
2013-01-10 0:20 ` [PATCH 11/16] ARM: vexpress/dcscb: add CPU use counts to the power up/down API implementation Nicolas Pitre
2013-01-10 0:20 ` [PATCH 12/16] ARM: vexpress/dcscb: do not hardcode number of CPUs per cluster Nicolas Pitre
2013-01-10 0:20 ` [PATCH 13/16] drivers: misc: add ARM CCI support Nicolas Pitre
2013-01-11 18:20 ` Santosh Shilimkar
2013-01-11 19:22 ` Nicolas Pitre
2013-01-12 6:53 ` Santosh Shilimkar
2013-01-15 18:34 ` Dave Martin
2013-01-10 0:20 ` [PATCH 14/16] ARM: TC2: ensure powerdown-time data is flushed from cache Nicolas Pitre
2013-01-10 18:50 ` Dave Martin
2013-01-10 19:13 ` Nicolas Pitre
2013-01-11 11:38 ` Dave Martin
2013-01-10 0:20 ` [PATCH 15/16] ARM: vexpress/dcscb: handle platform coherency exit/setup and CCI Nicolas Pitre
2013-01-10 12:05 ` Dave Martin
2013-01-11 18:27 ` Santosh Shilimkar
2013-01-11 19:28 ` Nicolas Pitre
2013-01-12 7:21 ` Santosh Shilimkar
2013-01-14 12:25 ` Lorenzo Pieralisi
2013-01-15 6:23 ` Santosh Shilimkar
2013-01-15 18:20 ` Dave Martin
2013-01-16 6:33 ` Santosh Shilimkar
2013-01-16 10:03 ` Lorenzo Pieralisi
2013-01-16 10:12 ` Santosh Shilimkar
2013-01-10 0:20 ` [PATCH 16/16] ARM: vexpress/dcscb: probe via device tree Nicolas Pitre
2013-01-10 0:46 ` [PATCH 00/16] big.LITTLE low-level CPU and cluster power management Rob Herring
2013-01-10 5:04 ` Nicolas Pitre
2013-01-10 23:01 ` Will Deacon
2013-01-14 9:56 ` Joseph Lo
2013-01-14 14:05 ` Nicolas Pitre
2013-01-15 2:44 ` Joseph Lo
2013-01-15 16:44 ` Nicolas Pitre
2013-01-16 16:02 ` Catalin Marinas
2013-01-16 21:18 ` Nicolas Pitre
2013-01-17 17:55 ` Catalin Marinas
2013-01-15 18:31 ` Dave Martin
2013-03-07 8:27 ` Pavel Machek
2013-03-07 9:12 ` Nicolas Pitre
2013-03-07 9:40 ` Pavel Machek
2013-03-07 9:56 ` Nicolas Pitre
2013-03-07 14:51 ` Pavel Machek
2013-03-07 15:42 ` Nicolas Pitre
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