linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: nicolas.pitre@linaro.org (Nicolas Pitre)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 05/15] ARM: mcpm_head.S: vlock-based first man election
Date: Tue, 29 Jan 2013 02:51:00 -0500	[thread overview]
Message-ID: <1359445870-18925-6-git-send-email-nicolas.pitre@linaro.org> (raw)
In-Reply-To: <1359445870-18925-1-git-send-email-nicolas.pitre@linaro.org>

From: Dave Martin <dave.martin@linaro.org>

Instead of requiring the first man to be elected in advance (which
can be suboptimal in some situations), this patch uses a per-
cluster mutex to co-ordinate selection of the first man.

This should also make it more feasible to reuse this code path for
asynchronous cluster resume (as in CPUidle scenarios).

We must ensure that the vlock data doesn't share a cacheline with
anything else, or dirty cache eviction could corrupt it.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
---
 arch/arm/common/Makefile    |  2 +-
 arch/arm/common/mcpm_head.S | 41 ++++++++++++++++++++++++++++++++++++-----
 2 files changed, 37 insertions(+), 6 deletions(-)

diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index 23e85b1fae..c901a38c59 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -13,4 +13,4 @@ obj-$(CONFIG_SHARP_PARAM)	+= sharpsl_param.o
 obj-$(CONFIG_SHARP_SCOOP)	+= scoop.o
 obj-$(CONFIG_PCI_HOST_ITE8152)  += it8152.o
 obj-$(CONFIG_ARM_TIMER_SP804)	+= timer-sp.o
-obj-$(CONFIG_CLUSTER_PM)	+= mcpm_head.o mcpm_entry.o
+obj-$(CONFIG_CLUSTER_PM)	+= mcpm_head.o mcpm_entry.o vlock.o
diff --git a/arch/arm/common/mcpm_head.S b/arch/arm/common/mcpm_head.S
index 65db7ec87e..a2a2bb6bf0 100644
--- a/arch/arm/common/mcpm_head.S
+++ b/arch/arm/common/mcpm_head.S
@@ -16,6 +16,8 @@
 #include <linux/linkage.h>
 #include <asm/mcpm_entry.h>
 
+#include "vlock.h"
+
 .if MCPM_SYNC_CLUSTER_CPUS
 .error "cpus must be the first member of struct mcpm_sync_struct"
 .endif
@@ -69,10 +71,11 @@ ENTRY(mcpm_entry_point)
 	 * position independent way.
 	 */
 	adr	r5, 3f
-	ldmia	r5, {r6, r7, r8}
+	ldmia	r5, {r6, r7, r8, r11}
 	add	r6, r5, r6			@ r6 = mcpm_entry_vectors
 	ldr	r7, [r5, r7]			@ r7 = mcpm_power_up_setup_phys
 	add	r8, r5, r8			@ r8 = mcpm_sync
+	add	r11, r5, r11			@ r11 = first_man_locks
 
 	mov	r0, #MCPM_SYNC_CLUSTER_SIZE
 	mla	r8, r0, r10, r8			@ r8 = sync cluster base
@@ -86,13 +89,22 @@ ENTRY(mcpm_entry_point)
 	@ At this point, the cluster cannot unexpectedly enter the GOING_DOWN
 	@ state, because there is at least one active CPU (this CPU).
 
-	@ Note: the following is racy as another CPU might be testing
-	@ the same flag at the same moment.  That'll be fixed later.
+	mov	r0, #VLOCK_SIZE
+	mla	r11, r0, r10, r11		@ r11 = cluster first man lock
+	mov	r0, r11
+	mov	r1, r9				@ cpu
+	bl	vlock_trylock			@ implies DMB
+
+	cmp	r0, #0				@ failed to get the lock?
+	bne	mcpm_setup_wait		@ wait for cluster setup if so
+
 	ldrb	r0, [r8, #MCPM_SYNC_CLUSTER_CLUSTER]
 	cmp	r0, #CLUSTER_UP			@ cluster already up?
 	bne	mcpm_setup			@ if not, set up the cluster
 
-	@ Otherwise, skip setup:
+	@ Otherwise, release the first man lock and skip setup:
+	mov	r0, r11
+	bl	vlock_unlock
 	b	mcpm_setup_complete
 
 mcpm_setup:
@@ -142,6 +154,19 @@ mcpm_setup_leave:
 	dsb
 	sev
 
+	mov	r0, r11
+	bl	vlock_unlock	@ implies DMB
+	b	mcpm_setup_complete
+
+	@ In the contended case, non-first men wait here for cluster setup
+	@ to complete:
+mcpm_setup_wait:
+	ldrb	r0, [r8, #MCPM_SYNC_CLUSTER_CLUSTER]
+	cmp	r0, #CLUSTER_UP
+	wfene
+	bne	mcpm_setup_wait
+	dmb
+
 mcpm_setup_complete:
 	@ If a platform-specific CPU setup hook is needed, it is
 	@ called from here.
@@ -173,11 +198,17 @@ mcpm_entry_gated:
 3:	.word	mcpm_entry_vectors - .
 	.word	mcpm_power_up_setup_phys - 3b
 	.word	mcpm_sync - 3b
+	.word	first_man_locks - 3b
 
 ENDPROC(mcpm_entry_point)
 
 	.bss
-	.align	5
+
+	.align	__CACHE_WRITEBACK_ORDER
+	.type	first_man_locks, #object
+first_man_locks:
+	.space	VLOCK_SIZE * MAX_NR_CLUSTERS
+	.align	__CACHE_WRITEBACK_ORDER
 
 	.type	mcpm_entry_vectors, #object
 ENTRY(mcpm_entry_vectors)
-- 
1.8.1.2

  parent reply	other threads:[~2013-01-29  7:51 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-01-29  7:50 [PATCH v3 00/15] multi-cluster power management Nicolas Pitre
2013-01-29  7:50 ` [PATCH v3 01/15] ARM: multi-cluster PM: secondary kernel entry code Nicolas Pitre
2013-01-31 15:45   ` Santosh Shilimkar
2013-01-29  7:50 ` [PATCH v3 02/15] ARM: mcpm: introduce the CPU/cluster power API Nicolas Pitre
2013-01-31 15:55   ` Santosh Shilimkar
2013-01-29  7:50 ` [PATCH v3 03/15] ARM: mcpm: introduce helpers for platform coherency exit/setup Nicolas Pitre
2013-01-31 16:08   ` Santosh Shilimkar
2013-01-31 17:16     ` Nicolas Pitre
2013-02-01  5:10       ` Santosh Shilimkar
2013-02-01 17:26         ` Nicolas Pitre
2013-01-29  7:50 ` [PATCH v3 04/15] ARM: mcpm: Add baremetal voting mutexes Nicolas Pitre
2013-02-01  5:29   ` Santosh Shilimkar
2013-01-29  7:51 ` Nicolas Pitre [this message]
2013-02-01  5:34   ` [PATCH v3 05/15] ARM: mcpm_head.S: vlock-based first man election Santosh Shilimkar
2013-01-29  7:51 ` [PATCH v3 06/15] ARM: mcpm: generic SMP secondary bringup and hotplug support Nicolas Pitre
2013-01-29 20:38   ` Rob Herring
2013-02-01  5:38   ` Santosh Shilimkar
2013-01-29  7:51 ` [PATCH v3 07/15] ARM: vexpress: Select the correct SMP operations at run-time Nicolas Pitre
2013-01-29 15:43   ` Jon Medhurst (Tixy)
2013-01-29 19:26     ` Nicolas Pitre
2013-02-01  5:41   ` Santosh Shilimkar
2013-02-01 17:28     ` Nicolas Pitre
2013-01-29  7:51 ` [PATCH v3 08/15] ARM: introduce common set_auxcr/get_auxcr functions Nicolas Pitre
2013-02-01  5:44   ` Santosh Shilimkar
2013-01-29  7:51 ` [PATCH v3 09/15] ARM: vexpress: introduce DCSCB support Nicolas Pitre
2013-02-01  5:50   ` Santosh Shilimkar
2013-01-29  7:51 ` [PATCH v3 10/15] ARM: vexpress/dcscb: add CPU use counts to the power up/down API implementation Nicolas Pitre
2013-02-01  5:53   ` Santosh Shilimkar
2013-01-29  7:51 ` [PATCH v3 11/15] ARM: vexpress/dcscb: do not hardcode number of CPUs per cluster Nicolas Pitre
2013-02-01  5:57   ` Santosh Shilimkar
2013-02-01 17:24     ` Nicolas Pitre
2013-02-02  6:54       ` Santosh Shilimkar
2013-01-29  7:51 ` [PATCH v3 12/15] drivers/bus: add ARM CCI support Nicolas Pitre
2013-02-01  6:01   ` Santosh Shilimkar
2013-01-29  7:51 ` [PATCH v3 13/15] ARM: CCI: ensure powerdown-time data is flushed from cache Nicolas Pitre
2013-02-01  6:13   ` Santosh Shilimkar
2013-02-02 22:23     ` Nicolas Pitre
2013-02-03 10:07       ` Santosh Shilimkar
2013-02-03 18:29         ` Nicolas Pitre
2013-02-04  5:25           ` Santosh Shilimkar
2013-01-29  7:51 ` [PATCH v3 14/15] ARM: vexpress/dcscb: handle platform coherency exit/setup and CCI Nicolas Pitre
2013-01-29 10:46   ` Lorenzo Pieralisi
2013-01-29 18:42     ` Nicolas Pitre
2013-01-30 17:27       ` Lorenzo Pieralisi
2013-02-01  6:15   ` Santosh Shilimkar
2013-01-29  7:51 ` [PATCH v3 15/15] ARM: vexpress/dcscb: probe via device tree Nicolas Pitre
2013-01-29 21:01   ` Rob Herring
2013-01-29 21:41     ` Nicolas Pitre
2013-01-30 12:22       ` Achin Gupta
2013-01-30 17:43         ` Nicolas Pitre
2013-01-31 10:54           ` Dave Martin
2013-02-04  4:39             ` Nicolas Pitre
2013-02-04 14:24 ` [PATCH v3 00/15] multi-cluster power management Will Deacon
2013-02-04 20:59   ` Nicolas Pitre

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1359445870-18925-6-git-send-email-nicolas.pitre@linaro.org \
    --to=nicolas.pitre@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).