From: thomas.petazzoni@free-electrons.com (Thomas Petazzoni)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 01/18] of/pci: Provide support for parsing PCI DT ranges property
Date: Fri, 8 Mar 2013 16:19:03 +0100 [thread overview]
Message-ID: <1362755960-30791-2-git-send-email-thomas.petazzoni@free-electrons.com> (raw)
In-Reply-To: <1362755960-30791-1-git-send-email-thomas.petazzoni@free-electrons.com>
From: Andrew Murray <andrew.murray@arm.com>
DT bindings for PCI host bridges often use the ranges property to describe
memory and IO ranges - this binding tends to be the same across architectures
yet several parsing implementations exist, e.g. arch/mips/pci/pci.c,
arch/powerpc/kernel/pci-common.c, arch/sparc/kernel/pci.c and
arch/microblaze/pci/pci-common.c (clone of PPC). Some of these duplicate
functionality provided by drivers/of/address.c.
This patch provides a common iterator-based parser for the ranges property, it
is hoped this will reduce DT representation differences between architectures
and that architectures will migrate in part to this new parser.
It is also hoped (and the motativation for the patch) that this patch will
reduce duplication of code when writing host bridge drivers that are supported
by multiple architectures.
This patch provides struct resources from a device tree node, e.g.:
u32 *last = NULL;
struct resource res;
while ((last = of_pci_process_ranges(np, res, last))) {
//do something with res
}
Platforms with quirks can then do what they like with the resource or migrate
common quirk handling to the parser. In an ideal world drivers can just request
the obtained resources and pass them on (e.g. pci_add_resource_offset).
Signed-off-by: Andrew Murray <Andrew.Murray@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
---
drivers/of/address.c | 63 ++++++++++++++++++++++++++++++++++++++++++++
include/linux/of_address.h | 9 +++++++
2 files changed, 72 insertions(+)
diff --git a/drivers/of/address.c b/drivers/of/address.c
index 04da786..f607008 100644
--- a/drivers/of/address.c
+++ b/drivers/of/address.c
@@ -13,6 +13,7 @@
#define OF_CHECK_COUNTS(na, ns) (OF_CHECK_ADDR_COUNT(na) && (ns) > 0)
static struct of_bus *of_match_bus(struct device_node *np);
+static struct of_bus *of_find_bus(const char *name);
static int __of_address_to_resource(struct device_node *dev,
const __be32 *addrp, u64 size, unsigned int flags,
const char *name, struct resource *r);
@@ -227,6 +228,57 @@ int of_pci_address_to_resource(struct device_node *dev, int bar,
return __of_address_to_resource(dev, addrp, size, flags, NULL, r);
}
EXPORT_SYMBOL_GPL(of_pci_address_to_resource);
+
+const __be32 *of_pci_process_ranges(struct device_node *node,
+ struct resource *res, const __be32 *from)
+{
+ const __be32 *start, *end;
+ int na, ns, np, pna;
+ int rlen;
+ struct of_bus *bus;
+
+ WARN_ON(!res);
+
+ bus = of_find_bus("pci");
+ bus->count_cells(node, &na, &ns);
+ if (!OF_CHECK_COUNTS(na, ns)) {
+ pr_err("Bad cell count for %s\n", node->full_name);
+ return NULL;
+ }
+
+ pna = of_n_addr_cells(node);
+ np = pna + na + ns;
+
+ start = of_get_property(node, "ranges", &rlen);
+ if (start == NULL)
+ return NULL;
+
+ end = start + rlen / sizeof(__be32);
+
+ if (!from)
+ from = start;
+
+ while (from + np <= end) {
+ u64 cpu_addr, size;
+
+ cpu_addr = of_translate_address(node, from + na);
+ size = of_read_number(from + na + pna, ns);
+ res->flags = bus->get_flags(from);
+ from += np;
+
+ if (cpu_addr == OF_BAD_ADDR || size == 0)
+ continue;
+
+ res->name = node->full_name;
+ res->start = cpu_addr;
+ res->end = res->start + size - 1;
+ res->parent = res->child = res->sibling = NULL;
+ return from;
+ }
+
+ return NULL;
+}
+EXPORT_SYMBOL_GPL(of_pci_process_ranges);
#endif /* CONFIG_PCI */
/*
@@ -337,6 +389,17 @@ static struct of_bus *of_match_bus(struct device_node *np)
return NULL;
}
+static struct of_bus *of_find_bus(const char *name)
+{
+ unsigned int i;
+
+ for (i = 0; i < ARRAY_SIZE(of_busses); i++)
+ if (strcmp(name, of_busses[i].name) == 0)
+ return &of_busses[i];
+
+ return NULL;
+}
+
static int of_translate_one(struct device_node *parent, struct of_bus *bus,
struct of_bus *pbus, __be32 *addr,
int na, int ns, int pna, const char *rprop)
diff --git a/include/linux/of_address.h b/include/linux/of_address.h
index 0506eb5..751e889 100644
--- a/include/linux/of_address.h
+++ b/include/linux/of_address.h
@@ -27,6 +27,8 @@ static inline unsigned long pci_address_to_pio(phys_addr_t addr) { return -1; }
#define pci_address_to_pio pci_address_to_pio
#endif
+const __be32 *of_pci_process_ranges(struct device_node *node,
+ struct resource *res, const __be32 *from);
#else /* CONFIG_OF_ADDRESS */
#ifndef of_address_to_resource
static inline int of_address_to_resource(struct device_node *dev, int index,
@@ -53,6 +55,13 @@ static inline const __be32 *of_get_address(struct device_node *dev, int index,
{
return NULL;
}
+
+static inline const __be32 *of_pci_process_ranges(struct device_node *node,
+ struct resource *res,
+ const __be32 *from)
+{
+ return NULL;
+}
#endif /* CONFIG_OF_ADDRESS */
--
1.7.9.5
next prev parent reply other threads:[~2013-03-08 15:19 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-08 15:19 [PATCH v4 00/18] PCIe support for the Armada 370 and Armada XP SoCs Thomas Petazzoni
2013-03-08 15:19 ` Thomas Petazzoni [this message]
2013-03-08 15:19 ` [PATCH v4 02/18] of/pci: Add of_pci_get_devfn() function Thomas Petazzoni
2013-03-08 15:19 ` [PATCH v4 03/18] of/pci: Add of_pci_get_bus() function Thomas Petazzoni
2013-03-08 15:19 ` [PATCH v4 04/18] of/pci: Add of_pci_parse_bus_range() function Thomas Petazzoni
2013-03-08 15:19 ` [PATCH v4 05/18] pci: infrastructure to add drivers in drivers/pci/host Thomas Petazzoni
2013-03-08 15:19 ` [PATCH v4 06/18] arm: pci: add a align_resource hook Thomas Petazzoni
2013-03-20 20:02 ` Thomas Petazzoni
2013-03-08 15:19 ` [PATCH v4 07/18] clk: mvebu: create parent-child relation for PCIe clocks on Armada 370 Thomas Petazzoni
2013-03-08 15:19 ` [PATCH v4 08/18] clk: mvebu: add more PCIe clocks for Armada XP Thomas Petazzoni
2013-03-08 15:19 ` [PATCH v4 09/18] pci: PCIe driver for Marvell Armada 370/XP systems Thomas Petazzoni
2013-03-08 15:19 ` [PATCH v4 10/18] arm: mvebu: PCIe support is now available on mvebu Thomas Petazzoni
2013-03-08 15:19 ` [PATCH v4 11/18] arm: mvebu: add PCIe Device Tree informations for Armada 370 Thomas Petazzoni
2013-03-08 15:19 ` [PATCH v4 12/18] arm: mvebu: add PCIe Device Tree informations for Armada XP Thomas Petazzoni
2013-03-08 15:19 ` [PATCH v4 13/18] arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4 Thomas Petazzoni
2013-03-08 15:19 ` [PATCH v4 14/18] arm: mvebu: PCIe Device Tree informations for Armada XP DB Thomas Petazzoni
2013-03-08 15:19 ` [PATCH v4 15/18] arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox Thomas Petazzoni
2013-03-08 15:19 ` [PATCH v4 16/18] arm: mvebu: PCIe Device Tree informations for Armada 370 DB Thomas Petazzoni
2013-03-08 15:19 ` [PATCH v4 17/18] arm: mvebu: PCIe Device Tree informations for Armada XP GP Thomas Petazzoni
2013-03-08 15:19 ` [PATCH v4 18/18] arm: mvebu: update defconfig with PCI and USB support Thomas Petazzoni
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