From mboxrd@z Thu Jan 1 00:00:00 1970 From: pawel.moll@arm.com (Pawel Moll) Date: Wed, 13 Mar 2013 11:41:24 +0000 Subject: [PATCH v3 03/11] clocksource: sp804: add device tree support In-Reply-To: References: <1363151142-32162-1-git-send-email-haojian.zhuang@linaro.org> <1363151142-32162-4-git-send-email-haojian.zhuang@linaro.org> <1363172730.3100.17.camel@hornet> Message-ID: <1363174884.3100.34.camel@hornet> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Wed, 2013-03-13 at 11:37 +0000, Haojian Zhuang wrote: > On 13 March 2013 19:05, Pawel Moll wrote: > > On Wed, 2013-03-13 at 05:05 +0000, Haojian Zhuang wrote: > >> +++ b/Documentation/devicetree/bindings/timer/arm,sp804.txt > >> @@ -0,0 +1,27 @@ > >> +ARM sp804 Dual Timers > >> +--------------------------------------- > >> + > >> +Required properties: > >> +- compatible: Should be "arm,sp804" & "arm,primecell" > >> +- interrupts: Should contain the list of Dual Timer interrupts > >> + interrupts = <0 0 4>, <0 1 4>; > > > > SP804 has three interrupt outputs: TIMINT1 (interrupt generated by the > > first timer), TIMINT2 (the second timer) and TIMINTC (combined - logical > > sum of the two former ones). You may want to describe this somehow to > > make the choice possible later (eg. VE has the combined interrupt wired > > while - if I understand what Rob is saying correctly - Highbank uses > > only the TIMINT1). > > > I prefer to ignore the TIMINTC. It seems that nobody is using this interrupt. VE is the nobody then ;-) As I mentioned above - both VE motherboard SP804s have the TIMINTC wired up and TIMINT1/TIMINT2 unused. Pawe?