[PATCH v4 1/7] ARM: shmobile: Define DT bindings for timer devices

[PATCH v4 1/7] ARM: shmobile: Define DT bindings for timer devices

[Bastian Hecht]

The SH mobile series currently features 3 timer devices in the kernel:
Compare Match Timer (CMT), Timer Unit (TMU) and MTU2. These devices
share register layout characteristics amongst each that enable us to
define common DT bindings for them.

Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
---
v4: same. only patch 2 and 3 changed

 .../devicetree/bindings/timer/renesas,timer.txt    |   45 ++++++++++++++++++++
 1 file changed, 45 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/renesas,timer.txt

diff --git a/Documentation/devicetree/bindings/timer/renesas,timer.txt b/Documentation/devicetree/bindings/timer/renesas,timer.txt
new file mode 100644
index 0000000..2c001bf
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/renesas,timer.txt
@@ -0,0 +1,45 @@
+* Renesas SH Mobile Timer
+
+Bindings for several timer devices from Renesas including CMT, TMU and MTU2.
+
+Required properties:
+- compatible : Should be "renesas,{device}-timer",
+  whereas device is "cmt", "tmu" or "mtu2".
+- reg : Address and length of the register set for the device
+- interrupts : Timer interrupt
+- renesas,device-id : The ID of the timer device
+- renesas,channel-id : The channel ID of the timer device
+- renesas,source-quality : The viability to use this device as a free
+  running clock. From 0 (do not use) to 10 (best possible clock).
+- renesas,event-quality : The viability to use this device as an event
+  generator. From 0 (do not use) to 10 (best possible clock).
+
+The properties renesas,{source,event}-quality reflect the situation that the
+usability of the timer devices depend on the location within their SoCs. E.g.
+the power domain affinty affects power management, some mux-ed lines might be
+preferred to be assigned to other functions and other constraints.
+
+Example for CMT1 channel 0 on the R8A7740 SoC:
+
+	timer at e6138010 {
+		compatible = "renesas,cmt-timer";
+		interrupt-parent = <&intca>;
+		reg = <0xe6138010 0xc>;
+		interrupts = <0x0b00>;
+		renesas,device-id = <1>;
+		renesas,channel-id = <0>;
+		renesas,source-quality = <3>;
+		renesas,event-quality = <3>;
+	};
+
+Example for TMU0 channel 1 on the SH7372 SoC:
+	timer at fff60014 {
+		compatible = "renesas,tmu-timer";
+		interrupt-parent = <&intcs>;
+		reg = <0xfff60014 0xc>;
+		interrupts = <0xea0>;
+		renesas,device-id = <0>;
+		renesas,channel-id = <1>;
+		renesas,source-quality = <4>;
+		renesas,event-quality = <0>;
+	};
-- 
1.7.9.5

[PATCH v4 2/7] clocksource: sh_cmt: Add OF support

[Bastian Hecht]

We add the capabilty to probe SH CMT timer devices using Device Tree
setup.

Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
---
v4:
Moved the assignments of p->channel_offset and p->timer_bit so that
they are ready as soon as setup_irq() is called

 drivers/clocksource/sh_cmt.c |  108 +++++++++++++++++++++++++++++++++++++-----
 1 file changed, 95 insertions(+), 13 deletions(-)

diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
index 08d0c41..66a12e9 100644
--- a/drivers/clocksource/sh_cmt.c
+++ b/drivers/clocksource/sh_cmt.c
@@ -34,10 +34,13 @@
 #include <linux/module.h>
 #include <linux/pm_domain.h>
 #include <linux/pm_runtime.h>
+#include <linux/of.h>
 
 struct sh_cmt_priv {
 	void __iomem *mapbase;
 	struct clk *clk;
+	long channel_offset;
+	int timer_bit;
 	unsigned long width; /* 16 or 32 bit version of hardware block */
 	unsigned long overflow_bit;
 	unsigned long clear_bits;
@@ -109,9 +112,7 @@ static void sh_cmt_write32(void __iomem *base, unsigned long offs,
 
 static inline unsigned long sh_cmt_read_cmstr(struct sh_cmt_priv *p)
 {
-	struct sh_timer_config *cfg = p->pdev->dev.platform_data;
-
-	return p->read_control(p->mapbase - cfg->channel_offset, 0);
+	return p->read_control(p->mapbase - p->channel_offset, 0);
 }
 
 static inline unsigned long sh_cmt_read_cmcsr(struct sh_cmt_priv *p)
@@ -127,9 +128,7 @@ static inline unsigned long sh_cmt_read_cmcnt(struct sh_cmt_priv *p)
 static inline void sh_cmt_write_cmstr(struct sh_cmt_priv *p,
 				      unsigned long value)
 {
-	struct sh_timer_config *cfg = p->pdev->dev.platform_data;
-
-	p->write_control(p->mapbase - cfg->channel_offset, 0, value);
+	p->write_control(p->mapbase - p->channel_offset, 0, value);
 }
 
 static inline void sh_cmt_write_cmcsr(struct sh_cmt_priv *p,
@@ -176,7 +175,6 @@ static DEFINE_RAW_SPINLOCK(sh_cmt_lock);
 
 static void sh_cmt_start_stop_ch(struct sh_cmt_priv *p, int start)
 {
-	struct sh_timer_config *cfg = p->pdev->dev.platform_data;
 	unsigned long flags, value;
 
 	/* start stop register shared by multiple timer channels */
@@ -184,9 +182,9 @@ static void sh_cmt_start_stop_ch(struct sh_cmt_priv *p, int start)
 	value = sh_cmt_read_cmstr(p);
 
 	if (start)
-		value |= 1 << cfg->timer_bit;
+		value |= 1 << p->timer_bit;
 	else
-		value &= ~(1 << cfg->timer_bit);
+		value &= ~(1 << p->timer_bit);
 
 	sh_cmt_write_cmstr(p, value);
 	raw_spin_unlock_irqrestore(&sh_cmt_lock, flags);
@@ -673,15 +671,93 @@ static int sh_cmt_register(struct sh_cmt_priv *p, char *name,
 	return 0;
 }
 
-static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
+static const struct of_device_id of_sh_cmt_match[] = {
+	{ .compatible = "renesas,cmt-timer" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, of_sh_cmt_match);
+
+static const int sh_cmt_offset_multiplier[] = { 0x60, 0x10, 0x40, 0x40, 0x40 };
+#define CMT_MAX_CHANNELS	6
+
+static struct sh_timer_config *sh_cmt_parse_dt(struct device *dev)
+{
+	struct sh_timer_config *cfg;
+	struct device_node *np = dev->of_node;
+	u32 timer_id, channel_id, rating;
+
+	if (!IS_ENABLED(CONFIG_OF) || !np)
+		return NULL;
+
+	cfg = devm_kzalloc(dev, sizeof(struct sh_timer_config), GFP_KERNEL);
+	if (!cfg) {
+		dev_err(dev, "failed to allocate DT config data\n");
+		return NULL;
+	}
+
+	if (of_property_read_u32(np, "renesas,device-id", &timer_id)) {
+		dev_err(dev, "device id missing\n");
+		return NULL;
+	}
+	if (timer_id >= ARRAY_SIZE(sh_cmt_offset_multiplier)) {
+		dev_err(dev, "invalid device id\n");
+		return NULL;
+	}
+
+	if (of_property_read_u32(np, "renesas,channel-id", &channel_id)) {
+		dev_err(dev, "channel id missing\n");
+		return NULL;
+	}
+	if (channel_id >= CMT_MAX_CHANNELS) {
+		dev_err(dev, "invalid channel id\n");
+		return NULL;
+	}
+
+	cfg->channel_offset = sh_cmt_offset_multiplier[timer_id] *
+							(channel_id + 1);
+	cfg->timer_bit = channel_id;
+
+	/*
+	 * We convert the {source,event}-quality DT properties to linux specific
+	 * clock{source,event}_ratings.
+	 */
+	if (!of_property_read_u32(np, "renesas,source-quality", &rating)) {
+		if (rating > 10) {
+			dev_err(dev, "invalid source-quality\n");
+			return NULL;
+		}
+		if (rating)
+			cfg->clocksource_rating = rating * 50 - 1;
+	}
+
+	if (!of_property_read_u32(np, "renesas,event-quality", &rating)) {
+		if (rating > 10) {
+			dev_err(dev, "invalid event-quality\n");
+			return NULL;
+		}
+		if (rating)
+			cfg->clockevent_rating = rating * 50 - 1;
+	}
+
+	if (!cfg->clocksource_rating && !cfg->clockevent_rating) {
+		dev_err(dev, "source- and event-quality 0, timer is unused\n");
+		return NULL;
+	}
+
+	return cfg;
+}
+
+static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev,
+						struct sh_timer_config *cfg)
 {
-	struct sh_timer_config *cfg = pdev->dev.platform_data;
 	struct resource *res;
 	int irq, ret;
 	ret = -ENXIO;
 
 	memset(p, 0, sizeof(*p));
 	p->pdev = pdev;
+	p->channel_offset = cfg->channel_offset;
+	p->timer_bit = cfg->timer_bit;
 
 	if (!cfg) {
 		dev_err(&p->pdev->dev, "missing platform data\n");
@@ -777,7 +853,7 @@ err0:
 static int sh_cmt_probe(struct platform_device *pdev)
 {
 	struct sh_cmt_priv *p = platform_get_drvdata(pdev);
-	struct sh_timer_config *cfg = pdev->dev.platform_data;
+	struct sh_timer_config *cfg;
 	int ret;
 
 	if (!is_early_platform_device(pdev)) {
@@ -785,6 +861,11 @@ static int sh_cmt_probe(struct platform_device *pdev)
 		pm_runtime_enable(&pdev->dev);
 	}
 
+	if (pdev->dev.of_node)
+		cfg = sh_cmt_parse_dt(&pdev->dev);
+	else
+		cfg = pdev->dev.platform_data;
+
 	if (p) {
 		dev_info(&pdev->dev, "kept as earlytimer\n");
 		goto out;
@@ -796,7 +877,7 @@ static int sh_cmt_probe(struct platform_device *pdev)
 		return -ENOMEM;
 	}
 
-	ret = sh_cmt_setup(p, pdev);
+	ret = sh_cmt_setup(p, pdev, cfg);
 	if (ret) {
 		kfree(p);
 		pm_runtime_idle(&pdev->dev);
@@ -824,6 +905,7 @@ static struct platform_driver sh_cmt_device_driver = {
 	.remove		= sh_cmt_remove,
 	.driver		= {
 		.name	= "sh_cmt",
+		.of_match_table = of_match_ptr(of_sh_cmt_match),
 	}
 };
 
-- 
1.7.9.5

[PATCH v4 3/7] clocksource: sh_tmu: Add OF support

[Bastian Hecht]

We add the capabilty to probe SH CMT timer devices using Device Tree
setup.

Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
---
v4:
Moved the assignments of p->channel_offset and p->timer_bit so that
they are ready as soon as setup_irq() is called.

 drivers/clocksource/sh_tmu.c |   96 +++++++++++++++++++++++++++++++++++++-----
 1 file changed, 85 insertions(+), 11 deletions(-)

diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
index 78b8dae..17bb607 100644
--- a/drivers/clocksource/sh_tmu.c
+++ b/drivers/clocksource/sh_tmu.c
@@ -34,10 +34,13 @@
 #include <linux/module.h>
 #include <linux/pm_domain.h>
 #include <linux/pm_runtime.h>
+#include <linux/of.h>
 
 struct sh_tmu_priv {
 	void __iomem *mapbase;
 	struct clk *clk;
+	long channel_offset;
+	int timer_bit;
 	struct irqaction irqaction;
 	struct platform_device *pdev;
 	unsigned long rate;
@@ -57,12 +60,11 @@ static DEFINE_RAW_SPINLOCK(sh_tmu_lock);
 
 static inline unsigned long sh_tmu_read(struct sh_tmu_priv *p, int reg_nr)
 {
-	struct sh_timer_config *cfg = p->pdev->dev.platform_data;
 	void __iomem *base = p->mapbase;
 	unsigned long offs;
 
 	if (reg_nr == TSTR)
-		return ioread8(base - cfg->channel_offset);
+		return ioread8(base - p->channel_offset);
 
 	offs = reg_nr << 2;
 
@@ -75,12 +77,11 @@ static inline unsigned long sh_tmu_read(struct sh_tmu_priv *p, int reg_nr)
 static inline void sh_tmu_write(struct sh_tmu_priv *p, int reg_nr,
 				unsigned long value)
 {
-	struct sh_timer_config *cfg = p->pdev->dev.platform_data;
 	void __iomem *base = p->mapbase;
 	unsigned long offs;
 
 	if (reg_nr == TSTR) {
-		iowrite8(value, base - cfg->channel_offset);
+		iowrite8(value, base - p->channel_offset);
 		return;
 	}
 
@@ -94,7 +95,6 @@ static inline void sh_tmu_write(struct sh_tmu_priv *p, int reg_nr,
 
 static void sh_tmu_start_stop_ch(struct sh_tmu_priv *p, int start)
 {
-	struct sh_timer_config *cfg = p->pdev->dev.platform_data;
 	unsigned long flags, value;
 
 	/* start stop register shared by multiple timer channels */
@@ -102,9 +102,9 @@ static void sh_tmu_start_stop_ch(struct sh_tmu_priv *p, int start)
 	value = sh_tmu_read(p, TSTR);
 
 	if (start)
-		value |= 1 << cfg->timer_bit;
+		value |= 1 << p->timer_bit;
 	else
-		value &= ~(1 << cfg->timer_bit);
+		value &= ~(1 << p->timer_bit);
 
 	sh_tmu_write(p, TSTR, value);
 	raw_spin_unlock_irqrestore(&sh_tmu_lock, flags);
@@ -421,15 +421,83 @@ static int sh_tmu_register(struct sh_tmu_priv *p, char *name,
 	return 0;
 }
 
-static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev)
+static const struct of_device_id of_sh_tmu_match[] = {
+	{ .compatible = "renesas,tmu-timer" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, of_sh_tmu_match);
+
+#define TMU_OFFSET_MULTIPLIER	0xc
+#define TMU_MAX_CHANNELS	3
+
+static struct sh_timer_config *sh_tmu_parse_dt(struct device *dev)
+{
+	struct sh_timer_config *cfg;
+	struct device_node *np = dev->of_node;
+	u32 channel_id, rating;
+
+	if (!IS_ENABLED(CONFIG_OF) || !np)
+		return NULL;
+
+	cfg = devm_kzalloc(dev, sizeof(struct sh_timer_config), GFP_KERNEL);
+	if (!cfg) {
+		dev_err(dev, "failed to allocate DT config data\n");
+		return NULL;
+	}
+
+	if (of_property_read_u32(np, "renesas,channel-id", &channel_id)) {
+		dev_err(dev, "channel id missing\n");
+		return NULL;
+	}
+	if (channel_id >= TMU_MAX_CHANNELS) {
+		dev_err(dev, "invalid channel id\n");
+		return NULL;
+	}
+
+	cfg->channel_offset = channel_id * TMU_OFFSET_MULTIPLIER + 4;
+	cfg->timer_bit = channel_id;
+
+	/*
+	 * We convert the {source,event}-quality DT properties to linux specific
+	 * clock{source,event}_ratings.
+	 */
+	if (!of_property_read_u32(np, "renesas,source-quality", &rating)) {
+		if (rating > 10) {
+			dev_err(dev, "invalid source-quality\n");
+			return NULL;
+		}
+		if (rating)
+			cfg->clocksource_rating = rating * 50 - 1;
+	}
+
+	if (!of_property_read_u32(np, "renesas,event-quality", &rating)) {
+		if (rating > 10) {
+			dev_err(dev, "invalid event-quality\n");
+			return NULL;
+		}
+		if (rating)
+			cfg->clockevent_rating = rating * 50 - 1;
+	}
+
+	if (!cfg->clocksource_rating && !cfg->clockevent_rating) {
+		dev_err(dev, "source- and event-quality 0, timer is unused\n");
+		return NULL;
+	}
+
+	return cfg;
+}
+
+static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev,
+						struct sh_timer_config *cfg)
 {
-	struct sh_timer_config *cfg = pdev->dev.platform_data;
 	struct resource *res;
 	int irq, ret;
 	ret = -ENXIO;
 
 	memset(p, 0, sizeof(*p));
 	p->pdev = pdev;
+	p->channel_offset = cfg->channel_offset;
+	p->timer_bit = cfg->timer_bit;
 
 	if (!cfg) {
 		dev_err(&p->pdev->dev, "missing platform data\n");
@@ -487,7 +555,7 @@ static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev)
 static int sh_tmu_probe(struct platform_device *pdev)
 {
 	struct sh_tmu_priv *p = platform_get_drvdata(pdev);
-	struct sh_timer_config *cfg = pdev->dev.platform_data;
+	struct sh_timer_config *cfg;
 	int ret;
 
 	if (!is_early_platform_device(pdev)) {
@@ -495,6 +563,11 @@ static int sh_tmu_probe(struct platform_device *pdev)
 		pm_runtime_enable(&pdev->dev);
 	}
 
+	if (pdev->dev.of_node)
+		cfg = sh_tmu_parse_dt(&pdev->dev);
+	else
+		cfg = pdev->dev.platform_data;
+
 	if (p) {
 		dev_info(&pdev->dev, "kept as earlytimer\n");
 		goto out;
@@ -506,7 +579,7 @@ static int sh_tmu_probe(struct platform_device *pdev)
 		return -ENOMEM;
 	}
 
-	ret = sh_tmu_setup(p, pdev);
+	ret = sh_tmu_setup(p, pdev, cfg);
 	if (ret) {
 		kfree(p);
 		platform_set_drvdata(pdev, NULL);
@@ -535,6 +608,7 @@ static struct platform_driver sh_tmu_device_driver = {
 	.remove		= sh_tmu_remove,
 	.driver		= {
 		.name	= "sh_tmu",
+		.of_match_table = of_sh_tmu_match,
 	}
 };
 
-- 
1.7.9.5

[PATCH v4 4/7] ARM: shmobile: sh73a0: Add timer DT names to clock list

[Bastian Hecht]

This adds temporarily the alternative device names to the clock list
that are used when booting via Device Tree setup.

Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
---
v4: same. only patches 2 and 3 are changed.

 arch/arm/mach-shmobile/clock-sh73a0.c |    3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 784fbaa..5d98322 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -535,7 +535,9 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU0 */
 	CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2-RX0 */
 	CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */
+	CLKDEV_DEV_ID("fff60008.timer", &mstp_clks[MSTP125]), /* TMU00 */
 	CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
+	CLKDEV_DEV_ID("fff60014.timer", &mstp_clks[MSTP125]), /* TMU01 */
 	CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
 	CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
 	CLKDEV_DEV_ID("e6820000.i2c", &mstp_clks[MSTP116]), /* I2C0 */
@@ -552,6 +554,7 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
 	CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */
 	CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
+	CLKDEV_DEV_ID("e6138010.timer", &mstp_clks[MSTP329]), /* CMT10 */
 	CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI */
 	CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
 	CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */
-- 
1.7.9.5

[PATCH v4 5/7] ARM: mach-shmobile: sh73a0: Setup the timer CMT10 using DT

[Bastian Hecht]

We can now use the Device Tree for bringing up our timer device CMT10 on
the SoC sh73a0.

Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
---
v4: same. only patch 2 and 3 changed

 arch/arm/boot/dts/sh73a0.dtsi         |   11 +++++++++++
 arch/arm/mach-shmobile/setup-sh73a0.c |   32 --------------------------------
 2 files changed, 11 insertions(+), 32 deletions(-)

diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index ec40bf7..67b5089 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -222,4 +222,15 @@
 		cap-sd-highspeed;
 		status = "disabled";
 	};
+
+	timer at e6138010 {
+		compatible = "renesas,cmt-timer";
+		interrupt-parent = <&gic>;
+		reg = <0xe6138010 0xc>;
+		interrupts = <0 65 0x4>;
+		renesas,device-id = <1>;
+		renesas,channel-id = <0>;
+		renesas,source-quality = <3>;
+		renesas,event-quality = <3>;
+	};
 };
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index d10ded0..024b7a6 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -235,37 +235,6 @@ static struct platform_device scif8_device = {
 	},
 };
 
-static struct sh_timer_config cmt10_platform_data = {
-	.name = "CMT10",
-	.channel_offset = 0x10,
-	.timer_bit = 0,
-	.clockevent_rating = 125,
-	.clocksource_rating = 125,
-};
-
-static struct resource cmt10_resources[] = {
-	[0] = {
-		.name	= "CMT10",
-		.start	= 0xe6138010,
-		.end	= 0xe613801b,
-		.flags	= IORESOURCE_MEM,
-	},
-	[1] = {
-		.start	= gic_spi(65),
-		.flags	= IORESOURCE_IRQ,
-	},
-};
-
-static struct platform_device cmt10_device = {
-	.name		= "sh_cmt",
-	.id		= 10,
-	.dev = {
-		.platform_data	= &cmt10_platform_data,
-	},
-	.resource	= cmt10_resources,
-	.num_resources	= ARRAY_SIZE(cmt10_resources),
-};
-
 /* TMU */
 static struct sh_timer_config tmu00_platform_data = {
 	.name = "TMU00",
@@ -930,7 +899,6 @@ static struct platform_device *sh73a0_devices_dt[] __initdata = {
 	&scif6_device,
 	&scif7_device,
 	&scif8_device,
-	&cmt10_device,
 };
 
 static struct platform_device *sh73a0_early_devices[] __initdata = {
-- 
1.7.9.5

[PATCH v4 6/7] ARM: shmobile: r8a7740: Add DT name to clock list for CMT10

[Bastian Hecht]

This adds temporarily the alternative device name to the clock list
that is used when booting via Device Tree setup.

Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
---
v4: same. only patch 2 and 3 changed

 arch/arm/mach-shmobile/clock-r8a7740.c |    1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
index 5bd8da0..8fc396a 100644
--- a/arch/arm/mach-shmobile/clock-r8a7740.c
+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -582,6 +582,7 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("e6cc0000.sci",		&mstp_clks[MSTP230]),
 
 	CLKDEV_DEV_ID("sh_cmt.10",		&mstp_clks[MSTP329]),
+	CLKDEV_DEV_ID("e6138010.timer",		&mstp_clks[MSTP329]),
 	CLKDEV_DEV_ID("sh_fsi2",		&mstp_clks[MSTP328]),
 	CLKDEV_DEV_ID("i2c-sh_mobile.1",	&mstp_clks[MSTP323]),
 	CLKDEV_DEV_ID("renesas_usbhs",		&mstp_clks[MSTP320]),
-- 
1.7.9.5

[PATCH v4 7/7] ARM: mach-shmobile: r8a7740: Setup the timer CMT10 using DT

[Bastian Hecht]

We can now use the Device Tree for bringing up our timer device CMT10 on
the SoC r8a7740.

Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
---
v4: same. only patch 2 and 3 changed

 arch/arm/mach-shmobile/setup-r8a7740.c |   33 --------------------------------
 1 file changed, 33 deletions(-)

diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
index c2ac4aa..e88b50d 100644
--- a/arch/arm/mach-shmobile/setup-r8a7740.c
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -363,38 +363,6 @@ static struct platform_device scifb_device = {
 	},
 };
 
-/* CMT */
-static struct sh_timer_config cmt10_platform_data = {
-	.name = "CMT10",
-	.channel_offset = 0x10,
-	.timer_bit = 0,
-	.clockevent_rating = 125,
-	.clocksource_rating = 125,
-};
-
-static struct resource cmt10_resources[] = {
-	[0] = {
-		.name	= "CMT10",
-		.start	= 0xe6138010,
-		.end	= 0xe613801b,
-		.flags	= IORESOURCE_MEM,
-	},
-	[1] = {
-		.start	= gic_spi(58),
-		.flags	= IORESOURCE_IRQ,
-	},
-};
-
-static struct platform_device cmt10_device = {
-	.name		= "sh_cmt",
-	.id		= 10,
-	.dev = {
-		.platform_data	= &cmt10_platform_data,
-	},
-	.resource	= cmt10_resources,
-	.num_resources	= ARRAY_SIZE(cmt10_resources),
-};
-
 /* TMU */
 static struct sh_timer_config tmu00_platform_data = {
 	.name = "TMU00",
@@ -531,7 +499,6 @@ static struct platform_device *r8a7740_early_devices[] __initdata = {
 	&scif6_device,
 	&scif7_device,
 	&scifb_device,
-	&cmt10_device,
 	&tmu00_device,
 	&tmu01_device,
 	&tmu02_device,
-- 
1.7.9.5

[PATCH v4 7/7] ARM: mach-shmobile: r8a7740: Setup the timer CMT10 using DT

[Simon Horman]

On Thu, Apr 11, 2013 at 01:24:03PM +0200, Bastian Hecht wrote:
> We can now use the Device Tree for bringing up our timer device CMT10 on
> the SoC r8a7740.

Hi Bastian,

unfortunately with this patch the armaillo800eva no longer boots.

I am testing  against renesas-next-20130411v2 with the other
6 patches in this series applied. I am using the armadillo800eva defconfig.
The boot log is below.

I have also tested kzm9g an kzm9g-reference, they seem fine.


hermit> tftpboot 10.3.5.147 10.3.5.146 --kernel=armadillo/zImage
initializing net-device...OK

Client: 10.3.5.147
Server: 10.3.5.146
Region(kernel): armadillo/zImage

Filename : armadillo/zImage
......................................................................................................................................................................................................................................................................................................................................................................................................................................................
Filesize : 2240001

Copying kernel:net.........done.
Doing console=tty0
Doing console=ttySC1,115200
Doing earlyprintk=sh-sci.1,115200
Doing ignore_loglevel
Doing root=/dev/nfs
Doing ip=dhcp
Doing nfsroot=,rsize=4096,wsize=4096
Doing rw
Booting Linux on physical CPU 0x0
Linux version 3.9.0-rc2-00007-g92bd9f5 (horms at ayumi.isobedori.kobe.vergenet.net) (gcc version 4.4.5 (Debian 4.4.5-8) ) #1698 Fri Apr 12 10:21:28 JST 2013
CPU: ARMv7 Processor [412fc093] revision 3 (ARMv7), cr=10c53c7d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
Machine: armadillo800eva, model: armadillo 800 eva
debug: ignoring loglevel setting.
Memory policy: ECC disabled, Data cache writeback
On node 0 totalpages: 131072
free_area_init_node: node 0, pgdat c0459e1c, node_mem_map c067e000
  Normal zone: 1024 pages used for memmap
  Normal zone: 0 pages reserved
  Normal zone: 131072 pages, LIFO batch:31
CPU: All CPU(s) started in SVC mode.
bootconsole [early_ttySC1] enabled
pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
pcpu-alloc: [0] 0 
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 130048
Kernel command line: console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096 rw
PID hash table entries: 2048 (order: 1, 8192 bytes)
Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
__ex_table already sorted, skipping sort
Memory: 512MB = 512MB total
Memory: 515124k/515124k available, 9164k reserved, 0K highmem
Virtual kernel memory layout:
    vector  : 0xffff0000 - 0xffff1000   (   4 kB)
    fixmap  : 0xfff00000 - 0xfffe0000   ( 896 kB)
    vmalloc : 0xe0800000 - 0xff000000   ( 488 MB)
    lowmem  : 0xc0000000 - 0xe0000000   ( 512 MB)
    modules : 0xbf000000 - 0xc0000000   (  16 MB)
      .text : 0xc0008000 - 0xc040702c   (4093 kB)
      .init : 0xc0408000 - 0xc042b468   ( 142 kB)
      .data : 0xc042c000 - 0xc045a600   ( 186 kB)
       .bss : 0xc045a600 - 0xc0482624   ( 161 kB)
NR_IRQS:16 nr_irqs:16 16
GIC CPU mask not found - kernel will fail to boot.
GIC CPU mask not found - kernel will fail to boot.
sched_clock: 32 bits at 128 Hz, resolution 7812500ns, wraps every 3489660920ms
Console: colour dummy device 80x30
console [tty0] enabled
Calibrating delay loop... 

[PATCH v4 7/7] ARM: mach-shmobile: r8a7740: Setup the timer CMT10 using DT

[Bastian Hecht]

Hello Simon,

2013/4/12 Simon Horman <horms@verge.net.au>:
> On Thu, Apr 11, 2013 at 01:24:03PM +0200, Bastian Hecht wrote:
>> We can now use the Device Tree for bringing up our timer device CMT10 on
>> the SoC r8a7740.
>
> Hi Bastian,
>
> unfortunately with this patch the armaillo800eva no longer boots.
>
> I am testing  against renesas-next-20130411v2 with the other
> 6 patches in this series applied. I am using the armadillo800eva defconfig.
> The boot log is below.

Ouch, sorry! I checked the patches and somehow I missed a chunk in
0007-... when I rebased the series to next. The part that actually
adds the DT info to r8a7740.dtsi. Further we need the GIC to be
present in the DT to make things work here (my old patch used the
INTCA as interrupt controller reference, but that has gone in the
meantime).
I want to repost my A1 reference code soon and in there I add the way
to set up the GIC via DT.

To accelerate things maybe we take 0001-0006 now and postpone 0007
until the GIC is in the DT?
I diffed the new patches against the v3 series, and the .dtsi chunk is
the only one that didn't make it, so I strongly believe the series is
fine now.

Thanks,

 Bastian

[PATCH v4 7/7] ARM: mach-shmobile: r8a7740: Setup the timer CMT10 using DT

[Simon Horman]

On Fri, Apr 12, 2013 at 02:46:15PM +0200, Bastian Hecht wrote:
> Hello Simon,
> 
> 2013/4/12 Simon Horman <horms@verge.net.au>:
> > On Thu, Apr 11, 2013 at 01:24:03PM +0200, Bastian Hecht wrote:
> >> We can now use the Device Tree for bringing up our timer device CMT10 on
> >> the SoC r8a7740.
> >
> > Hi Bastian,
> >
> > unfortunately with this patch the armaillo800eva no longer boots.
> >
> > I am testing  against renesas-next-20130411v2 with the other
> > 6 patches in this series applied. I am using the armadillo800eva defconfig.
> > The boot log is below.
> 
> Ouch, sorry! I checked the patches and somehow I missed a chunk in
> 0007-... when I rebased the series to next. The part that actually
> adds the DT info to r8a7740.dtsi. Further we need the GIC to be
> present in the DT to make things work here (my old patch used the
> INTCA as interrupt controller reference, but that has gone in the
> meantime).
> I want to repost my A1 reference code soon and in there I add the way
> to set up the GIC via DT.
> 
> To accelerate things maybe we take 0001-0006 now and postpone 0007
> until the GIC is in the DT?
> I diffed the new patches against the v3 series, and the .dtsi chunk is
> the only one that didn't make it, so I strongly believe the series is
> fine now.

Ok, thanks. I'll see about queuing-up 0001-0006 and you can repost
0007 at a later date.

[PATCH v4 7/7] ARM: mach-shmobile: r8a7740: Setup the timer CMT10 using DT

[Simon Horman]

On Mon, Apr 15, 2013 at 12:58:05PM +0900, Simon Horman wrote:
> On Fri, Apr 12, 2013 at 02:46:15PM +0200, Bastian Hecht wrote:
> > Hello Simon,
> > 
> > 2013/4/12 Simon Horman <horms@verge.net.au>:
> > > On Thu, Apr 11, 2013 at 01:24:03PM +0200, Bastian Hecht wrote:
> > >> We can now use the Device Tree for bringing up our timer device CMT10 on
> > >> the SoC r8a7740.
> > >
> > > Hi Bastian,
> > >
> > > unfortunately with this patch the armaillo800eva no longer boots.
> > >
> > > I am testing  against renesas-next-20130411v2 with the other
> > > 6 patches in this series applied. I am using the armadillo800eva defconfig.
> > > The boot log is below.
> > 
> > Ouch, sorry! I checked the patches and somehow I missed a chunk in
> > 0007-... when I rebased the series to next. The part that actually
> > adds the DT info to r8a7740.dtsi. Further we need the GIC to be
> > present in the DT to make things work here (my old patch used the
> > INTCA as interrupt controller reference, but that has gone in the
> > meantime).
> > I want to repost my A1 reference code soon and in there I add the way
> > to set up the GIC via DT.
> > 
> > To accelerate things maybe we take 0001-0006 now and postpone 0007
> > until the GIC is in the DT?
> > I diffed the new patches against the v3 series, and the .dtsi chunk is
> > the only one that didn't make it, so I strongly believe the series is
> > fine now.
> 
> Ok, thanks. I'll see about queuing-up 0001-0006 and you can repost
> 0007 at a later date.

I have queued-up 0001-0006.

[PATCH v4 5/7] ARM: mach-shmobile: sh73a0: Setup the timer CMT10 using DT

[Simon Horman]

On Thu, Apr 11, 2013 at 01:24:01PM +0200, Bastian Hecht wrote:
> We can now use the Device Tree for bringing up our timer device CMT10 on
> the SoC sh73a0.
> 
> Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>

I had queued-up this patch for v3.11 inthe soc-sh73a0 branch.

However, on request from Magnus, I am dropping it as it prevents
the kzm9g (non-reference) from booting if CONFIG_TMU is not
enabled. This is particularly problematic as I am told it
is not desirable to enable TMU in production as it conflicts
with power management.

The problem that this patch introduces appears to be that CMT is
now started too late for it to be used as a clocks source
when Calibrating the delay loop. If TMU is present then it masks
this problem by providing a clocksource at this point.

With this in mind Magnus has indicated that for the forseable future
he would like CMT and TMU to be initialised using C-code rather
than using DT.

Magnus, please feel free to jump in an correct anything above that
is incomplete or incorrect.

> ---
> v4: same. only patch 2 and 3 changed
> 
>  arch/arm/boot/dts/sh73a0.dtsi         |   11 +++++++++++
>  arch/arm/mach-shmobile/setup-sh73a0.c |   32 --------------------------------
>  2 files changed, 11 insertions(+), 32 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
> index ec40bf7..67b5089 100644
> --- a/arch/arm/boot/dts/sh73a0.dtsi
> +++ b/arch/arm/boot/dts/sh73a0.dtsi
> @@ -222,4 +222,15 @@
>  		cap-sd-highspeed;
>  		status = "disabled";
>  	};
> +
> +	timer at e6138010 {
> +		compatible = "renesas,cmt-timer";
> +		interrupt-parent = <&gic>;
> +		reg = <0xe6138010 0xc>;
> +		interrupts = <0 65 0x4>;
> +		renesas,device-id = <1>;
> +		renesas,channel-id = <0>;
> +		renesas,source-quality = <3>;
> +		renesas,event-quality = <3>;
> +	};
>  };
> diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
> index d10ded0..024b7a6 100644
> --- a/arch/arm/mach-shmobile/setup-sh73a0.c
> +++ b/arch/arm/mach-shmobile/setup-sh73a0.c
> @@ -235,37 +235,6 @@ static struct platform_device scif8_device = {
>  	},
>  };
>  
> -static struct sh_timer_config cmt10_platform_data = {
> -	.name = "CMT10",
> -	.channel_offset = 0x10,
> -	.timer_bit = 0,
> -	.clockevent_rating = 125,
> -	.clocksource_rating = 125,
> -};
> -
> -static struct resource cmt10_resources[] = {
> -	[0] = {
> -		.name	= "CMT10",
> -		.start	= 0xe6138010,
> -		.end	= 0xe613801b,
> -		.flags	= IORESOURCE_MEM,
> -	},
> -	[1] = {
> -		.start	= gic_spi(65),
> -		.flags	= IORESOURCE_IRQ,
> -	},
> -};
> -
> -static struct platform_device cmt10_device = {
> -	.name		= "sh_cmt",
> -	.id		= 10,
> -	.dev = {
> -		.platform_data	= &cmt10_platform_data,
> -	},
> -	.resource	= cmt10_resources,
> -	.num_resources	= ARRAY_SIZE(cmt10_resources),
> -};
> -
>  /* TMU */
>  static struct sh_timer_config tmu00_platform_data = {
>  	.name = "TMU00",
> @@ -930,7 +899,6 @@ static struct platform_device *sh73a0_devices_dt[] __initdata = {
>  	&scif6_device,
>  	&scif7_device,
>  	&scif8_device,
> -	&cmt10_device,
>  };
>  
>  static struct platform_device *sh73a0_early_devices[] __initdata = {
> -- 
> 1.7.9.5
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-sh" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

[PATCH v4 4/7] ARM: shmobile: sh73a0: Add timer DT names to clock list

[Simon Horman]

On Thu, Apr 11, 2013 at 01:24:00PM +0200, Bastian Hecht wrote:
> This adds temporarily the alternative device names to the clock list
> that are used when booting via Device Tree setup.
> 
> Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>

As per my recent email regarding "ARM: shmobile: sh73a0: Add timer DT names
to clock list", I have dropped this patch which was previously queued-up
for v3.11.

> ---
> v4: same. only patches 2 and 3 are changed.
> 
>  arch/arm/mach-shmobile/clock-sh73a0.c |    3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
> index 784fbaa..5d98322 100644
> --- a/arch/arm/mach-shmobile/clock-sh73a0.c
> +++ b/arch/arm/mach-shmobile/clock-sh73a0.c
> @@ -535,7 +535,9 @@ static struct clk_lookup lookups[] = {
>  	CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU0 */
>  	CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2-RX0 */
>  	CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */
> +	CLKDEV_DEV_ID("fff60008.timer", &mstp_clks[MSTP125]), /* TMU00 */
>  	CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
> +	CLKDEV_DEV_ID("fff60014.timer", &mstp_clks[MSTP125]), /* TMU01 */
>  	CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
>  	CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
>  	CLKDEV_DEV_ID("e6820000.i2c", &mstp_clks[MSTP116]), /* I2C0 */
> @@ -552,6 +554,7 @@ static struct clk_lookup lookups[] = {
>  	CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
>  	CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */
>  	CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
> +	CLKDEV_DEV_ID("e6138010.timer", &mstp_clks[MSTP329]), /* CMT10 */
>  	CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI */
>  	CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
>  	CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */
> -- 
> 1.7.9.5
> 

[PATCH v4 1/7] ARM: shmobile: Define DT bindings for timer devices

[Simon Horman]

On Thu, Apr 11, 2013 at 01:23:57PM +0200, Bastian Hecht wrote:
> The SH mobile series currently features 3 timer devices in the kernel:
> Compare Match Timer (CMT), Timer Unit (TMU) and MTU2. These devices
> share register layout characteristics amongst each that enable us to
> define common DT bindings for them.
> 
> Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
> ---
> v4: same. only patch 2 and 3 changed

As per my recent email regarding "ARM: shmobile: sh73a0: Add timer DT names
to clock list", I have dropped this patch which was previously queued-up
for v3.11.

> 
>  .../devicetree/bindings/timer/renesas,timer.txt    |   45 ++++++++++++++++++++
>  1 file changed, 45 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/timer/renesas,timer.txt
> 
> diff --git a/Documentation/devicetree/bindings/timer/renesas,timer.txt b/Documentation/devicetree/bindings/timer/renesas,timer.txt
> new file mode 100644
> index 0000000..2c001bf
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/renesas,timer.txt
> @@ -0,0 +1,45 @@
> +* Renesas SH Mobile Timer
> +
> +Bindings for several timer devices from Renesas including CMT, TMU and MTU2.
> +
> +Required properties:
> +- compatible : Should be "renesas,{device}-timer",
> +  whereas device is "cmt", "tmu" or "mtu2".
> +- reg : Address and length of the register set for the device
> +- interrupts : Timer interrupt
> +- renesas,device-id : The ID of the timer device
> +- renesas,channel-id : The channel ID of the timer device
> +- renesas,source-quality : The viability to use this device as a free
> +  running clock. From 0 (do not use) to 10 (best possible clock).
> +- renesas,event-quality : The viability to use this device as an event
> +  generator. From 0 (do not use) to 10 (best possible clock).
> +
> +The properties renesas,{source,event}-quality reflect the situation that the
> +usability of the timer devices depend on the location within their SoCs. E.g.
> +the power domain affinty affects power management, some mux-ed lines might be
> +preferred to be assigned to other functions and other constraints.
> +
> +Example for CMT1 channel 0 on the R8A7740 SoC:
> +
> +	timer at e6138010 {
> +		compatible = "renesas,cmt-timer";
> +		interrupt-parent = <&intca>;
> +		reg = <0xe6138010 0xc>;
> +		interrupts = <0x0b00>;
> +		renesas,device-id = <1>;
> +		renesas,channel-id = <0>;
> +		renesas,source-quality = <3>;
> +		renesas,event-quality = <3>;
> +	};
> +
> +Example for TMU0 channel 1 on the SH7372 SoC:
> +	timer at fff60014 {
> +		compatible = "renesas,tmu-timer";
> +		interrupt-parent = <&intcs>;
> +		reg = <0xfff60014 0xc>;
> +		interrupts = <0xea0>;
> +		renesas,device-id = <0>;
> +		renesas,channel-id = <1>;
> +		renesas,source-quality = <4>;
> +		renesas,event-quality = <0>;
> +	};
> -- 
> 1.7.9.5
> 

[PATCH v4 2/7] clocksource: sh_cmt: Add OF support

[Simon Horman]

On Thu, Apr 11, 2013 at 01:23:58PM +0200, Bastian Hecht wrote:
> We add the capabilty to probe SH CMT timer devices using Device Tree
> setup.
> 
> Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>

As per my recent email regarding "ARM: shmobile: sh73a0: Add timer DT names
to clock list", I have dropped this patch which was previously queued-up
for v3.11.

> ---
> v4:
> Moved the assignments of p->channel_offset and p->timer_bit so that
> they are ready as soon as setup_irq() is called
> 
>  drivers/clocksource/sh_cmt.c |  108 +++++++++++++++++++++++++++++++++++++-----
>  1 file changed, 95 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
> index 08d0c41..66a12e9 100644
> --- a/drivers/clocksource/sh_cmt.c
> +++ b/drivers/clocksource/sh_cmt.c
> @@ -34,10 +34,13 @@
>  #include <linux/module.h>
>  #include <linux/pm_domain.h>
>  #include <linux/pm_runtime.h>
> +#include <linux/of.h>
>  
>  struct sh_cmt_priv {
>  	void __iomem *mapbase;
>  	struct clk *clk;
> +	long channel_offset;
> +	int timer_bit;
>  	unsigned long width; /* 16 or 32 bit version of hardware block */
>  	unsigned long overflow_bit;
>  	unsigned long clear_bits;
> @@ -109,9 +112,7 @@ static void sh_cmt_write32(void __iomem *base, unsigned long offs,
>  
>  static inline unsigned long sh_cmt_read_cmstr(struct sh_cmt_priv *p)
>  {
> -	struct sh_timer_config *cfg = p->pdev->dev.platform_data;
> -
> -	return p->read_control(p->mapbase - cfg->channel_offset, 0);
> +	return p->read_control(p->mapbase - p->channel_offset, 0);
>  }
>  
>  static inline unsigned long sh_cmt_read_cmcsr(struct sh_cmt_priv *p)
> @@ -127,9 +128,7 @@ static inline unsigned long sh_cmt_read_cmcnt(struct sh_cmt_priv *p)
>  static inline void sh_cmt_write_cmstr(struct sh_cmt_priv *p,
>  				      unsigned long value)
>  {
> -	struct sh_timer_config *cfg = p->pdev->dev.platform_data;
> -
> -	p->write_control(p->mapbase - cfg->channel_offset, 0, value);
> +	p->write_control(p->mapbase - p->channel_offset, 0, value);
>  }
>  
>  static inline void sh_cmt_write_cmcsr(struct sh_cmt_priv *p,
> @@ -176,7 +175,6 @@ static DEFINE_RAW_SPINLOCK(sh_cmt_lock);
>  
>  static void sh_cmt_start_stop_ch(struct sh_cmt_priv *p, int start)
>  {
> -	struct sh_timer_config *cfg = p->pdev->dev.platform_data;
>  	unsigned long flags, value;
>  
>  	/* start stop register shared by multiple timer channels */
> @@ -184,9 +182,9 @@ static void sh_cmt_start_stop_ch(struct sh_cmt_priv *p, int start)
>  	value = sh_cmt_read_cmstr(p);
>  
>  	if (start)
> -		value |= 1 << cfg->timer_bit;
> +		value |= 1 << p->timer_bit;
>  	else
> -		value &= ~(1 << cfg->timer_bit);
> +		value &= ~(1 << p->timer_bit);
>  
>  	sh_cmt_write_cmstr(p, value);
>  	raw_spin_unlock_irqrestore(&sh_cmt_lock, flags);
> @@ -673,15 +671,93 @@ static int sh_cmt_register(struct sh_cmt_priv *p, char *name,
>  	return 0;
>  }
>  
> -static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
> +static const struct of_device_id of_sh_cmt_match[] = {
> +	{ .compatible = "renesas,cmt-timer" },
> +	{},
> +};
> +MODULE_DEVICE_TABLE(of, of_sh_cmt_match);
> +
> +static const int sh_cmt_offset_multiplier[] = { 0x60, 0x10, 0x40, 0x40, 0x40 };
> +#define CMT_MAX_CHANNELS	6
> +
> +static struct sh_timer_config *sh_cmt_parse_dt(struct device *dev)
> +{
> +	struct sh_timer_config *cfg;
> +	struct device_node *np = dev->of_node;
> +	u32 timer_id, channel_id, rating;
> +
> +	if (!IS_ENABLED(CONFIG_OF) || !np)
> +		return NULL;
> +
> +	cfg = devm_kzalloc(dev, sizeof(struct sh_timer_config), GFP_KERNEL);
> +	if (!cfg) {
> +		dev_err(dev, "failed to allocate DT config data\n");
> +		return NULL;
> +	}
> +
> +	if (of_property_read_u32(np, "renesas,device-id", &timer_id)) {
> +		dev_err(dev, "device id missing\n");
> +		return NULL;
> +	}
> +	if (timer_id >= ARRAY_SIZE(sh_cmt_offset_multiplier)) {
> +		dev_err(dev, "invalid device id\n");
> +		return NULL;
> +	}
> +
> +	if (of_property_read_u32(np, "renesas,channel-id", &channel_id)) {
> +		dev_err(dev, "channel id missing\n");
> +		return NULL;
> +	}
> +	if (channel_id >= CMT_MAX_CHANNELS) {
> +		dev_err(dev, "invalid channel id\n");
> +		return NULL;
> +	}
> +
> +	cfg->channel_offset = sh_cmt_offset_multiplier[timer_id] *
> +							(channel_id + 1);
> +	cfg->timer_bit = channel_id;
> +
> +	/*
> +	 * We convert the {source,event}-quality DT properties to linux specific
> +	 * clock{source,event}_ratings.
> +	 */
> +	if (!of_property_read_u32(np, "renesas,source-quality", &rating)) {
> +		if (rating > 10) {
> +			dev_err(dev, "invalid source-quality\n");
> +			return NULL;
> +		}
> +		if (rating)
> +			cfg->clocksource_rating = rating * 50 - 1;
> +	}
> +
> +	if (!of_property_read_u32(np, "renesas,event-quality", &rating)) {
> +		if (rating > 10) {
> +			dev_err(dev, "invalid event-quality\n");
> +			return NULL;
> +		}
> +		if (rating)
> +			cfg->clockevent_rating = rating * 50 - 1;
> +	}
> +
> +	if (!cfg->clocksource_rating && !cfg->clockevent_rating) {
> +		dev_err(dev, "source- and event-quality 0, timer is unused\n");
> +		return NULL;
> +	}
> +
> +	return cfg;
> +}
> +
> +static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev,
> +						struct sh_timer_config *cfg)
>  {
> -	struct sh_timer_config *cfg = pdev->dev.platform_data;
>  	struct resource *res;
>  	int irq, ret;
>  	ret = -ENXIO;
>  
>  	memset(p, 0, sizeof(*p));
>  	p->pdev = pdev;
> +	p->channel_offset = cfg->channel_offset;
> +	p->timer_bit = cfg->timer_bit;
>  
>  	if (!cfg) {
>  		dev_err(&p->pdev->dev, "missing platform data\n");
> @@ -777,7 +853,7 @@ err0:
>  static int sh_cmt_probe(struct platform_device *pdev)
>  {
>  	struct sh_cmt_priv *p = platform_get_drvdata(pdev);
> -	struct sh_timer_config *cfg = pdev->dev.platform_data;
> +	struct sh_timer_config *cfg;
>  	int ret;
>  
>  	if (!is_early_platform_device(pdev)) {
> @@ -785,6 +861,11 @@ static int sh_cmt_probe(struct platform_device *pdev)
>  		pm_runtime_enable(&pdev->dev);
>  	}
>  
> +	if (pdev->dev.of_node)
> +		cfg = sh_cmt_parse_dt(&pdev->dev);
> +	else
> +		cfg = pdev->dev.platform_data;
> +
>  	if (p) {
>  		dev_info(&pdev->dev, "kept as earlytimer\n");
>  		goto out;
> @@ -796,7 +877,7 @@ static int sh_cmt_probe(struct platform_device *pdev)
>  		return -ENOMEM;
>  	}
>  
> -	ret = sh_cmt_setup(p, pdev);
> +	ret = sh_cmt_setup(p, pdev, cfg);
>  	if (ret) {
>  		kfree(p);
>  		pm_runtime_idle(&pdev->dev);
> @@ -824,6 +905,7 @@ static struct platform_driver sh_cmt_device_driver = {
>  	.remove		= sh_cmt_remove,
>  	.driver		= {
>  		.name	= "sh_cmt",
> +		.of_match_table = of_match_ptr(of_sh_cmt_match),
>  	}
>  };
>  
> -- 
> 1.7.9.5
> 

[PATCH v4 3/7] clocksource: sh_tmu: Add OF support

[Simon Horman]

On Thu, Apr 11, 2013 at 01:23:59PM +0200, Bastian Hecht wrote:
> We add the capabilty to probe SH CMT timer devices using Device Tree
> setup.
> 
> Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>

As per my recent email regarding "ARM: shmobile: sh73a0: Add timer DT names
to clock list", I have dropped this patch which was previously queued-up
for v3.11.

> ---
> v4:
> Moved the assignments of p->channel_offset and p->timer_bit so that
> they are ready as soon as setup_irq() is called.
> 
>  drivers/clocksource/sh_tmu.c |   96 +++++++++++++++++++++++++++++++++++++-----
>  1 file changed, 85 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
> index 78b8dae..17bb607 100644
> --- a/drivers/clocksource/sh_tmu.c
> +++ b/drivers/clocksource/sh_tmu.c
> @@ -34,10 +34,13 @@
>  #include <linux/module.h>
>  #include <linux/pm_domain.h>
>  #include <linux/pm_runtime.h>
> +#include <linux/of.h>
>  
>  struct sh_tmu_priv {
>  	void __iomem *mapbase;
>  	struct clk *clk;
> +	long channel_offset;
> +	int timer_bit;
>  	struct irqaction irqaction;
>  	struct platform_device *pdev;
>  	unsigned long rate;
> @@ -57,12 +60,11 @@ static DEFINE_RAW_SPINLOCK(sh_tmu_lock);
>  
>  static inline unsigned long sh_tmu_read(struct sh_tmu_priv *p, int reg_nr)
>  {
> -	struct sh_timer_config *cfg = p->pdev->dev.platform_data;
>  	void __iomem *base = p->mapbase;
>  	unsigned long offs;
>  
>  	if (reg_nr == TSTR)
> -		return ioread8(base - cfg->channel_offset);
> +		return ioread8(base - p->channel_offset);
>  
>  	offs = reg_nr << 2;
>  
> @@ -75,12 +77,11 @@ static inline unsigned long sh_tmu_read(struct sh_tmu_priv *p, int reg_nr)
>  static inline void sh_tmu_write(struct sh_tmu_priv *p, int reg_nr,
>  				unsigned long value)
>  {
> -	struct sh_timer_config *cfg = p->pdev->dev.platform_data;
>  	void __iomem *base = p->mapbase;
>  	unsigned long offs;
>  
>  	if (reg_nr == TSTR) {
> -		iowrite8(value, base - cfg->channel_offset);
> +		iowrite8(value, base - p->channel_offset);
>  		return;
>  	}
>  
> @@ -94,7 +95,6 @@ static inline void sh_tmu_write(struct sh_tmu_priv *p, int reg_nr,
>  
>  static void sh_tmu_start_stop_ch(struct sh_tmu_priv *p, int start)
>  {
> -	struct sh_timer_config *cfg = p->pdev->dev.platform_data;
>  	unsigned long flags, value;
>  
>  	/* start stop register shared by multiple timer channels */
> @@ -102,9 +102,9 @@ static void sh_tmu_start_stop_ch(struct sh_tmu_priv *p, int start)
>  	value = sh_tmu_read(p, TSTR);
>  
>  	if (start)
> -		value |= 1 << cfg->timer_bit;
> +		value |= 1 << p->timer_bit;
>  	else
> -		value &= ~(1 << cfg->timer_bit);
> +		value &= ~(1 << p->timer_bit);
>  
>  	sh_tmu_write(p, TSTR, value);
>  	raw_spin_unlock_irqrestore(&sh_tmu_lock, flags);
> @@ -421,15 +421,83 @@ static int sh_tmu_register(struct sh_tmu_priv *p, char *name,
>  	return 0;
>  }
>  
> -static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev)
> +static const struct of_device_id of_sh_tmu_match[] = {
> +	{ .compatible = "renesas,tmu-timer" },
> +	{},
> +};
> +MODULE_DEVICE_TABLE(of, of_sh_tmu_match);
> +
> +#define TMU_OFFSET_MULTIPLIER	0xc
> +#define TMU_MAX_CHANNELS	3
> +
> +static struct sh_timer_config *sh_tmu_parse_dt(struct device *dev)
> +{
> +	struct sh_timer_config *cfg;
> +	struct device_node *np = dev->of_node;
> +	u32 channel_id, rating;
> +
> +	if (!IS_ENABLED(CONFIG_OF) || !np)
> +		return NULL;
> +
> +	cfg = devm_kzalloc(dev, sizeof(struct sh_timer_config), GFP_KERNEL);
> +	if (!cfg) {
> +		dev_err(dev, "failed to allocate DT config data\n");
> +		return NULL;
> +	}
> +
> +	if (of_property_read_u32(np, "renesas,channel-id", &channel_id)) {
> +		dev_err(dev, "channel id missing\n");
> +		return NULL;
> +	}
> +	if (channel_id >= TMU_MAX_CHANNELS) {
> +		dev_err(dev, "invalid channel id\n");
> +		return NULL;
> +	}
> +
> +	cfg->channel_offset = channel_id * TMU_OFFSET_MULTIPLIER + 4;
> +	cfg->timer_bit = channel_id;
> +
> +	/*
> +	 * We convert the {source,event}-quality DT properties to linux specific
> +	 * clock{source,event}_ratings.
> +	 */
> +	if (!of_property_read_u32(np, "renesas,source-quality", &rating)) {
> +		if (rating > 10) {
> +			dev_err(dev, "invalid source-quality\n");
> +			return NULL;
> +		}
> +		if (rating)
> +			cfg->clocksource_rating = rating * 50 - 1;
> +	}
> +
> +	if (!of_property_read_u32(np, "renesas,event-quality", &rating)) {
> +		if (rating > 10) {
> +			dev_err(dev, "invalid event-quality\n");
> +			return NULL;
> +		}
> +		if (rating)
> +			cfg->clockevent_rating = rating * 50 - 1;
> +	}
> +
> +	if (!cfg->clocksource_rating && !cfg->clockevent_rating) {
> +		dev_err(dev, "source- and event-quality 0, timer is unused\n");
> +		return NULL;
> +	}
> +
> +	return cfg;
> +}
> +
> +static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev,
> +						struct sh_timer_config *cfg)
>  {
> -	struct sh_timer_config *cfg = pdev->dev.platform_data;
>  	struct resource *res;
>  	int irq, ret;
>  	ret = -ENXIO;
>  
>  	memset(p, 0, sizeof(*p));
>  	p->pdev = pdev;
> +	p->channel_offset = cfg->channel_offset;
> +	p->timer_bit = cfg->timer_bit;
>  
>  	if (!cfg) {
>  		dev_err(&p->pdev->dev, "missing platform data\n");
> @@ -487,7 +555,7 @@ static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev)
>  static int sh_tmu_probe(struct platform_device *pdev)
>  {
>  	struct sh_tmu_priv *p = platform_get_drvdata(pdev);
> -	struct sh_timer_config *cfg = pdev->dev.platform_data;
> +	struct sh_timer_config *cfg;
>  	int ret;
>  
>  	if (!is_early_platform_device(pdev)) {
> @@ -495,6 +563,11 @@ static int sh_tmu_probe(struct platform_device *pdev)
>  		pm_runtime_enable(&pdev->dev);
>  	}
>  
> +	if (pdev->dev.of_node)
> +		cfg = sh_tmu_parse_dt(&pdev->dev);
> +	else
> +		cfg = pdev->dev.platform_data;
> +
>  	if (p) {
>  		dev_info(&pdev->dev, "kept as earlytimer\n");
>  		goto out;
> @@ -506,7 +579,7 @@ static int sh_tmu_probe(struct platform_device *pdev)
>  		return -ENOMEM;
>  	}
>  
> -	ret = sh_tmu_setup(p, pdev);
> +	ret = sh_tmu_setup(p, pdev, cfg);
>  	if (ret) {
>  		kfree(p);
>  		platform_set_drvdata(pdev, NULL);
> @@ -535,6 +608,7 @@ static struct platform_driver sh_tmu_device_driver = {
>  	.remove		= sh_tmu_remove,
>  	.driver		= {
>  		.name	= "sh_tmu",
> +		.of_match_table = of_sh_tmu_match,
>  	}
>  };
>  
> -- 
> 1.7.9.5
>